1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2020 MediaTek Inc.
4 * Author: Seiya Wang <seiya.wang@mediatek.com>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
18 stdout-path = "serial0:115200n8";
22 device_type = "memory";
23 reg = <0 0x40000000 0 0x80000000>;
26 backlight_lcd0: backlight-lcd0 {
27 compatible = "pwm-backlight";
28 pwms = <&pwm0 0 500000>;
29 power-supply = <&ppvar_sys>;
30 enable-gpios = <&pio 152 0>;
31 brightness-levels = <0 1023>;
32 num-interpolated-steps = <1023>;
33 default-brightness-level = <576>;
36 pp1000_dpbrdg: regulator-1v0-dpbrdg {
37 compatible = "regulator-fixed";
38 regulator-name = "pp1000_dpbrdg";
39 pinctrl-names = "default";
40 pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
41 regulator-min-microvolt = <1000000>;
42 regulator-max-microvolt = <1000000>;
45 gpio = <&pio 19 GPIO_ACTIVE_HIGH>;
46 vin-supply = <&mt6359_vs2_buck_reg>;
49 pp1000_mipibrdg: regulator-1v0-mipibrdg {
50 compatible = "regulator-fixed";
51 regulator-name = "pp1000_mipibrdg";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
54 regulator-min-microvolt = <1000000>;
55 regulator-max-microvolt = <1000000>;
58 gpio = <&pio 129 GPIO_ACTIVE_HIGH>;
59 vin-supply = <&mt6359_vs2_buck_reg>;
62 pp1800_dpbrdg: regulator-1v8-dpbrdg {
63 compatible = "regulator-fixed";
64 regulator-name = "pp1800_dpbrdg";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
69 gpio = <&pio 126 GPIO_ACTIVE_HIGH>;
70 vin-supply = <&mt6359_vio18_ldo_reg>;
73 /* system wide LDO 1.8V power rail */
74 pp1800_ldo_g: regulator-1v8-g {
75 compatible = "regulator-fixed";
76 regulator-name = "pp1800_ldo_g";
79 regulator-min-microvolt = <1800000>;
80 regulator-max-microvolt = <1800000>;
81 vin-supply = <&pp3300_g>;
84 pp1800_mipibrdg: regulator-1v8-mipibrdg {
85 compatible = "regulator-fixed";
86 regulator-name = "pp1800_mipibrdg";
87 pinctrl-names = "default";
88 pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
91 gpio = <&pio 128 GPIO_ACTIVE_HIGH>;
92 vin-supply = <&mt6359_vio18_ldo_reg>;
95 pp3300_dpbrdg: regulator-3v3-dpbrdg {
96 compatible = "regulator-fixed";
97 regulator-name = "pp3300_dpbrdg";
98 pinctrl-names = "default";
99 pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
102 gpio = <&pio 26 GPIO_ACTIVE_HIGH>;
103 vin-supply = <&pp3300_g>;
106 /* system wide switching 3.3V power rail */
107 pp3300_g: regulator-3v3-g {
108 compatible = "regulator-fixed";
109 regulator-name = "pp3300_g";
112 regulator-min-microvolt = <3300000>;
113 regulator-max-microvolt = <3300000>;
114 vin-supply = <&ppvar_sys>;
117 /* system wide LDO 3.3V power rail */
118 pp3300_ldo_z: regulator-3v3-z {
119 compatible = "regulator-fixed";
120 regulator-name = "pp3300_ldo_z";
123 regulator-min-microvolt = <3300000>;
124 regulator-max-microvolt = <3300000>;
125 vin-supply = <&ppvar_sys>;
128 pp3300_mipibrdg: regulator-3v3-mipibrdg {
129 compatible = "regulator-fixed";
130 regulator-name = "pp3300_mipibrdg";
131 pinctrl-names = "default";
132 pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
135 gpio = <&pio 127 GPIO_ACTIVE_HIGH>;
136 vin-supply = <&pp3300_g>;
139 /* separately switched 3.3V power rail */
140 pp3300_u: regulator-3v3-u {
141 compatible = "regulator-fixed";
142 regulator-name = "pp3300_u";
145 regulator-min-microvolt = <3300000>;
146 regulator-max-microvolt = <3300000>;
147 /* enable pin wired to GPIO controlled by EC */
148 vin-supply = <&pp3300_g>;
151 pp3300_wlan: regulator-3v3-wlan {
152 compatible = "regulator-fixed";
153 regulator-name = "pp3300_wlan";
156 regulator-min-microvolt = <3300000>;
157 regulator-max-microvolt = <3300000>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&pp3300_wlan_pins>;
161 gpio = <&pio 143 GPIO_ACTIVE_HIGH>;
164 /* system wide switching 5.0V power rail */
165 pp5000_a: regulator-5v0-a {
166 compatible = "regulator-fixed";
167 regulator-name = "pp5000_a";
170 regulator-min-microvolt = <5000000>;
171 regulator-max-microvolt = <5000000>;
172 vin-supply = <&ppvar_sys>;
175 /* system wide semi-regulated power rail from battery or USB */
176 ppvar_sys: regulator-var-sys {
177 compatible = "regulator-fixed";
178 regulator-name = "ppvar_sys";
183 reserved_memory: reserved-memory {
184 #address-cells = <2>;
188 scp_mem_reserved: scp@50000000 {
189 compatible = "shared-dma-pool";
190 reg = <0 0x50000000 0 0x2900000>;
194 wifi_restricted_dma_region: wifi@c0000000 {
195 compatible = "restricted-dma-pool";
196 reg = <0 0xc0000000 0 0x4000000>;
204 clock-frequency = <400000>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&i2c0_pins>;
208 touchscreen: touchscreen@10 {
210 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
211 pinctrl-names = "default";
212 pinctrl-0 = <&touchscreen_pins>;
219 clock-frequency = <400000>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&i2c1_pins>;
227 clock-frequency = <400000>;
228 clock-stretch-ns = <12600>;
229 pinctrl-names = "default";
230 pinctrl-0 = <&i2c2_pins>;
233 compatible = "elan,ekth3000";
235 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&trackpad_pins>;
238 vcc-supply = <&pp3300_u>;
246 clock-frequency = <400000>;
247 pinctrl-names = "default";
248 pinctrl-0 = <&i2c3_pins>;
254 clock-frequency = <400000>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&i2c7_pins>;
262 pinctrl-names = "default", "state_uhs";
263 pinctrl-0 = <&mmc0_default_pins>;
264 pinctrl-1 = <&mmc0_uhs_pins>;
266 max-frequency = <200000000>;
267 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
268 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
274 mmc-hs400-enhanced-strobe;
275 hs400-ds-delay = <0x12814>;
284 pinctrl-names = "default", "state_uhs";
285 pinctrl-0 = <&mmc1_default_pins>;
286 pinctrl-1 = <&mmc1_uhs_pins>;
288 max-frequency = <200000000>;
289 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
290 vmmc-supply = <&mt6360_ldo5_reg>;
291 vqmmc-supply = <&mt6360_ldo3_reg>;
300 &mt6359_vgpu11_buck_reg {
304 &mt6359_vgpu11_sshub_buck_reg {
306 regulator-min-microvolt = <575000>;
307 regulator-max-microvolt = <575000>;
310 &mt6359_vrf12_ldo_reg {
314 &mt6359_vufs_ldo_reg {
319 mediatek,dmic-mode = <1>; /* one-wire */
320 mediatek,mic-type-0 = <2>; /* DMIC */
321 mediatek,mic-type-2 = <2>; /* DMIC */
327 pinctrl-names = "default";
328 pinctrl-0 = <&nor_flash_pins>;
329 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
330 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
333 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
335 spi-max-frequency = <52000000>;
336 spi-rx-bus-width = <2>;
337 spi-tx-bus-width = <2>;
342 pinctrl-names = "default";
343 pinctrl-0 = <&pcie_pins>;
347 reg = <0x0000 0 0 0 0>;
349 bus-range = <0x1 0x1>;
351 #address-cells = <3>;
356 reg = <0x10000 0 0 0 0x100000>,
357 <0x10000 0 0x100000 0 0x100000>;
358 memory-region = <&wifi_restricted_dma_region>;
365 gpio-line-names = "I2S_DP_LRCK",
380 * AP_FLASH_WP_L is crossystem ABI. Schematics
381 * call it AP_FLASH_WP_ODL.
395 "EN_PP3300_DPBRDG_DX",
406 "AP_SPI_H1_TPM_CS_L",
407 "AP_SPI_H1_TPM_MISO",
408 "AP_SPI_H1_TPM_MOSI",
495 "EN_PP1800_DPBRDG_DX",
497 "EN_PP1800_EDPBRDG_DX",
505 "EN_PP3300_DISPLAY_DX",
507 "TOUCH_REPORT_DISABLE",
510 "AP_I2C_TRACKPAD_SCL_1V8",
511 "AP_I2C_TRACKPAD_SDA_1V8",
515 "SET_VMC_VOLT_AT_1V8",
529 "AP_I2C_EDPBRDG_SCL",
530 "AP_I2C_EDPBRDG_SDA",
533 "UART_SERVO_TX_SCP_RX",
534 "UART_SCP_TX_SERVO_RX",
537 "UART_AP_WAKE_BT_ODL",
590 cr50_int: cr50-irq-default-pins {
591 pins-gsc-ap-int-odl {
592 pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
597 cros_ec_int: cros-ec-irq-default-pins {
599 pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
605 i2c0_pins: i2c0-default-pins {
607 pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
608 <PINMUX_GPIO205__FUNC_SDA0>;
609 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
610 drive-strength-microamp = <1000>;
614 i2c1_pins: i2c1-default-pins {
616 pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
617 <PINMUX_GPIO119__FUNC_SDA1>;
618 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
619 drive-strength-microamp = <1000>;
623 i2c2_pins: i2c2-default-pins {
625 pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
626 <PINMUX_GPIO142__FUNC_SDA2>;
627 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
631 i2c3_pins: i2c3-default-pins {
633 pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
634 <PINMUX_GPIO161__FUNC_SDA3>;
636 drive-strength-microamp = <1000>;
640 i2c7_pins: i2c7-default-pins {
642 pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
643 <PINMUX_GPIO125__FUNC_SDA7>;
645 drive-strength-microamp = <1000>;
649 mmc0_default_pins: mmc0-default-pins {
651 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
652 <PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
653 <PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
654 <PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
655 <PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
656 <PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
657 <PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
658 <PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
659 <PINMUX_GPIO183__FUNC_MSDC0_CMD>;
661 drive-strength = <8>;
662 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
666 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
667 drive-strength = <8>;
668 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
672 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
673 drive-strength = <8>;
674 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
678 mmc0_uhs_pins: mmc0-uhs-pins {
680 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
681 <PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
682 <PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
683 <PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
684 <PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
685 <PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
686 <PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
687 <PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
688 <PINMUX_GPIO183__FUNC_MSDC0_CMD>;
690 drive-strength = <10>;
691 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
695 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
696 drive-strength = <10>;
697 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
701 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
702 drive-strength = <8>;
703 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
707 pinmux = <PINMUX_GPIO191__FUNC_MSDC0_DSL>;
708 drive-strength = <10>;
709 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
713 mmc1_default_pins: mmc1-default-pins {
715 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
716 <PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
717 <PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
718 <PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
719 <PINMUX_GPIO52__FUNC_MSDC1_CMD>;
721 drive-strength = <8>;
722 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
726 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
727 drive-strength = <8>;
728 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
732 pinmux = <PINMUX_GPIO17__FUNC_GPIO17>;
738 mmc1_uhs_pins: mmc1-uhs-pins {
740 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
741 <PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
742 <PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
743 <PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
744 <PINMUX_GPIO52__FUNC_MSDC1_CMD>;
746 drive-strength = <8>;
747 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
751 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
753 drive-strength = <8>;
754 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
758 nor_flash_pins: nor-flash-default-pins {
760 pinmux = <PINMUX_GPIO24__FUNC_SPINOR_CS>,
761 <PINMUX_GPIO28__FUNC_SPINOR_IO1>;
764 drive-strength = <10>;
768 pinmux = <PINMUX_GPIO27__FUNC_SPINOR_IO0>;
770 drive-strength = <10>;
774 pinmux = <PINMUX_GPIO25__FUNC_SPINOR_CK>;
777 drive-strength = <10>;
781 pcie_pins: pcie-default-pins {
783 pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
788 pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>;
792 pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>;
797 pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */
802 pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
804 pinmux = <PINMUX_GPIO19__FUNC_GPIO19>;
809 pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
811 pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
816 pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
818 pinmux = <PINMUX_GPIO126__FUNC_GPIO126>;
823 pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
825 pinmux = <PINMUX_GPIO128__FUNC_GPIO128>;
830 pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
832 pinmux = <PINMUX_GPIO26__FUNC_GPIO26>;
837 pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
839 pinmux = <PINMUX_GPIO127__FUNC_GPIO127>;
844 pp3300_wlan_pins: pp3300-wlan-pins {
845 pins-pcie-en-pp3300-wlan {
846 pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
851 pwm0_pins: pwm0-default-pins {
853 pinmux = <PINMUX_GPIO40__FUNC_DISP_PWM>;
857 pinmux = <PINMUX_GPIO152__FUNC_GPIO152>;
864 pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>;
868 spi1_pins: spi1-default-pins {
870 pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
871 <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
872 <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
877 pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
882 spi5_pins: spi5-default-pins {
884 pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
885 <PINMUX_GPIO37__FUNC_GPIO37>,
886 <PINMUX_GPIO39__FUNC_SPI5_A_MO>,
887 <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
892 trackpad_pins: trackpad-default-pins {
894 pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
896 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
900 touchscreen_pins: touchscreen-default-pins {
902 pinmux = <PINMUX_GPIO21__FUNC_GPIO21>;
908 pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
913 pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
920 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
926 pinctrl-names = "default";
927 pinctrl-0 = <&pwm0_pins>;
933 firmware-name = "mediatek/mt8192/scp.img";
934 memory-region = <&scp_mem_reserved>;
935 pinctrl-names = "default";
936 pinctrl-0 = <&scp_pins>;
939 compatible = "google,cros-ec-rpmsg";
940 mediatek,rpmsg-name = "cros-ec-rpmsg";
947 mediatek,pad-select = <0>;
948 pinctrl-names = "default";
949 pinctrl-0 = <&spi1_pins>;
952 compatible = "google,cros-ec-spi";
954 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
955 spi-max-frequency = <3000000>;
956 pinctrl-names = "default";
957 pinctrl-0 = <&cros_ec_int>;
959 #address-cells = <1>;
962 base_detection: cbas {
963 compatible = "google,cros-cbas";
967 compatible = "google,cros-ec-pwm";
973 i2c_tunnel: i2c-tunnel {
974 compatible = "google,cros-ec-i2c-tunnel";
975 google,remote-bus = <0>;
976 #address-cells = <1>;
980 mt6360_ldo3_reg: regulator@0 {
981 compatible = "google,cros-ec-regulator";
983 regulator-min-microvolt = <1800000>;
984 regulator-max-microvolt = <3300000>;
987 mt6360_ldo5_reg: regulator@1 {
988 compatible = "google,cros-ec-regulator";
990 regulator-min-microvolt = <3300000>;
991 regulator-max-microvolt = <3300000>;
995 compatible = "google,cros-ec-typec";
996 #address-cells = <1>;
999 usb_c0: connector@0 {
1000 compatible = "usb-c-connector";
1003 power-role = "dual";
1005 try-power-role = "source";
1008 usb_c1: connector@1 {
1009 compatible = "usb-c-connector";
1012 power-role = "dual";
1014 try-power-role = "source";
1023 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
1024 mediatek,pad-select = <0>;
1025 pinctrl-names = "default";
1026 pinctrl-0 = <&spi5_pins>;
1029 compatible = "google,cr50";
1031 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
1032 spi-max-frequency = <1000000>;
1033 pinctrl-names = "default";
1034 pinctrl-0 = <&cr50_int>;
1039 #address-cells = <2>;
1043 compatible = "mediatek,mt6315-regulator";
1044 reg = <0x6 SPMI_USID>;
1047 mt6315_6_vbuck1: vbuck1 {
1048 regulator-compatible = "vbuck1";
1049 regulator-name = "Vbcpu";
1050 regulator-min-microvolt = <300000>;
1051 regulator-max-microvolt = <1193750>;
1052 regulator-enable-ramp-delay = <256>;
1053 regulator-allowed-modes = <0 1 2>;
1054 regulator-always-on;
1057 mt6315_6_vbuck3: vbuck3 {
1058 regulator-compatible = "vbuck3";
1059 regulator-name = "Vlcpu";
1060 regulator-min-microvolt = <300000>;
1061 regulator-max-microvolt = <1193750>;
1062 regulator-enable-ramp-delay = <256>;
1063 regulator-allowed-modes = <0 1 2>;
1064 regulator-always-on;
1070 compatible = "mediatek,mt6315-regulator";
1071 reg = <0x7 SPMI_USID>;
1074 mt6315_7_vbuck1: vbuck1 {
1075 regulator-compatible = "vbuck1";
1076 regulator-name = "Vgpu";
1077 regulator-min-microvolt = <606250>;
1078 regulator-max-microvolt = <1193750>;
1079 regulator-enable-ramp-delay = <256>;
1080 regulator-allowed-modes = <0 1 2>;
1094 vusb33-supply = <&pp3300_g>;
1095 vbus-supply = <&pp5000_a>;
1098 #include <arm/cros-ec-keyboard.dtsi>
1099 #include <arm/cros-ec-sbs.dtsi>