1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Ben Ho <ben.ho@mediatek.com>
5 * Erin Lo <erin.lo@mediatek.com>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
21 stdout-path = "serial0:115200n8";
24 backlight_lcd0: backlight_lcd0 {
25 compatible = "pwm-backlight";
26 pwms = <&pwm0 0 500000>;
27 power-supply = <&bl_pp5000>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
36 device_type = "memory";
37 reg = <0 0x40000000 0 0x80000000>;
41 compatible = "fixed-clock";
43 clock-frequency = <32768>;
44 clock-output-names = "clk32k";
47 it6505_pp18_reg: regulator0 {
48 compatible = "regulator-fixed";
49 regulator-name = "it6505_pp18";
50 regulator-min-microvolt = <1800000>;
51 regulator-max-microvolt = <1800000>;
56 lcd_pp3300: regulator1 {
57 compatible = "regulator-fixed";
58 regulator-name = "lcd_pp3300";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
65 bl_pp5000: regulator2 {
66 compatible = "regulator-fixed";
67 regulator-name = "bl_pp5000";
68 regulator-min-microvolt = <5000000>;
69 regulator-max-microvolt = <5000000>;
74 mmc1_fixed_power: regulator3 {
75 compatible = "regulator-fixed";
76 regulator-name = "mmc1_power";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
81 mmc1_fixed_io: regulator4 {
82 compatible = "regulator-fixed";
83 regulator-name = "mmc1_io";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <1800000>;
88 pp1800_alw: regulator5 {
89 compatible = "regulator-fixed";
90 regulator-name = "pp1800_alw";
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
97 pp3300_alw: regulator6 {
98 compatible = "regulator-fixed";
99 regulator-name = "pp3300_alw";
102 regulator-min-microvolt = <3300000>;
103 regulator-max-microvolt = <3300000>;
106 reserved_memory: reserved-memory {
107 #address-cells = <2>;
111 scp_mem_reserved: scp_mem_region {
112 compatible = "shared-dma-pool";
113 reg = <0 0x50000000 0 0x2900000>;
118 sound: mt8183-sound {
119 mediatek,platform = <&afe>;
120 pinctrl-names = "default",
123 pinctrl-0 = <&aud_pins_default>;
124 pinctrl-1 = <&aud_pins_tdm_out_on>;
125 pinctrl-2 = <&aud_pins_tdm_out_off>;
130 compatible = "linux,bt-sco";
133 wifi_pwrseq: wifi-pwrseq {
134 compatible = "mmc-pwrseq-simple";
135 pinctrl-names = "default";
136 pinctrl-0 = <&wifi_pins_pwrseq>;
138 /* Toggle WIFI_ENABLE to reset the chip. */
139 reset-gpios = <&pio 119 1>;
142 wifi_wakeup: wifi-wakeup {
143 compatible = "gpio-keys";
144 pinctrl-names = "default";
145 pinctrl-0 = <&wifi_pins_wakeup>;
148 label = "Wake on WiFi";
149 gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
150 linux,code = <KEY_WAKEUP>;
155 tboard_thermistor1: thermal-sensor1 {
156 compatible = "generic-adc-thermal";
157 #thermal-sensor-cells = <0>;
158 io-channels = <&auxadc 0>;
159 io-channel-names = "sensor-channel";
160 temperature-lookup-table = < (-5000) 1553
189 tboard_thermistor2: thermal-sensor2 {
190 compatible = "generic-adc-thermal";
191 #thermal-sensor-cells = <0>;
192 io-channels = <&auxadc 1>;
193 io-channel-names = "sensor-channel";
194 temperature-lookup-table = < (-5000) 1553
229 proc-supply = <&mt6358_vproc12_reg>;
233 proc-supply = <&mt6358_vproc12_reg>;
237 proc-supply = <&mt6358_vproc12_reg>;
241 proc-supply = <&mt6358_vproc12_reg>;
245 proc-supply = <&mt6358_vproc12_reg>;
249 proc-supply = <&mt6358_vproc11_reg>;
253 proc-supply = <&mt6358_vproc11_reg>;
257 proc-supply = <&mt6358_vproc11_reg>;
261 proc-supply = <&mt6358_vproc11_reg>;
266 #address-cells = <1>;
269 /* compatible will be set in board dts */
271 enable-gpios = <&pio 45 0>;
272 pinctrl-names = "default";
273 pinctrl-0 = <&panel_pins_default>;
274 avdd-supply = <&ppvarn_lcd>;
275 avee-supply = <&ppvarp_lcd>;
276 pp1800-supply = <&pp1800_lcd>;
277 backlight = <&backlight_lcd0>;
281 remote-endpoint = <&dsi_out>;
289 remote-endpoint = <&panel_in>;
296 mali-supply = <&mt6358_vgpu_reg>;
297 sram-supply = <&mt6358_vsram_gpu_reg>;
301 pinctrl-names = "default";
302 pinctrl-0 = <&i2c0_pins>;
304 clock-frequency = <400000>;
305 #address-cells = <1>;
310 pinctrl-names = "default";
311 pinctrl-0 = <&i2c1_pins>;
313 clock-frequency = <100000>;
317 pinctrl-names = "default";
318 pinctrl-0 = <&i2c3_pins>;
320 clock-frequency = <100000>;
321 #address-cells = <1>;
326 pinctrl-names = "default";
327 pinctrl-0 = <&i2c5_pins>;
329 clock-frequency = <100000>;
330 #address-cells = <1>;
335 pinctrl-names = "default";
336 pinctrl-0 = <&i2c6_pins>;
338 clock-frequency = <100000>;
347 pinctrl-names = "default", "state_uhs";
348 pinctrl-0 = <&mmc0_pins_default>;
349 pinctrl-1 = <&mmc0_pins_uhs>;
351 max-frequency = <200000000>;
358 hs400-ds-delay = <0x12814>;
359 vmmc-supply = <&mt6358_vemc_reg>;
360 vqmmc-supply = <&mt6358_vio18_reg>;
361 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
362 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
368 pinctrl-names = "default", "state_uhs";
369 pinctrl-0 = <&mmc1_pins_default>;
370 pinctrl-1 = <&mmc1_pins_uhs>;
371 vmmc-supply = <&mmc1_fixed_power>;
372 vqmmc-supply = <&mmc1_fixed_io>;
373 mmc-pwrseq = <&wifi_pwrseq>;
375 max-frequency = <200000000>;
380 keep-power-in-suspend;
386 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
387 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
388 #address-cells = <1>;
391 qca_wifi: qca-wifi@1 {
392 compatible = "qcom,ath10k";
402 Avdd-supply = <&mt6358_vaud28_reg>;
406 regulator-min-microvolt = <2700000>;
407 regulator-max-microvolt = <2700000>;
411 regulator-min-microvolt = <2700000>;
412 regulator-max-microvolt = <2700000>;
416 aud_pins_default: audiopins {
418 pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
419 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
420 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
421 <PINMUX_GPIO102__FUNC_I2S2_DI>,
422 <PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
423 <PINMUX_GPIO89__FUNC_I2S5_BCK>,
424 <PINMUX_GPIO90__FUNC_I2S5_LRCK>,
425 <PINMUX_GPIO91__FUNC_I2S5_DO>,
426 <PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
427 <PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
428 <PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
429 <PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
430 <PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
431 <PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
432 <PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
433 <PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
434 <PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
438 aud_pins_tdm_out_on: audiotdmouton {
440 pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
441 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
442 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
443 <PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
444 <PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
445 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
446 drive-strength = <MTK_DRIVE_6mA>;
450 aud_pins_tdm_out_off: audiotdmoutoff {
452 pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
453 <PINMUX_GPIO170__FUNC_GPIO170>,
454 <PINMUX_GPIO171__FUNC_GPIO171>,
455 <PINMUX_GPIO172__FUNC_GPIO172>,
456 <PINMUX_GPIO173__FUNC_GPIO173>,
457 <PINMUX_GPIO10__FUNC_GPIO10>;
460 drive-strength = <MTK_DRIVE_2mA>;
466 pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
471 ec_ap_int_odl: ec_ap_int_odl {
473 pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
479 h1_int_od_l: h1_int_od_l {
481 pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
488 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
489 <PINMUX_GPIO83__FUNC_SCL0>;
490 mediatek,pull-up-adv = <3>;
491 mediatek,drive-strength-adv = <00>;
497 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
498 <PINMUX_GPIO84__FUNC_SCL1>;
499 mediatek,pull-up-adv = <3>;
500 mediatek,drive-strength-adv = <00>;
506 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
507 <PINMUX_GPIO104__FUNC_SDA2>;
509 mediatek,drive-strength-adv = <00>;
515 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
516 <PINMUX_GPIO51__FUNC_SDA3>;
517 mediatek,pull-up-adv = <3>;
518 mediatek,drive-strength-adv = <00>;
524 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
525 <PINMUX_GPIO106__FUNC_SDA4>;
527 mediatek,drive-strength-adv = <00>;
533 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
534 <PINMUX_GPIO49__FUNC_SDA5>;
535 mediatek,pull-up-adv = <3>;
536 mediatek,drive-strength-adv = <00>;
542 pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
543 <PINMUX_GPIO12__FUNC_SDA6>;
548 mmc0_pins_default: mmc0-pins-default {
550 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
551 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
552 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
553 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
554 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
555 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
556 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
557 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
558 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
560 drive-strength = <MTK_DRIVE_14mA>;
561 mediatek,pull-up-adv = <01>;
565 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
566 drive-strength = <MTK_DRIVE_14mA>;
567 mediatek,pull-down-adv = <10>;
571 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
572 drive-strength = <MTK_DRIVE_14mA>;
573 mediatek,pull-down-adv = <01>;
577 mmc0_pins_uhs: mmc0-pins-uhs {
579 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
580 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
581 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
582 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
583 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
584 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
585 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
586 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
587 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
589 drive-strength = <MTK_DRIVE_14mA>;
590 mediatek,pull-up-adv = <01>;
594 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
595 drive-strength = <MTK_DRIVE_14mA>;
596 mediatek,pull-down-adv = <10>;
600 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
601 drive-strength = <MTK_DRIVE_14mA>;
602 mediatek,pull-down-adv = <10>;
606 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
607 drive-strength = <MTK_DRIVE_14mA>;
608 mediatek,pull-up-adv = <01>;
612 mmc1_pins_default: mmc1-pins-default {
614 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
615 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
616 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
617 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
618 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
620 mediatek,pull-up-adv = <10>;
624 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
626 mediatek,pull-down-adv = <10>;
630 mmc1_pins_uhs: mmc1-pins-uhs {
632 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
633 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
634 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
635 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
636 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
637 drive-strength = <MTK_DRIVE_6mA>;
639 mediatek,pull-up-adv = <10>;
643 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
644 drive-strength = <MTK_DRIVE_8mA>;
645 mediatek,pull-down-adv = <10>;
650 panel_pins_default: panel_pins_default {
652 pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
658 pwm0_pin_default: pwm0_pin_default {
660 pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
665 pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
671 pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
672 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
678 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
679 <PINMUX_GPIO86__FUNC_GPIO86>,
680 <PINMUX_GPIO87__FUNC_SPI0_MO>,
681 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
688 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
689 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
690 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
691 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
698 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
699 <PINMUX_GPIO1__FUNC_SPI2_MO>,
700 <PINMUX_GPIO2__FUNC_SPI2_CLK>;
704 pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
705 mediatek,pull-down-adv = <00>;
711 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
712 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
713 <PINMUX_GPIO23__FUNC_SPI3_MO>,
714 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
721 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
722 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
723 <PINMUX_GPIO19__FUNC_SPI4_MO>,
724 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
731 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
732 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
733 <PINMUX_GPIO15__FUNC_SPI5_MO>,
734 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
739 uart0_pins_default: uart0-pins-default {
741 pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
746 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
750 uart1_pins_default: uart1-pins-default {
752 pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
757 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
760 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
764 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
769 uart1_pins_sleep: uart1-pins-sleep {
771 pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
776 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
779 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
783 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
788 wifi_pins_pwrseq: wifi-pins-pwrseq {
790 pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
795 wifi_pins_wakeup: wifi-pins-wakeup {
797 pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
805 pinctrl-names = "default";
806 pinctrl-0 = <&pwm0_pin_default>;
811 pinctrl-names = "default";
812 pinctrl-0 = <&scp_pins>;
815 compatible = "google,cros-ec-rpmsg";
816 mediatek,rpmsg-name = "cros-ec-rpmsg";
821 domain-supply = <&mt6358_vsram_gpu_reg>;
825 domain-supply = <&mt6358_vgpu_reg>;
833 pinctrl-names = "default";
834 pinctrl-0 = <&spi0_pins>;
835 mediatek,pad-select = <0>;
837 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
840 compatible = "google,cr50";
842 spi-max-frequency = <1000000>;
843 pinctrl-names = "default";
844 pinctrl-0 = <&h1_int_od_l>;
845 interrupt-parent = <&pio>;
846 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
851 pinctrl-names = "default";
852 pinctrl-0 = <&spi1_pins>;
853 mediatek,pad-select = <0>;
857 compatible = "winbond,w25q64dw", "jedec,spi-nor";
859 spi-max-frequency = <25000000>;
864 pinctrl-names = "default";
865 pinctrl-0 = <&spi2_pins>;
866 mediatek,pad-select = <0>;
870 compatible = "google,cros-ec-spi";
872 spi-max-frequency = <3000000>;
873 interrupt-parent = <&pio>;
874 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
875 pinctrl-names = "default";
876 pinctrl-0 = <&ec_ap_int_odl>;
878 i2c_tunnel: i2c-tunnel {
879 compatible = "google,cros-ec-i2c-tunnel";
880 google,remote-bus = <1>;
881 #address-cells = <1>;
885 usbc_extcon: extcon0 {
886 compatible = "google,extcon-usbc-cros-ec";
887 google,usb-port-id = <0>;
891 compatible = "google,cros-cbas";
895 compatible = "google,cros-ec-typec";
896 #address-cells = <1>;
899 usb_c0: connector@0 {
900 compatible = "usb-c-connector";
904 try-power-role = "sink";
911 pinctrl-names = "default";
912 pinctrl-0 = <&spi3_pins>;
913 mediatek,pad-select = <0>;
918 pinctrl-names = "default";
919 pinctrl-0 = <&spi4_pins>;
920 mediatek,pad-select = <0>;
925 pinctrl-names = "default";
926 pinctrl-0 = <&spi5_pins>;
927 mediatek,pad-select = <0>;
934 vusb33-supply = <&mt6358_vusb_reg>;
940 polling-delay = <1000>; /* milliseconds */
941 polling-delay-passive = <0>; /* milliseconds */
942 thermal-sensors = <&tboard_thermistor1>;
946 polling-delay = <1000>; /* milliseconds */
947 polling-delay-passive = <0>; /* milliseconds */
948 thermal-sensors = <&tboard_thermistor2>;
957 pinctrl-names = "default";
958 pinctrl-0 = <&uart0_pins_default>;
963 pinctrl-names = "default", "sleep";
964 pinctrl-0 = <&uart1_pins_default>;
965 pinctrl-1 = <&uart1_pins_sleep>;
967 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
968 <&pio 121 IRQ_TYPE_EDGE_FALLING>;
970 bluetooth: bluetooth {
971 pinctrl-names = "default";
972 pinctrl-0 = <&bt_pins>;
974 compatible = "qcom,qca6174-bt";
975 enable-gpios = <&pio 120 0>;
977 firmware-name = "nvm_00440302_i2s.bin";
982 #address-cells = <1>;
984 vusb33-supply = <&mt6358_vusb_reg>;
988 compatible = "usb5e3,610";
993 #include <arm/cros-ec-keyboard.dtsi>
994 #include <arm/cros-ec-sbs.dtsi>