1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Ben Ho <ben.ho@mediatek.com>
5 * Erin Lo <erin.lo@mediatek.com>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
21 stdout-path = "serial0:115200n8";
24 backlight_lcd0: backlight_lcd0 {
25 compatible = "pwm-backlight";
26 pwms = <&pwm0 0 500000>;
27 power-supply = <&bl_pp5000>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
36 device_type = "memory";
37 reg = <0 0x40000000 0 0x80000000>;
41 compatible = "fixed-clock";
43 clock-frequency = <32768>;
44 clock-output-names = "clk32k";
47 it6505_pp18_reg: regulator0 {
48 compatible = "regulator-fixed";
49 regulator-name = "it6505_pp18";
50 regulator-min-microvolt = <1800000>;
51 regulator-max-microvolt = <1800000>;
56 lcd_pp3300: regulator1 {
57 compatible = "regulator-fixed";
58 regulator-name = "lcd_pp3300";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
65 bl_pp5000: regulator2 {
66 compatible = "regulator-fixed";
67 regulator-name = "bl_pp5000";
68 regulator-min-microvolt = <5000000>;
69 regulator-max-microvolt = <5000000>;
74 mmc1_fixed_power: regulator3 {
75 compatible = "regulator-fixed";
76 regulator-name = "mmc1_power";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
81 mmc1_fixed_io: regulator4 {
82 compatible = "regulator-fixed";
83 regulator-name = "mmc1_io";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <1800000>;
88 pp1800_alw: regulator5 {
89 compatible = "regulator-fixed";
90 regulator-name = "pp1800_alw";
93 regulator-min-microvolt = <1800000>;
94 regulator-max-microvolt = <1800000>;
97 pp3300_alw: regulator6 {
98 compatible = "regulator-fixed";
99 regulator-name = "pp3300_alw";
102 regulator-min-microvolt = <3300000>;
103 regulator-max-microvolt = <3300000>;
106 reserved_memory: reserved-memory {
107 #address-cells = <2>;
111 scp_mem_reserved: scp_mem_region {
112 compatible = "shared-dma-pool";
113 reg = <0 0x50000000 0 0x2900000>;
118 sound: mt8183-sound {
119 mediatek,platform = <&afe>;
120 pinctrl-names = "default",
123 pinctrl-0 = <&aud_pins_default>;
124 pinctrl-1 = <&aud_pins_tdm_out_on>;
125 pinctrl-2 = <&aud_pins_tdm_out_off>;
130 compatible = "linux,bt-sco";
133 wifi_pwrseq: wifi-pwrseq {
134 compatible = "mmc-pwrseq-simple";
135 pinctrl-names = "default";
136 pinctrl-0 = <&wifi_pins_pwrseq>;
138 /* Toggle WIFI_ENABLE to reset the chip. */
139 reset-gpios = <&pio 119 1>;
142 wifi_wakeup: wifi-wakeup {
143 compatible = "gpio-keys";
144 pinctrl-names = "default";
145 pinctrl-0 = <&wifi_pins_wakeup>;
148 label = "Wake on WiFi";
149 gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
150 linux,code = <KEY_WAKEUP>;
155 tboard_thermistor1: thermal-sensor1 {
156 compatible = "generic-adc-thermal";
157 #thermal-sensor-cells = <0>;
158 io-channels = <&auxadc 0>;
159 io-channel-names = "sensor-channel";
160 temperature-lookup-table = < (-5000) 1553
189 tboard_thermistor2: thermal-sensor2 {
190 compatible = "generic-adc-thermal";
191 #thermal-sensor-cells = <0>;
192 io-channels = <&auxadc 1>;
193 io-channel-names = "sensor-channel";
194 temperature-lookup-table = < (-5000) 1553
234 proc-supply = <&mt6358_vproc12_reg>;
238 proc-supply = <&mt6358_vproc12_reg>;
242 proc-supply = <&mt6358_vproc12_reg>;
246 proc-supply = <&mt6358_vproc12_reg>;
250 proc-supply = <&mt6358_vproc12_reg>;
254 proc-supply = <&mt6358_vproc11_reg>;
258 proc-supply = <&mt6358_vproc11_reg>;
262 proc-supply = <&mt6358_vproc11_reg>;
266 proc-supply = <&mt6358_vproc11_reg>;
271 #address-cells = <1>;
274 /* compatible will be set in board dts */
276 enable-gpios = <&pio 45 0>;
277 pinctrl-names = "default";
278 pinctrl-0 = <&panel_pins_default>;
279 avdd-supply = <&ppvarn_lcd>;
280 avee-supply = <&ppvarp_lcd>;
281 pp1800-supply = <&pp1800_lcd>;
282 backlight = <&backlight_lcd0>;
286 remote-endpoint = <&dsi_out>;
294 remote-endpoint = <&panel_in>;
301 mali-supply = <&mt6358_vgpu_reg>;
302 sram-supply = <&mt6358_vsram_gpu_reg>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&i2c0_pins>;
309 clock-frequency = <400000>;
310 #address-cells = <1>;
315 pinctrl-names = "default";
316 pinctrl-0 = <&i2c1_pins>;
318 clock-frequency = <100000>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&i2c3_pins>;
325 clock-frequency = <100000>;
326 #address-cells = <1>;
331 pinctrl-names = "default";
332 pinctrl-0 = <&i2c5_pins>;
334 clock-frequency = <100000>;
335 #address-cells = <1>;
340 pinctrl-names = "default";
341 pinctrl-0 = <&i2c6_pins>;
343 clock-frequency = <100000>;
352 pinctrl-names = "default", "state_uhs";
353 pinctrl-0 = <&mmc0_pins_default>;
354 pinctrl-1 = <&mmc0_pins_uhs>;
356 max-frequency = <200000000>;
363 hs400-ds-delay = <0x12814>;
364 vmmc-supply = <&mt6358_vemc_reg>;
365 vqmmc-supply = <&mt6358_vio18_reg>;
366 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
367 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
373 pinctrl-names = "default", "state_uhs";
374 pinctrl-0 = <&mmc1_pins_default>;
375 pinctrl-1 = <&mmc1_pins_uhs>;
376 vmmc-supply = <&mmc1_fixed_power>;
377 vqmmc-supply = <&mmc1_fixed_io>;
378 mmc-pwrseq = <&wifi_pwrseq>;
380 max-frequency = <200000000>;
385 keep-power-in-suspend;
391 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
392 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
393 #address-cells = <1>;
396 qca_wifi: qca-wifi@1 {
397 compatible = "qcom,ath10k";
407 Avdd-supply = <&mt6358_vaud28_reg>;
411 regulator-min-microvolt = <2700000>;
412 regulator-max-microvolt = <2700000>;
416 regulator-min-microvolt = <2700000>;
417 regulator-max-microvolt = <2700000>;
421 aud_pins_default: audiopins {
423 pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
424 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
425 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
426 <PINMUX_GPIO102__FUNC_I2S2_DI>,
427 <PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
428 <PINMUX_GPIO89__FUNC_I2S5_BCK>,
429 <PINMUX_GPIO90__FUNC_I2S5_LRCK>,
430 <PINMUX_GPIO91__FUNC_I2S5_DO>,
431 <PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
432 <PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
433 <PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
434 <PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
435 <PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
436 <PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
437 <PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
438 <PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
439 <PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
443 aud_pins_tdm_out_on: audiotdmouton {
445 pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
446 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
447 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
448 <PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
449 <PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
450 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
451 drive-strength = <MTK_DRIVE_6mA>;
455 aud_pins_tdm_out_off: audiotdmoutoff {
457 pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
458 <PINMUX_GPIO170__FUNC_GPIO170>,
459 <PINMUX_GPIO171__FUNC_GPIO171>,
460 <PINMUX_GPIO172__FUNC_GPIO172>,
461 <PINMUX_GPIO173__FUNC_GPIO173>,
462 <PINMUX_GPIO10__FUNC_GPIO10>;
465 drive-strength = <MTK_DRIVE_2mA>;
471 pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
476 ec_ap_int_odl: ec_ap_int_odl {
478 pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
484 h1_int_od_l: h1_int_od_l {
486 pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
493 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
494 <PINMUX_GPIO83__FUNC_SCL0>;
495 mediatek,pull-up-adv = <3>;
496 mediatek,drive-strength-adv = <00>;
502 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
503 <PINMUX_GPIO84__FUNC_SCL1>;
504 mediatek,pull-up-adv = <3>;
505 mediatek,drive-strength-adv = <00>;
511 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
512 <PINMUX_GPIO104__FUNC_SDA2>;
514 mediatek,drive-strength-adv = <00>;
520 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
521 <PINMUX_GPIO51__FUNC_SDA3>;
522 mediatek,pull-up-adv = <3>;
523 mediatek,drive-strength-adv = <00>;
529 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
530 <PINMUX_GPIO106__FUNC_SDA4>;
532 mediatek,drive-strength-adv = <00>;
538 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
539 <PINMUX_GPIO49__FUNC_SDA5>;
540 mediatek,pull-up-adv = <3>;
541 mediatek,drive-strength-adv = <00>;
547 pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
548 <PINMUX_GPIO12__FUNC_SDA6>;
553 mmc0_pins_default: mmc0-pins-default {
555 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
556 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
557 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
558 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
559 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
560 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
561 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
562 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
563 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
565 drive-strength = <MTK_DRIVE_14mA>;
566 mediatek,pull-up-adv = <01>;
570 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
571 drive-strength = <MTK_DRIVE_14mA>;
572 mediatek,pull-down-adv = <10>;
576 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
577 drive-strength = <MTK_DRIVE_14mA>;
578 mediatek,pull-down-adv = <01>;
582 mmc0_pins_uhs: mmc0-pins-uhs {
584 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
585 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
586 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
587 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
588 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
589 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
590 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
591 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
592 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
594 drive-strength = <MTK_DRIVE_14mA>;
595 mediatek,pull-up-adv = <01>;
599 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
600 drive-strength = <MTK_DRIVE_14mA>;
601 mediatek,pull-down-adv = <10>;
605 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
606 drive-strength = <MTK_DRIVE_14mA>;
607 mediatek,pull-down-adv = <10>;
611 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
612 drive-strength = <MTK_DRIVE_14mA>;
613 mediatek,pull-up-adv = <01>;
617 mmc1_pins_default: mmc1-pins-default {
619 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
620 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
621 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
622 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
623 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
625 mediatek,pull-up-adv = <10>;
629 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
631 mediatek,pull-down-adv = <10>;
635 mmc1_pins_uhs: mmc1-pins-uhs {
637 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
638 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
639 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
640 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
641 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
642 drive-strength = <MTK_DRIVE_6mA>;
644 mediatek,pull-up-adv = <10>;
648 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
649 drive-strength = <MTK_DRIVE_8mA>;
650 mediatek,pull-down-adv = <10>;
655 panel_pins_default: panel_pins_default {
657 pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
663 pwm0_pin_default: pwm0_pin_default {
665 pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
670 pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
676 pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
677 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
683 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
684 <PINMUX_GPIO86__FUNC_GPIO86>,
685 <PINMUX_GPIO87__FUNC_SPI0_MO>,
686 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
693 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
694 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
695 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
696 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
703 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
704 <PINMUX_GPIO1__FUNC_SPI2_MO>,
705 <PINMUX_GPIO2__FUNC_SPI2_CLK>;
709 pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
710 mediatek,pull-down-adv = <00>;
716 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
717 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
718 <PINMUX_GPIO23__FUNC_SPI3_MO>,
719 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
726 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
727 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
728 <PINMUX_GPIO19__FUNC_SPI4_MO>,
729 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
736 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
737 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
738 <PINMUX_GPIO15__FUNC_SPI5_MO>,
739 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
744 uart0_pins_default: uart0-pins-default {
746 pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
751 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
755 uart1_pins_default: uart1-pins-default {
757 pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
762 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
765 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
769 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
774 uart1_pins_sleep: uart1-pins-sleep {
776 pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
781 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
784 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
788 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
793 wifi_pins_pwrseq: wifi-pins-pwrseq {
795 pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
800 wifi_pins_wakeup: wifi-pins-wakeup {
802 pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
810 pinctrl-names = "default";
811 pinctrl-0 = <&pwm0_pin_default>;
816 pinctrl-names = "default";
817 pinctrl-0 = <&scp_pins>;
820 compatible = "google,cros-ec-rpmsg";
821 mediatek,rpmsg-name = "cros-ec-rpmsg";
826 domain-supply = <&mt6358_vsram_gpu_reg>;
830 domain-supply = <&mt6358_vgpu_reg>;
838 pinctrl-names = "default";
839 pinctrl-0 = <&spi0_pins>;
840 mediatek,pad-select = <0>;
842 cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
845 compatible = "google,cr50";
847 spi-max-frequency = <1000000>;
848 pinctrl-names = "default";
849 pinctrl-0 = <&h1_int_od_l>;
850 interrupt-parent = <&pio>;
851 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
856 pinctrl-names = "default";
857 pinctrl-0 = <&spi1_pins>;
858 mediatek,pad-select = <0>;
862 compatible = "winbond,w25q64dw", "jedec,spi-nor";
864 spi-max-frequency = <25000000>;
869 pinctrl-names = "default";
870 pinctrl-0 = <&spi2_pins>;
871 mediatek,pad-select = <0>;
875 compatible = "google,cros-ec-spi";
877 spi-max-frequency = <3000000>;
878 interrupt-parent = <&pio>;
879 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
880 pinctrl-names = "default";
881 pinctrl-0 = <&ec_ap_int_odl>;
883 i2c_tunnel: i2c-tunnel {
884 compatible = "google,cros-ec-i2c-tunnel";
885 google,remote-bus = <1>;
886 #address-cells = <1>;
890 usbc_extcon: extcon0 {
891 compatible = "google,extcon-usbc-cros-ec";
892 google,usb-port-id = <0>;
896 compatible = "google,cros-cbas";
900 compatible = "google,cros-ec-typec";
901 #address-cells = <1>;
904 usb_c0: connector@0 {
905 compatible = "usb-c-connector";
909 try-power-role = "sink";
916 pinctrl-names = "default";
917 pinctrl-0 = <&spi3_pins>;
918 mediatek,pad-select = <0>;
923 pinctrl-names = "default";
924 pinctrl-0 = <&spi4_pins>;
925 mediatek,pad-select = <0>;
930 pinctrl-names = "default";
931 pinctrl-0 = <&spi5_pins>;
932 mediatek,pad-select = <0>;
939 vusb33-supply = <&mt6358_vusb_reg>;
945 polling-delay = <1000>; /* milliseconds */
946 polling-delay-passive = <0>; /* milliseconds */
947 thermal-sensors = <&tboard_thermistor1>;
951 polling-delay = <1000>; /* milliseconds */
952 polling-delay-passive = <0>; /* milliseconds */
953 thermal-sensors = <&tboard_thermistor2>;
962 pinctrl-names = "default";
963 pinctrl-0 = <&uart0_pins_default>;
968 pinctrl-names = "default", "sleep";
969 pinctrl-0 = <&uart1_pins_default>;
970 pinctrl-1 = <&uart1_pins_sleep>;
972 interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
973 <&pio 121 IRQ_TYPE_EDGE_FALLING>;
975 bluetooth: bluetooth {
976 pinctrl-names = "default";
977 pinctrl-0 = <&bt_pins>;
979 compatible = "qcom,qca6174-bt";
980 enable-gpios = <&pio 120 0>;
982 firmware-name = "nvm_00440302_i2s.bin";
987 #address-cells = <1>;
989 vusb33-supply = <&mt6358_vusb_reg>;
993 compatible = "usb5e3,610";
998 #include <arm/cros-ec-keyboard.dtsi>
999 #include <arm/cros-ec-sbs.dtsi>