f8bea83d89d6df17e3ad09efcc83044323d8182e
[platform/kernel/linux-starfive.git] / arch / arm64 / boot / dts / mediatek / mt8183-kukui.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3  * Copyright (c) 2018 MediaTek Inc.
4  * Author: Ben Ho <ben.ho@mediatek.com>
5  *         Erin Lo <erin.lo@mediatek.com>
6  */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
12
13 / {
14         aliases {
15                 serial0 = &uart0;
16                 mmc0 = &mmc0;
17                 mmc1 = &mmc1;
18         };
19
20         chosen {
21                 stdout-path = "serial0:115200n8";
22         };
23
24         backlight_lcd0: backlight_lcd0 {
25                 compatible = "pwm-backlight";
26                 pwms = <&pwm0 0 500000>;
27                 power-supply = <&bl_pp5000>;
28                 enable-gpios = <&pio 176 0>;
29                 brightness-levels = <0 1023>;
30                 num-interpolated-steps = <1023>;
31                 default-brightness-level = <576>;
32                 status = "okay";
33         };
34
35         memory@40000000 {
36                 device_type = "memory";
37                 reg = <0 0x40000000 0 0x80000000>;
38         };
39
40         clk32k: oscillator1 {
41                 compatible = "fixed-clock";
42                 #clock-cells = <0>;
43                 clock-frequency = <32768>;
44                 clock-output-names = "clk32k";
45         };
46
47         it6505_pp18_reg: regulator0 {
48                 compatible = "regulator-fixed";
49                 regulator-name = "it6505_pp18";
50                 regulator-min-microvolt = <1800000>;
51                 regulator-max-microvolt = <1800000>;
52                 gpio = <&pio 178 0>;
53                 enable-active-high;
54         };
55
56         lcd_pp3300: regulator1 {
57                 compatible = "regulator-fixed";
58                 regulator-name = "lcd_pp3300";
59                 regulator-min-microvolt = <3300000>;
60                 regulator-max-microvolt = <3300000>;
61                 regulator-always-on;
62                 regulator-boot-on;
63         };
64
65         bl_pp5000: regulator2 {
66                 compatible = "regulator-fixed";
67                 regulator-name = "bl_pp5000";
68                 regulator-min-microvolt = <5000000>;
69                 regulator-max-microvolt = <5000000>;
70                 regulator-always-on;
71                 regulator-boot-on;
72         };
73
74         mmc1_fixed_power: regulator3 {
75                 compatible = "regulator-fixed";
76                 regulator-name = "mmc1_power";
77                 regulator-min-microvolt = <3300000>;
78                 regulator-max-microvolt = <3300000>;
79         };
80
81         mmc1_fixed_io: regulator4 {
82                 compatible = "regulator-fixed";
83                 regulator-name = "mmc1_io";
84                 regulator-min-microvolt = <1800000>;
85                 regulator-max-microvolt = <1800000>;
86         };
87
88         pp1800_alw: regulator5 {
89                 compatible = "regulator-fixed";
90                 regulator-name = "pp1800_alw";
91                 regulator-always-on;
92                 regulator-boot-on;
93                 regulator-min-microvolt = <1800000>;
94                 regulator-max-microvolt = <1800000>;
95         };
96
97         pp3300_alw: regulator6 {
98                 compatible = "regulator-fixed";
99                 regulator-name = "pp3300_alw";
100                 regulator-always-on;
101                 regulator-boot-on;
102                 regulator-min-microvolt = <3300000>;
103                 regulator-max-microvolt = <3300000>;
104         };
105
106         reserved_memory: reserved-memory {
107                 #address-cells = <2>;
108                 #size-cells = <2>;
109                 ranges;
110
111                 scp_mem_reserved: memory@50000000 {
112                         compatible = "shared-dma-pool";
113                         reg = <0 0x50000000 0 0x2900000>;
114                         no-map;
115                 };
116         };
117
118         sound: mt8183-sound {
119                 mediatek,platform = <&afe>;
120                 pinctrl-names = "default",
121                                 "aud_tdm_out_on",
122                                 "aud_tdm_out_off";
123                 pinctrl-0 = <&aud_pins_default>;
124                 pinctrl-1 = <&aud_pins_tdm_out_on>;
125                 pinctrl-2 = <&aud_pins_tdm_out_off>;
126                 status = "okay";
127         };
128
129         btsco: bt-sco {
130                 compatible = "linux,bt-sco";
131         };
132
133         wifi_pwrseq: wifi-pwrseq {
134                 compatible = "mmc-pwrseq-simple";
135                 pinctrl-names = "default";
136                 pinctrl-0 = <&wifi_pins_pwrseq>;
137
138                 /* Toggle WIFI_ENABLE to reset the chip. */
139                 reset-gpios = <&pio 119 1>;
140         };
141
142         wifi_wakeup: wifi-wakeup {
143                 compatible = "gpio-keys";
144                 pinctrl-names = "default";
145                 pinctrl-0 = <&wifi_pins_wakeup>;
146
147                 button-wowlan {
148                         label = "Wake on WiFi";
149                         gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
150                         linux,code = <KEY_WAKEUP>;
151                         wakeup-source;
152                 };
153         };
154
155         tboard_thermistor1: thermal-sensor1 {
156                 compatible = "generic-adc-thermal";
157                 #thermal-sensor-cells = <0>;
158                 io-channels = <&auxadc 0>;
159                 io-channel-names = "sensor-channel";
160                 temperature-lookup-table = <    (-5000) 1553
161                                                 0 1488
162                                                 5000 1412
163                                                 10000 1326
164                                                 15000 1232
165                                                 20000 1132
166                                                 25000 1029
167                                                 30000 925
168                                                 35000 823
169                                                 40000 726
170                                                 45000 635
171                                                 50000 552
172                                                 55000 478
173                                                 60000 411
174                                                 65000 353
175                                                 70000 303
176                                                 75000 260
177                                                 80000 222
178                                                 85000 190
179                                                 90000 163
180                                                 95000 140
181                                                 100000 121
182                                                 105000 104
183                                                 110000 90
184                                                 115000 78
185                                                 120000 67
186                                                 125000 59>;
187         };
188
189         tboard_thermistor2: thermal-sensor2 {
190                 compatible = "generic-adc-thermal";
191                 #thermal-sensor-cells = <0>;
192                 io-channels = <&auxadc 1>;
193                 io-channel-names = "sensor-channel";
194                 temperature-lookup-table = <    (-5000) 1553
195                                                 0 1488
196                                                 5000 1412
197                                                 10000 1326
198                                                 15000 1232
199                                                 20000 1132
200                                                 25000 1029
201                                                 30000 925
202                                                 35000 823
203                                                 40000 726
204                                                 45000 635
205                                                 50000 552
206                                                 55000 478
207                                                 60000 411
208                                                 65000 353
209                                                 70000 303
210                                                 75000 260
211                                                 80000 222
212                                                 85000 190
213                                                 90000 163
214                                                 95000 140
215                                                 100000 121
216                                                 105000 104
217                                                 110000 90
218                                                 115000 78
219                                                 120000 67
220                                                 125000 59>;
221         };
222 };
223
224 &afe {
225         i2s3-share = "I2S2";
226         i2s0-share = "I2S5";
227 };
228
229 &auxadc {
230         status = "okay";
231 };
232
233 &cci {
234         proc-supply = <&mt6358_vproc12_reg>;
235 };
236
237 &cpu0 {
238         proc-supply = <&mt6358_vproc12_reg>;
239 };
240
241 &cpu1 {
242         proc-supply = <&mt6358_vproc12_reg>;
243 };
244
245 &cpu2 {
246         proc-supply = <&mt6358_vproc12_reg>;
247 };
248
249 &cpu3 {
250         proc-supply = <&mt6358_vproc12_reg>;
251 };
252
253 &cpu4 {
254         proc-supply = <&mt6358_vproc11_reg>;
255 };
256
257 &cpu5 {
258         proc-supply = <&mt6358_vproc11_reg>;
259 };
260
261 &cpu6 {
262         proc-supply = <&mt6358_vproc11_reg>;
263 };
264
265 &cpu7 {
266         proc-supply = <&mt6358_vproc11_reg>;
267 };
268
269 &dsi0 {
270         status = "okay";
271         #address-cells = <1>;
272         #size-cells = <0>;
273         panel: panel@0 {
274                 /* compatible will be set in board dts */
275                 reg = <0>;
276                 enable-gpios = <&pio 45 0>;
277                 pinctrl-names = "default";
278                 pinctrl-0 = <&panel_pins_default>;
279                 avdd-supply = <&ppvarn_lcd>;
280                 avee-supply = <&ppvarp_lcd>;
281                 pp1800-supply = <&pp1800_lcd>;
282                 backlight = <&backlight_lcd0>;
283                 rotation = <270>;
284                 port {
285                         panel_in: endpoint {
286                                 remote-endpoint = <&dsi_out>;
287                         };
288                 };
289         };
290
291         ports {
292                 port {
293                         dsi_out: endpoint {
294                                 remote-endpoint = <&panel_in>;
295                         };
296                 };
297         };
298 };
299
300 &gic {
301         mediatek,broken-save-restore-fw;
302 };
303
304 &gpu {
305         mali-supply = <&mt6358_vgpu_reg>;
306         sram-supply = <&mt6358_vsram_gpu_reg>;
307 };
308
309 &i2c0 {
310         pinctrl-names = "default";
311         pinctrl-0 = <&i2c0_pins>;
312         status = "okay";
313         clock-frequency = <400000>;
314         #address-cells = <1>;
315         #size-cells = <0>;
316 };
317
318 &i2c1 {
319         pinctrl-names = "default";
320         pinctrl-0 = <&i2c1_pins>;
321         status = "okay";
322         clock-frequency = <100000>;
323 };
324
325 &i2c3 {
326         pinctrl-names = "default";
327         pinctrl-0 = <&i2c3_pins>;
328         status = "okay";
329         clock-frequency = <100000>;
330         #address-cells = <1>;
331         #size-cells = <0>;
332 };
333
334 &i2c5 {
335         pinctrl-names = "default";
336         pinctrl-0 = <&i2c5_pins>;
337         status = "okay";
338         clock-frequency = <100000>;
339         #address-cells = <1>;
340         #size-cells = <0>;
341 };
342
343 &i2c6 {
344         pinctrl-names = "default";
345         pinctrl-0 = <&i2c6_pins>;
346         status = "okay";
347         clock-frequency = <100000>;
348 };
349
350 &mipi_tx0 {
351         status = "okay";
352 };
353
354 &mmc0 {
355         status = "okay";
356         pinctrl-names = "default", "state_uhs";
357         pinctrl-0 = <&mmc0_pins_default>;
358         pinctrl-1 = <&mmc0_pins_uhs>;
359         bus-width = <8>;
360         max-frequency = <200000000>;
361         cap-mmc-highspeed;
362         mmc-hs200-1_8v;
363         mmc-hs400-1_8v;
364         cap-mmc-hw-reset;
365         no-sdio;
366         no-sd;
367         hs400-ds-delay = <0x12814>;
368         vmmc-supply = <&mt6358_vemc_reg>;
369         vqmmc-supply = <&mt6358_vio18_reg>;
370         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
371         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
372         non-removable;
373 };
374
375 &mmc1 {
376         status = "okay";
377         pinctrl-names = "default", "state_uhs";
378         pinctrl-0 = <&mmc1_pins_default>;
379         pinctrl-1 = <&mmc1_pins_uhs>;
380         vmmc-supply = <&mmc1_fixed_power>;
381         vqmmc-supply = <&mmc1_fixed_io>;
382         mmc-pwrseq = <&wifi_pwrseq>;
383         bus-width = <4>;
384         max-frequency = <200000000>;
385         drv-type = <2>;
386         cap-sd-highspeed;
387         sd-uhs-sdr50;
388         sd-uhs-sdr104;
389         keep-power-in-suspend;
390         wakeup-source;
391         cap-sdio-irq;
392         non-removable;
393         no-mmc;
394         no-sd;
395         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
396         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
397         #address-cells = <1>;
398         #size-cells = <0>;
399
400         qca_wifi: qca-wifi@1 {
401                 compatible = "qcom,ath10k";
402                 reg = <1>;
403         };
404 };
405
406 &mt6358_vdram2_reg {
407         regulator-always-on;
408 };
409
410 &mt6358codec {
411         Avdd-supply = <&mt6358_vaud28_reg>;
412 };
413
414 &mt6358_vsim1_reg {
415         regulator-min-microvolt = <2700000>;
416         regulator-max-microvolt = <2700000>;
417 };
418
419 &mt6358_vsim2_reg {
420         regulator-min-microvolt = <2700000>;
421         regulator-max-microvolt = <2700000>;
422 };
423
424 &pio {
425         aud_pins_default: audiopins {
426                 pins_bus {
427                         pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
428                                 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
429                                 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
430                                 <PINMUX_GPIO102__FUNC_I2S2_DI>,
431                                 <PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
432                                 <PINMUX_GPIO89__FUNC_I2S5_BCK>,
433                                 <PINMUX_GPIO90__FUNC_I2S5_LRCK>,
434                                 <PINMUX_GPIO91__FUNC_I2S5_DO>,
435                                 <PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
436                                 <PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
437                                 <PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
438                                 <PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
439                                 <PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
440                                 <PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
441                                 <PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
442                                 <PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
443                                 <PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
444                 };
445         };
446
447         aud_pins_tdm_out_on: audiotdmouton {
448                 pins_bus {
449                         pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
450                                 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
451                                 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
452                                 <PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
453                                 <PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
454                                 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
455                         drive-strength = <MTK_DRIVE_6mA>;
456                 };
457         };
458
459         aud_pins_tdm_out_off: audiotdmoutoff {
460                 pins_bus {
461                         pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
462                                 <PINMUX_GPIO170__FUNC_GPIO170>,
463                                 <PINMUX_GPIO171__FUNC_GPIO171>,
464                                 <PINMUX_GPIO172__FUNC_GPIO172>,
465                                 <PINMUX_GPIO173__FUNC_GPIO173>,
466                                 <PINMUX_GPIO10__FUNC_GPIO10>;
467                         input-enable;
468                         bias-pull-down;
469                         drive-strength = <MTK_DRIVE_2mA>;
470                 };
471         };
472
473         bt_pins: bt-pins {
474                 pins_bt_en {
475                         pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
476                         output-low;
477                 };
478         };
479
480         ec_ap_int_odl: ec_ap_int_odl {
481                 pins1 {
482                         pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
483                         input-enable;
484                         bias-pull-up;
485                 };
486         };
487
488         h1_int_od_l: h1_int_od_l {
489                 pins1 {
490                         pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
491                         input-enable;
492                 };
493         };
494
495         i2c0_pins: i2c0 {
496                 pins_bus {
497                         pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
498                                  <PINMUX_GPIO83__FUNC_SCL0>;
499                         mediatek,pull-up-adv = <3>;
500                         mediatek,drive-strength-adv = <00>;
501                 };
502         };
503
504         i2c1_pins: i2c1 {
505                 pins_bus {
506                         pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
507                                  <PINMUX_GPIO84__FUNC_SCL1>;
508                         mediatek,pull-up-adv = <3>;
509                         mediatek,drive-strength-adv = <00>;
510                 };
511         };
512
513         i2c2_pins: i2c2 {
514                 pins_bus {
515                         pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
516                                  <PINMUX_GPIO104__FUNC_SDA2>;
517                         bias-disable;
518                         mediatek,drive-strength-adv = <00>;
519                 };
520         };
521
522         i2c3_pins: i2c3 {
523                 pins_bus {
524                         pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
525                                  <PINMUX_GPIO51__FUNC_SDA3>;
526                         mediatek,pull-up-adv = <3>;
527                         mediatek,drive-strength-adv = <00>;
528                 };
529         };
530
531         i2c4_pins: i2c4 {
532                 pins_bus {
533                         pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
534                                  <PINMUX_GPIO106__FUNC_SDA4>;
535                         bias-disable;
536                         mediatek,drive-strength-adv = <00>;
537                 };
538         };
539
540         i2c5_pins: i2c5 {
541                 pins_bus {
542                         pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
543                                  <PINMUX_GPIO49__FUNC_SDA5>;
544                         mediatek,pull-up-adv = <3>;
545                         mediatek,drive-strength-adv = <00>;
546                 };
547         };
548
549         i2c6_pins: i2c6 {
550                 pins_bus {
551                         pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
552                                  <PINMUX_GPIO12__FUNC_SDA6>;
553                         bias-disable;
554                 };
555         };
556
557         mmc0_pins_default: mmc0-pins-default {
558                 pins_cmd_dat {
559                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
560                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
561                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
562                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
563                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
564                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
565                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
566                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
567                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
568                         input-enable;
569                         drive-strength = <MTK_DRIVE_14mA>;
570                         mediatek,pull-up-adv = <01>;
571                 };
572
573                 pins_clk {
574                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
575                         drive-strength = <MTK_DRIVE_14mA>;
576                         mediatek,pull-down-adv = <10>;
577                 };
578
579                 pins_rst {
580                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
581                         drive-strength = <MTK_DRIVE_14mA>;
582                         mediatek,pull-down-adv = <01>;
583                 };
584         };
585
586         mmc0_pins_uhs: mmc0-pins-uhs {
587                 pins_cmd_dat {
588                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
589                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
590                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
591                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
592                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
593                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
594                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
595                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
596                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
597                         input-enable;
598                         drive-strength = <MTK_DRIVE_14mA>;
599                         mediatek,pull-up-adv = <01>;
600                 };
601
602                 pins_clk {
603                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
604                         drive-strength = <MTK_DRIVE_14mA>;
605                         mediatek,pull-down-adv = <10>;
606                 };
607
608                 pins_ds {
609                         pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
610                         drive-strength = <MTK_DRIVE_14mA>;
611                         mediatek,pull-down-adv = <10>;
612                 };
613
614                 pins_rst {
615                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
616                         drive-strength = <MTK_DRIVE_14mA>;
617                         mediatek,pull-up-adv = <01>;
618                 };
619         };
620
621         mmc1_pins_default: mmc1-pins-default {
622                 pins_cmd_dat {
623                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
624                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
625                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
626                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
627                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
628                         input-enable;
629                         mediatek,pull-up-adv = <10>;
630                 };
631
632                 pins_clk {
633                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
634                         input-enable;
635                         mediatek,pull-down-adv = <10>;
636                 };
637         };
638
639         mmc1_pins_uhs: mmc1-pins-uhs {
640                 pins_cmd_dat {
641                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
642                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
643                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
644                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
645                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
646                         drive-strength = <MTK_DRIVE_6mA>;
647                         input-enable;
648                         mediatek,pull-up-adv = <10>;
649                 };
650
651                 pins_clk {
652                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
653                         drive-strength = <MTK_DRIVE_8mA>;
654                         mediatek,pull-down-adv = <10>;
655                         input-enable;
656                 };
657         };
658
659         panel_pins_default: panel_pins_default {
660                 panel_reset {
661                         pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
662                         output-low;
663                         bias-pull-up;
664                 };
665         };
666
667         pwm0_pin_default: pwm0_pin_default {
668                 pins1 {
669                         pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
670                         output-high;
671                         bias-pull-up;
672                 };
673                 pins2 {
674                         pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
675                 };
676         };
677
678         scp_pins: scp {
679                 pins_scp_uart {
680                         pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
681                                  <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
682                 };
683         };
684
685         spi0_pins: spi0 {
686                 pins_spi{
687                         pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
688                                  <PINMUX_GPIO86__FUNC_GPIO86>,
689                                  <PINMUX_GPIO87__FUNC_SPI0_MO>,
690                                  <PINMUX_GPIO88__FUNC_SPI0_CLK>;
691                         bias-disable;
692                 };
693         };
694
695         spi1_pins: spi1 {
696                 pins_spi{
697                         pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
698                                  <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
699                                  <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
700                                  <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
701                         bias-disable;
702                 };
703         };
704
705         spi2_pins: spi2 {
706                 pins_spi{
707                         pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
708                                  <PINMUX_GPIO1__FUNC_SPI2_MO>,
709                                  <PINMUX_GPIO2__FUNC_SPI2_CLK>;
710                         bias-disable;
711                 };
712                 pins_spi_mi {
713                         pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
714                         mediatek,pull-down-adv = <00>;
715                 };
716         };
717
718         spi3_pins: spi3 {
719                 pins_spi{
720                         pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
721                                  <PINMUX_GPIO22__FUNC_SPI3_CSB>,
722                                  <PINMUX_GPIO23__FUNC_SPI3_MO>,
723                                  <PINMUX_GPIO24__FUNC_SPI3_CLK>;
724                         bias-disable;
725                 };
726         };
727
728         spi4_pins: spi4 {
729                 pins_spi{
730                         pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
731                                  <PINMUX_GPIO18__FUNC_SPI4_CSB>,
732                                  <PINMUX_GPIO19__FUNC_SPI4_MO>,
733                                  <PINMUX_GPIO20__FUNC_SPI4_CLK>;
734                         bias-disable;
735                 };
736         };
737
738         spi5_pins: spi5 {
739                 pins_spi{
740                         pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
741                                  <PINMUX_GPIO14__FUNC_SPI5_CSB>,
742                                  <PINMUX_GPIO15__FUNC_SPI5_MO>,
743                                  <PINMUX_GPIO16__FUNC_SPI5_CLK>;
744                         bias-disable;
745                 };
746         };
747
748         uart0_pins_default: uart0-pins-default {
749                 pins_rx {
750                         pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
751                         input-enable;
752                         bias-pull-up;
753                 };
754                 pins_tx {
755                         pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
756                 };
757         };
758
759         uart1_pins_default: uart1-pins-default {
760                 pins_rx {
761                         pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
762                         input-enable;
763                         bias-pull-up;
764                 };
765                 pins_tx {
766                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
767                 };
768                 pins_rts {
769                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
770                         output-enable;
771                 };
772                 pins_cts {
773                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
774                         input-enable;
775                 };
776         };
777
778         uart1_pins_sleep: uart1-pins-sleep {
779                 pins_rx {
780                         pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
781                         input-enable;
782                         bias-pull-up;
783                 };
784                 pins_tx {
785                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
786                 };
787                 pins_rts {
788                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
789                         output-enable;
790                 };
791                 pins_cts {
792                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
793                         input-enable;
794                 };
795         };
796
797         wifi_pins_pwrseq: wifi-pins-pwrseq {
798                 pins_wifi_enable {
799                         pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
800                         output-low;
801                 };
802         };
803
804         wifi_pins_wakeup: wifi-pins-wakeup {
805                 pins_wifi_wakeup {
806                         pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
807                         input-enable;
808                 };
809         };
810 };
811
812 &pwm0 {
813         status = "okay";
814         pinctrl-names = "default";
815         pinctrl-0 = <&pwm0_pin_default>;
816 };
817
818 &scp {
819         status = "okay";
820         pinctrl-names = "default";
821         pinctrl-0 = <&scp_pins>;
822
823         cros_ec {
824                 compatible = "google,cros-ec-rpmsg";
825                 mediatek,rpmsg-name = "cros-ec-rpmsg";
826         };
827 };
828
829 &mfg_async {
830         domain-supply = <&mt6358_vsram_gpu_reg>;
831 };
832
833 &mfg {
834         domain-supply = <&mt6358_vgpu_reg>;
835 };
836
837 &soc_data {
838         status = "okay";
839 };
840
841 &spi0 {
842         pinctrl-names = "default";
843         pinctrl-0 = <&spi0_pins>;
844         mediatek,pad-select = <0>;
845         status = "okay";
846         cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
847
848         cr50@0 {
849                 compatible = "google,cr50";
850                 reg = <0>;
851                 spi-max-frequency = <1000000>;
852                 pinctrl-names = "default";
853                 pinctrl-0 = <&h1_int_od_l>;
854                 interrupt-parent = <&pio>;
855                 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
856         };
857 };
858
859 &spi1 {
860         pinctrl-names = "default";
861         pinctrl-0 = <&spi1_pins>;
862         mediatek,pad-select = <0>;
863         status = "okay";
864
865         w25q64dw: flash@0 {
866                 compatible = "winbond,w25q64dw", "jedec,spi-nor";
867                 reg = <0>;
868                 spi-max-frequency = <25000000>;
869         };
870 };
871
872 &spi2 {
873         pinctrl-names = "default";
874         pinctrl-0 = <&spi2_pins>;
875         mediatek,pad-select = <0>;
876         status = "okay";
877
878         cros_ec: cros-ec@0 {
879                 compatible = "google,cros-ec-spi";
880                 reg = <0>;
881                 spi-max-frequency = <3000000>;
882                 interrupt-parent = <&pio>;
883                 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
884                 pinctrl-names = "default";
885                 pinctrl-0 = <&ec_ap_int_odl>;
886
887                 i2c_tunnel: i2c-tunnel {
888                         compatible = "google,cros-ec-i2c-tunnel";
889                         google,remote-bus = <1>;
890                         #address-cells = <1>;
891                         #size-cells = <0>;
892                 };
893
894                 usbc_extcon: extcon0 {
895                         compatible = "google,extcon-usbc-cros-ec";
896                         google,usb-port-id = <0>;
897                 };
898
899                 cbas {
900                         compatible = "google,cros-cbas";
901                 };
902
903                 typec {
904                         compatible = "google,cros-ec-typec";
905                         #address-cells = <1>;
906                         #size-cells = <0>;
907
908                         usb_c0: connector@0 {
909                                 compatible = "usb-c-connector";
910                                 reg = <0>;
911                                 power-role = "dual";
912                                 data-role = "host";
913                                 try-power-role = "sink";
914                         };
915                 };
916         };
917 };
918
919 &spi3 {
920         pinctrl-names = "default";
921         pinctrl-0 = <&spi3_pins>;
922         mediatek,pad-select = <0>;
923         status = "disabled";
924 };
925
926 &spi4 {
927         pinctrl-names = "default";
928         pinctrl-0 = <&spi4_pins>;
929         mediatek,pad-select = <0>;
930         status = "disabled";
931 };
932
933 &spi5 {
934         pinctrl-names = "default";
935         pinctrl-0 = <&spi5_pins>;
936         mediatek,pad-select = <0>;
937         status = "disabled";
938 };
939
940 &ssusb {
941         dr_mode = "host";
942         wakeup-source;
943         vusb33-supply = <&mt6358_vusb_reg>;
944         status = "okay";
945 };
946
947 &thermal_zones {
948         tboard1 {
949                 polling-delay = <1000>; /* milliseconds */
950                 polling-delay-passive = <0>; /* milliseconds */
951                 thermal-sensors = <&tboard_thermistor1>;
952         };
953
954         tboard2 {
955                 polling-delay = <1000>; /* milliseconds */
956                 polling-delay-passive = <0>; /* milliseconds */
957                 thermal-sensors = <&tboard_thermistor2>;
958         };
959 };
960
961 &u3phy {
962         status = "okay";
963 };
964
965 &uart0 {
966         pinctrl-names = "default";
967         pinctrl-0 = <&uart0_pins_default>;
968         status = "okay";
969 };
970
971 &uart1 {
972         pinctrl-names = "default", "sleep";
973         pinctrl-0 = <&uart1_pins_default>;
974         pinctrl-1 = <&uart1_pins_sleep>;
975         status = "okay";
976         interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
977                               <&pio 121 IRQ_TYPE_EDGE_FALLING>;
978
979         bluetooth: bluetooth {
980                 pinctrl-names = "default";
981                 pinctrl-0 = <&bt_pins>;
982                 status = "okay";
983                 compatible = "qcom,qca6174-bt";
984                 enable-gpios = <&pio 120 0>;
985                 clocks = <&clk32k>;
986                 firmware-name = "nvm_00440302_i2s.bin";
987         };
988 };
989
990 &usb_host {
991         #address-cells = <1>;
992         #size-cells = <0>;
993         vusb33-supply = <&mt6358_vusb_reg>;
994         status = "okay";
995
996         hub@1 {
997                 compatible = "usb5e3,610";
998                 reg = <1>;
999         };
1000 };
1001
1002 #include <arm/cros-ec-keyboard.dtsi>
1003 #include <arm/cros-ec-sbs.dtsi>