arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright (c) 2018 MediaTek Inc.
   4  * Author: Ben Ho <ben.ho@mediatek.com>
   5  *         Erin Lo <erin.lo@mediatek.com>
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include "mt8183.dtsi"
  11 #include "mt6358.dtsi"
  12
  13 / {
  14         aliases {
  15                 serial0 = &uart0;
  16                 mmc0 = &mmc0;
  17                 mmc1 = &mmc1;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         backlight_lcd0: backlight_lcd0 {
  25                 compatible = "pwm-backlight";
  26                 pwms = <&pwm0 0 500000>;
  27                 power-supply = <&bl_pp5000>;
  28                 enable-gpios = <&pio 176 0>;
  29                 brightness-levels = <0 1023>;
  30                 num-interpolated-steps = <1023>;
  31                 default-brightness-level = <576>;
  32                 status = "okay";
  33         };
  34
  35         memory@40000000 {
  36                 device_type = "memory";
  37                 reg = <0 0x40000000 0 0x80000000>;
  38         };
  39
  40         clk32k: oscillator1 {
  41                 compatible = "fixed-clock";
  42                 #clock-cells = <0>;
  43                 clock-frequency = <32768>;
  44                 clock-output-names = "clk32k";
  45         };
  46
  47         it6505_pp18_reg: regulator0 {
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "it6505_pp18";
  50                 regulator-min-microvolt = <1800000>;
  51                 regulator-max-microvolt = <1800000>;
  52                 gpio = <&pio 178 0>;
  53                 enable-active-high;
  54         };
  55
  56         lcd_pp3300: regulator1 {
  57                 compatible = "regulator-fixed";
  58                 regulator-name = "lcd_pp3300";
  59                 regulator-min-microvolt = <3300000>;
  60                 regulator-max-microvolt = <3300000>;
  61                 regulator-always-on;
  62                 regulator-boot-on;
  63         };
  64
  65         bl_pp5000: regulator2 {
  66                 compatible = "regulator-fixed";
  67                 regulator-name = "bl_pp5000";
  68                 regulator-min-microvolt = <5000000>;
  69                 regulator-max-microvolt = <5000000>;
  70                 regulator-always-on;
  71                 regulator-boot-on;
  72         };
  73
  74         mmc1_fixed_power: regulator3 {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "mmc1_power";
  77                 regulator-min-microvolt = <3300000>;
  78                 regulator-max-microvolt = <3300000>;
  79         };
  80
  81         mmc1_fixed_io: regulator4 {
  82                 compatible = "regulator-fixed";
  83                 regulator-name = "mmc1_io";
  84                 regulator-min-microvolt = <1800000>;
  85                 regulator-max-microvolt = <1800000>;
  86         };
  87
  88         pp1800_alw: regulator5 {
  89                 compatible = "regulator-fixed";
  90                 regulator-name = "pp1800_alw";
  91                 regulator-always-on;
  92                 regulator-boot-on;
  93                 regulator-min-microvolt = <1800000>;
  94                 regulator-max-microvolt = <1800000>;
  95         };
  96
  97         pp3300_alw: regulator6 {
  98                 compatible = "regulator-fixed";
  99                 regulator-name = "pp3300_alw";
 100                 regulator-always-on;
 101                 regulator-boot-on;
 102                 regulator-min-microvolt = <3300000>;
 103                 regulator-max-microvolt = <3300000>;
 104         };
 105
 106         reserved_memory: reserved-memory {
 107                 #address-cells = <2>;
 108                 #size-cells = <2>;
 109                 ranges;
 110
 111                 scp_mem_reserved: memory@50000000 {
 112                         compatible = "shared-dma-pool";
 113                         reg = <0 0x50000000 0 0x2900000>;
 114                         no-map;
 115                 };
 116         };
 117
 118         sound: mt8183-sound {
 119                 mediatek,platform = <&afe>;
 120                 pinctrl-names = "default",
 121                                 "aud_tdm_out_on",
 122                                 "aud_tdm_out_off";
 123                 pinctrl-0 = <&aud_pins_default>;
 124                 pinctrl-1 = <&aud_pins_tdm_out_on>;
 125                 pinctrl-2 = <&aud_pins_tdm_out_off>;
 126                 status = "okay";
 127         };
 128
 129         btsco: bt-sco {
 130                 compatible = "linux,bt-sco";
 131         };
 132
 133         wifi_pwrseq: wifi-pwrseq {
 134                 compatible = "mmc-pwrseq-simple";
 135                 pinctrl-names = "default";
 136                 pinctrl-0 = <&wifi_pins_pwrseq>;
 137
 138                 /* Toggle WIFI_ENABLE to reset the chip. */
 139                 reset-gpios = <&pio 119 1>;
 140         };
 141
 142         wifi_wakeup: wifi-wakeup {
 143                 compatible = "gpio-keys";
 144                 pinctrl-names = "default";
 145                 pinctrl-0 = <&wifi_pins_wakeup>;
 146
 147                 button-wowlan {
 148                         label = "Wake on WiFi";
 149                         gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
 150                         linux,code = <KEY_WAKEUP>;
 151                         wakeup-source;
 152                 };
 153         };
 154
 155         tboard_thermistor1: thermal-sensor1 {
 156                 compatible = "generic-adc-thermal";
 157                 #thermal-sensor-cells = <0>;
 158                 io-channels = <&auxadc 0>;
 159                 io-channel-names = "sensor-channel";
 160                 temperature-lookup-table = <    (-5000) 1553
 161                                                 0 1488
 162                                                 5000 1412
 163                                                 10000 1326
 164                                                 15000 1232
 165                                                 20000 1132
 166                                                 25000 1029
 167                                                 30000 925
 168                                                 35000 823
 169                                                 40000 726
 170                                                 45000 635
 171                                                 50000 552
 172                                                 55000 478
 173                                                 60000 411
 174                                                 65000 353
 175                                                 70000 303
 176                                                 75000 260
 177                                                 80000 222
 178                                                 85000 190
 179                                                 90000 163
 180                                                 95000 140
 181                                                 100000 121
 182                                                 105000 104
 183                                                 110000 90
 184                                                 115000 78
 185                                                 120000 67
 186                                                 125000 59>;
 187         };
 188
 189         tboard_thermistor2: thermal-sensor2 {
 190                 compatible = "generic-adc-thermal";
 191                 #thermal-sensor-cells = <0>;
 192                 io-channels = <&auxadc 1>;
 193                 io-channel-names = "sensor-channel";
 194                 temperature-lookup-table = <    (-5000) 1553
 195                                                 0 1488
 196                                                 5000 1412
 197                                                 10000 1326
 198                                                 15000 1232
 199                                                 20000 1132
 200                                                 25000 1029
 201                                                 30000 925
 202                                                 35000 823
 203                                                 40000 726
 204                                                 45000 635
 205                                                 50000 552
 206                                                 55000 478
 207                                                 60000 411
 208                                                 65000 353
 209                                                 70000 303
 210                                                 75000 260
 211                                                 80000 222
 212                                                 85000 190
 213                                                 90000 163
 214                                                 95000 140
 215                                                 100000 121
 216                                                 105000 104
 217                                                 110000 90
 218                                                 115000 78
 219                                                 120000 67
 220                                                 125000 59>;
 221         };
 222 };
 223
 224 &auxadc {
 225         status = "okay";
 226 };
 227
 228 &cci {
 229         proc-supply = <&mt6358_vproc12_reg>;
 230 };
 231
 232 &cpu0 {
 233         proc-supply = <&mt6358_vproc12_reg>;
 234 };
 235
 236 &cpu1 {
 237         proc-supply = <&mt6358_vproc12_reg>;
 238 };
 239
 240 &cpu2 {
 241         proc-supply = <&mt6358_vproc12_reg>;
 242 };
 243
 244 &cpu3 {
 245         proc-supply = <&mt6358_vproc12_reg>;
 246 };
 247
 248 &cpu4 {
 249         proc-supply = <&mt6358_vproc11_reg>;
 250 };
 251
 252 &cpu5 {
 253         proc-supply = <&mt6358_vproc11_reg>;
 254 };
 255
 256 &cpu6 {
 257         proc-supply = <&mt6358_vproc11_reg>;
 258 };
 259
 260 &cpu7 {
 261         proc-supply = <&mt6358_vproc11_reg>;
 262 };
 263
 264 &dsi0 {
 265         status = "okay";
 266         #address-cells = <1>;
 267         #size-cells = <0>;
 268         panel: panel@0 {
 269                 /* compatible will be set in board dts */
 270                 reg = <0>;
 271                 enable-gpios = <&pio 45 0>;
 272                 pinctrl-names = "default";
 273                 pinctrl-0 = <&panel_pins_default>;
 274                 avdd-supply = <&ppvarn_lcd>;
 275                 avee-supply = <&ppvarp_lcd>;
 276                 pp1800-supply = <&pp1800_lcd>;
 277                 backlight = <&backlight_lcd0>;
 278                 rotation = <270>;
 279                 port {
 280                         panel_in: endpoint {
 281                                 remote-endpoint = <&dsi_out>;
 282                         };
 283                 };
 284         };
 285
 286         ports {
 287                 port {
 288                         dsi_out: endpoint {
 289                                 remote-endpoint = <&panel_in>;
 290                         };
 291                 };
 292         };
 293 };
 294
 295 &gic {
 296         mediatek,broken-save-restore-fw;
 297 };
 298
 299 &gpu {
 300         mali-supply = <&mt6358_vgpu_reg>;
 301 };
 302
 303 &i2c0 {
 304         pinctrl-names = "default";
 305         pinctrl-0 = <&i2c0_pins>;
 306         status = "okay";
 307         clock-frequency = <400000>;
 308         #address-cells = <1>;
 309         #size-cells = <0>;
 310 };
 311
 312 &i2c1 {
 313         pinctrl-names = "default";
 314         pinctrl-0 = <&i2c1_pins>;
 315         status = "okay";
 316         clock-frequency = <100000>;
 317 };
 318
 319 &i2c3 {
 320         pinctrl-names = "default";
 321         pinctrl-0 = <&i2c3_pins>;
 322         status = "okay";
 323         clock-frequency = <100000>;
 324         #address-cells = <1>;
 325         #size-cells = <0>;
 326 };
 327
 328 &i2c5 {
 329         pinctrl-names = "default";
 330         pinctrl-0 = <&i2c5_pins>;
 331         status = "okay";
 332         clock-frequency = <100000>;
 333         #address-cells = <1>;
 334         #size-cells = <0>;
 335 };
 336
 337 &i2c6 {
 338         pinctrl-names = "default";
 339         pinctrl-0 = <&i2c6_pins>;
 340         status = "okay";
 341         clock-frequency = <100000>;
 342 };
 343
 344 &mipi_tx0 {
 345         status = "okay";
 346 };
 347
 348 &mmc0 {
 349         status = "okay";
 350         pinctrl-names = "default", "state_uhs";
 351         pinctrl-0 = <&mmc0_pins_default>;
 352         pinctrl-1 = <&mmc0_pins_uhs>;
 353         bus-width = <8>;
 354         max-frequency = <200000000>;
 355         cap-mmc-highspeed;
 356         mmc-hs200-1_8v;
 357         mmc-hs400-1_8v;
 358         cap-mmc-hw-reset;
 359         no-sdio;
 360         no-sd;
 361         hs400-ds-delay = <0x12814>;
 362         vmmc-supply = <&mt6358_vemc_reg>;
 363         vqmmc-supply = <&mt6358_vio18_reg>;
 364         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
 365         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
 366         non-removable;
 367 };
 368
 369 &mmc1 {
 370         status = "okay";
 371         pinctrl-names = "default", "state_uhs";
 372         pinctrl-0 = <&mmc1_pins_default>;
 373         pinctrl-1 = <&mmc1_pins_uhs>;
 374         vmmc-supply = <&mmc1_fixed_power>;
 375         vqmmc-supply = <&mmc1_fixed_io>;
 376         mmc-pwrseq = <&wifi_pwrseq>;
 377         bus-width = <4>;
 378         max-frequency = <200000000>;
 379         cap-sd-highspeed;
 380         sd-uhs-sdr50;
 381         sd-uhs-sdr104;
 382         keep-power-in-suspend;
 383         wakeup-source;
 384         cap-sdio-irq;
 385         non-removable;
 386         no-mmc;
 387         no-sd;
 388         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
 389         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
 390         #address-cells = <1>;
 391         #size-cells = <0>;
 392
 393         qca_wifi: qca-wifi@1 {
 394                 compatible = "qcom,ath10k";
 395                 reg = <1>;
 396         };
 397 };
 398
 399 &mt6358_vdram2_reg {
 400         regulator-always-on;
 401 };
 402
 403 &mt6358codec {
 404         Avdd-supply = <&mt6358_vaud28_reg>;
 405 };
 406
 407 &mt6358_vgpu_reg {
 408         regulator-min-microvolt = <625000>;
 409         regulator-max-microvolt = <900000>;
 410
 411         regulator-coupled-with = <&mt6358_vsram_gpu_reg>;
 412         regulator-coupled-max-spread = <100000>;
 413 };
 414
 415 &mt6358_vsim1_reg {
 416         regulator-min-microvolt = <2700000>;
 417         regulator-max-microvolt = <2700000>;
 418 };
 419
 420 &mt6358_vsim2_reg {
 421         regulator-min-microvolt = <2700000>;
 422         regulator-max-microvolt = <2700000>;
 423 };
 424
 425 &mt6358_vsram_gpu_reg {
 426         regulator-min-microvolt = <850000>;
 427         regulator-max-microvolt = <1000000>;
 428
 429         regulator-coupled-with = <&mt6358_vgpu_reg>;
 430         regulator-coupled-max-spread = <100000>;
 431 };
 432
 433 &pio {
 434         aud_pins_default: audiopins {
 435                 pins_bus {
 436                         pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
 437                                 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
 438                                 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
 439                                 <PINMUX_GPIO102__FUNC_I2S2_DI>,
 440                                 <PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
 441                                 <PINMUX_GPIO89__FUNC_I2S5_BCK>,
 442                                 <PINMUX_GPIO90__FUNC_I2S5_LRCK>,
 443                                 <PINMUX_GPIO91__FUNC_I2S5_DO>,
 444                                 <PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
 445                                 <PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
 446                                 <PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
 447                                 <PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
 448                                 <PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
 449                                 <PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
 450                                 <PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
 451                                 <PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
 452                                 <PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
 453                 };
 454         };
 455
 456         aud_pins_tdm_out_on: audiotdmouton {
 457                 pins_bus {
 458                         pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
 459                                 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
 460                                 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
 461                                 <PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
 462                                 <PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
 463                                 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
 464                         drive-strength = <MTK_DRIVE_6mA>;
 465                 };
 466         };
 467
 468         aud_pins_tdm_out_off: audiotdmoutoff {
 469                 pins_bus {
 470                         pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
 471                                 <PINMUX_GPIO170__FUNC_GPIO170>,
 472                                 <PINMUX_GPIO171__FUNC_GPIO171>,
 473                                 <PINMUX_GPIO172__FUNC_GPIO172>,
 474                                 <PINMUX_GPIO173__FUNC_GPIO173>,
 475                                 <PINMUX_GPIO10__FUNC_GPIO10>;
 476                         input-enable;
 477                         bias-pull-down;
 478                         drive-strength = <MTK_DRIVE_2mA>;
 479                 };
 480         };
 481
 482         bt_pins: bt-pins {
 483                 pins_bt_en {
 484                         pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
 485                         output-low;
 486                 };
 487         };
 488
 489         ec_ap_int_odl: ec_ap_int_odl {
 490                 pins1 {
 491                         pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
 492                         input-enable;
 493                         bias-pull-up;
 494                 };
 495         };
 496
 497         h1_int_od_l: h1_int_od_l {
 498                 pins1 {
 499                         pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
 500                         input-enable;
 501                 };
 502         };
 503
 504         i2c0_pins: i2c0 {
 505                 pins_bus {
 506                         pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
 507                                  <PINMUX_GPIO83__FUNC_SCL0>;
 508                         mediatek,pull-up-adv = <3>;
 509                         mediatek,drive-strength-adv = <00>;
 510                 };
 511         };
 512
 513         i2c1_pins: i2c1 {
 514                 pins_bus {
 515                         pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
 516                                  <PINMUX_GPIO84__FUNC_SCL1>;
 517                         mediatek,pull-up-adv = <3>;
 518                         mediatek,drive-strength-adv = <00>;
 519                 };
 520         };
 521
 522         i2c2_pins: i2c2 {
 523                 pins_bus {
 524                         pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
 525                                  <PINMUX_GPIO104__FUNC_SDA2>;
 526                         bias-disable;
 527                         mediatek,drive-strength-adv = <00>;
 528                 };
 529         };
 530
 531         i2c3_pins: i2c3 {
 532                 pins_bus {
 533                         pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
 534                                  <PINMUX_GPIO51__FUNC_SDA3>;
 535                         mediatek,pull-up-adv = <3>;
 536                         mediatek,drive-strength-adv = <00>;
 537                 };
 538         };
 539
 540         i2c4_pins: i2c4 {
 541                 pins_bus {
 542                         pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
 543                                  <PINMUX_GPIO106__FUNC_SDA4>;
 544                         bias-disable;
 545                         mediatek,drive-strength-adv = <00>;
 546                 };
 547         };
 548
 549         i2c5_pins: i2c5 {
 550                 pins_bus {
 551                         pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
 552                                  <PINMUX_GPIO49__FUNC_SDA5>;
 553                         mediatek,pull-up-adv = <3>;
 554                         mediatek,drive-strength-adv = <00>;
 555                 };
 556         };
 557
 558         i2c6_pins: i2c6 {
 559                 pins_bus {
 560                         pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
 561                                  <PINMUX_GPIO12__FUNC_SDA6>;
 562                         bias-disable;
 563                 };
 564         };
 565
 566         mmc0_pins_default: mmc0-pins-default {
 567                 pins_cmd_dat {
 568                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
 569                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
 570                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
 571                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
 572                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
 573                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
 574                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
 575                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
 576                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
 577                         input-enable;
 578                         drive-strength = <MTK_DRIVE_14mA>;
 579                         mediatek,pull-up-adv = <01>;
 580                 };
 581
 582                 pins_clk {
 583                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
 584                         drive-strength = <MTK_DRIVE_14mA>;
 585                         mediatek,pull-down-adv = <10>;
 586                 };
 587
 588                 pins_rst {
 589                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
 590                         drive-strength = <MTK_DRIVE_14mA>;
 591                         mediatek,pull-down-adv = <01>;
 592                 };
 593         };
 594
 595         mmc0_pins_uhs: mmc0-pins-uhs {
 596                 pins_cmd_dat {
 597                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
 598                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
 599                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
 600                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
 601                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
 602                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
 603                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
 604                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
 605                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
 606                         input-enable;
 607                         drive-strength = <MTK_DRIVE_14mA>;
 608                         mediatek,pull-up-adv = <01>;
 609                 };
 610
 611                 pins_clk {
 612                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
 613                         drive-strength = <MTK_DRIVE_14mA>;
 614                         mediatek,pull-down-adv = <10>;
 615                 };
 616
 617                 pins_ds {
 618                         pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
 619                         drive-strength = <MTK_DRIVE_14mA>;
 620                         mediatek,pull-down-adv = <10>;
 621                 };
 622
 623                 pins_rst {
 624                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
 625                         drive-strength = <MTK_DRIVE_14mA>;
 626                         mediatek,pull-up-adv = <01>;
 627                 };
 628         };
 629
 630         mmc1_pins_default: mmc1-pins-default {
 631                 pins_cmd_dat {
 632                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
 633                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
 634                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
 635                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
 636                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
 637                         input-enable;
 638                         mediatek,pull-up-adv = <10>;
 639                 };
 640
 641                 pins_clk {
 642                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
 643                         input-enable;
 644                         mediatek,pull-down-adv = <10>;
 645                 };
 646         };
 647
 648         mmc1_pins_uhs: mmc1-pins-uhs {
 649                 pins_cmd_dat {
 650                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
 651                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
 652                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
 653                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
 654                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
 655                         drive-strength = <MTK_DRIVE_6mA>;
 656                         input-enable;
 657                         mediatek,pull-up-adv = <10>;
 658                 };
 659
 660                 pins_clk {
 661                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
 662                         drive-strength = <MTK_DRIVE_8mA>;
 663                         mediatek,pull-down-adv = <10>;
 664                         input-enable;
 665                 };
 666         };
 667
 668         panel_pins_default: panel_pins_default {
 669                 panel_reset {
 670                         pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
 671                         output-low;
 672                         bias-pull-up;
 673                 };
 674         };
 675
 676         pwm0_pin_default: pwm0_pin_default {
 677                 pins1 {
 678                         pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
 679                         output-high;
 680                         bias-pull-up;
 681                 };
 682                 pins2 {
 683                         pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
 684                 };
 685         };
 686
 687         scp_pins: scp {
 688                 pins_scp_uart {
 689                         pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
 690                                  <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
 691                 };
 692         };
 693
 694         spi0_pins: spi0 {
 695                 pins_spi {
 696                         pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
 697                                  <PINMUX_GPIO86__FUNC_GPIO86>,
 698                                  <PINMUX_GPIO87__FUNC_SPI0_MO>,
 699                                  <PINMUX_GPIO88__FUNC_SPI0_CLK>;
 700                         bias-disable;
 701                 };
 702         };
 703
 704         spi1_pins: spi1 {
 705                 pins_spi {
 706                         pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
 707                                  <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
 708                                  <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
 709                                  <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
 710                         bias-disable;
 711                 };
 712         };
 713
 714         spi2_pins: spi2 {
 715                 pins_spi {
 716                         pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
 717                                  <PINMUX_GPIO1__FUNC_SPI2_MO>,
 718                                  <PINMUX_GPIO2__FUNC_SPI2_CLK>;
 719                         bias-disable;
 720                 };
 721                 pins_spi_mi {
 722                         pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
 723                         mediatek,pull-down-adv = <00>;
 724                 };
 725         };
 726
 727         spi3_pins: spi3 {
 728                 pins_spi {
 729                         pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
 730                                  <PINMUX_GPIO22__FUNC_SPI3_CSB>,
 731                                  <PINMUX_GPIO23__FUNC_SPI3_MO>,
 732                                  <PINMUX_GPIO24__FUNC_SPI3_CLK>;
 733                         bias-disable;
 734                 };
 735         };
 736
 737         spi4_pins: spi4 {
 738                 pins_spi {
 739                         pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
 740                                  <PINMUX_GPIO18__FUNC_SPI4_CSB>,
 741                                  <PINMUX_GPIO19__FUNC_SPI4_MO>,
 742                                  <PINMUX_GPIO20__FUNC_SPI4_CLK>;
 743                         bias-disable;
 744                 };
 745         };
 746
 747         spi5_pins: spi5 {
 748                 pins_spi {
 749                         pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
 750                                  <PINMUX_GPIO14__FUNC_SPI5_CSB>,
 751                                  <PINMUX_GPIO15__FUNC_SPI5_MO>,
 752                                  <PINMUX_GPIO16__FUNC_SPI5_CLK>;
 753                         bias-disable;
 754                 };
 755         };
 756
 757         uart0_pins_default: uart0-pins-default {
 758                 pins_rx {
 759                         pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
 760                         input-enable;
 761                         bias-pull-up;
 762                 };
 763                 pins_tx {
 764                         pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
 765                 };
 766         };
 767
 768         uart1_pins_default: uart1-pins-default {
 769                 pins_rx {
 770                         pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
 771                         input-enable;
 772                         bias-pull-up;
 773                 };
 774                 pins_tx {
 775                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
 776                 };
 777                 pins_rts {
 778                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
 779                         output-enable;
 780                 };
 781                 pins_cts {
 782                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
 783                         input-enable;
 784                 };
 785         };
 786
 787         uart1_pins_sleep: uart1-pins-sleep {
 788                 pins_rx {
 789                         pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
 790                         input-enable;
 791                         bias-pull-up;
 792                 };
 793                 pins_tx {
 794                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
 795                 };
 796                 pins_rts {
 797                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
 798                         output-enable;
 799                 };
 800                 pins_cts {
 801                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
 802                         input-enable;
 803                 };
 804         };
 805
 806         wifi_pins_pwrseq: wifi-pins-pwrseq {
 807                 pins_wifi_enable {
 808                         pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
 809                         output-low;
 810                 };
 811         };
 812
 813         wifi_pins_wakeup: wifi-pins-wakeup {
 814                 pins_wifi_wakeup {
 815                         pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
 816                         input-enable;
 817                 };
 818         };
 819 };
 820
 821 &pwm0 {
 822         status = "okay";
 823         pinctrl-names = "default";
 824         pinctrl-0 = <&pwm0_pin_default>;
 825 };
 826
 827 &scp {
 828         status = "okay";
 829
 830         firmware-name = "mediatek/mt8183/scp.img";
 831         pinctrl-names = "default";
 832         pinctrl-0 = <&scp_pins>;
 833
 834         cros_ec {
 835                 compatible = "google,cros-ec-rpmsg";
 836                 mediatek,rpmsg-name = "cros-ec-rpmsg";
 837         };
 838 };
 839
 840 &mfg_async {
 841         domain-supply = <&mt6358_vsram_gpu_reg>;
 842 };
 843
 844 &mfg {
 845         domain-supply = <&mt6358_vgpu_reg>;
 846 };
 847
 848 &soc_data {
 849         status = "okay";
 850 };
 851
 852 &spi0 {
 853         pinctrl-names = "default";
 854         pinctrl-0 = <&spi0_pins>;
 855         mediatek,pad-select = <0>;
 856         status = "okay";
 857         cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
 858
 859         cr50@0 {
 860                 compatible = "google,cr50";
 861                 reg = <0>;
 862                 spi-max-frequency = <1000000>;
 863                 pinctrl-names = "default";
 864                 pinctrl-0 = <&h1_int_od_l>;
 865                 interrupt-parent = <&pio>;
 866                 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
 867         };
 868 };
 869
 870 &spi1 {
 871         pinctrl-names = "default";
 872         pinctrl-0 = <&spi1_pins>;
 873         mediatek,pad-select = <0>;
 874         status = "okay";
 875
 876         w25q64dw: flash@0 {
 877                 compatible = "winbond,w25q64dw", "jedec,spi-nor";
 878                 reg = <0>;
 879                 spi-max-frequency = <25000000>;
 880         };
 881 };
 882
 883 &spi2 {
 884         pinctrl-names = "default";
 885         pinctrl-0 = <&spi2_pins>;
 886         mediatek,pad-select = <0>;
 887         status = "okay";
 888
 889         cros_ec: cros-ec@0 {
 890                 compatible = "google,cros-ec-spi";
 891                 reg = <0>;
 892                 spi-max-frequency = <3000000>;
 893                 interrupt-parent = <&pio>;
 894                 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
 895                 pinctrl-names = "default";
 896                 pinctrl-0 = <&ec_ap_int_odl>;
 897
 898                 i2c_tunnel: i2c-tunnel {
 899                         compatible = "google,cros-ec-i2c-tunnel";
 900                         google,remote-bus = <1>;
 901                         #address-cells = <1>;
 902                         #size-cells = <0>;
 903                 };
 904
 905                 usbc_extcon: extcon0 {
 906                         compatible = "google,extcon-usbc-cros-ec";
 907                         google,usb-port-id = <0>;
 908                 };
 909
 910                 cbas {
 911                         compatible = "google,cros-cbas";
 912                 };
 913
 914                 typec {
 915                         compatible = "google,cros-ec-typec";
 916                         #address-cells = <1>;
 917                         #size-cells = <0>;
 918
 919                         usb_c0: connector@0 {
 920                                 compatible = "usb-c-connector";
 921                                 reg = <0>;
 922                                 power-role = "dual";
 923                                 data-role = "host";
 924                                 try-power-role = "sink";
 925                         };
 926                 };
 927         };
 928 };
 929
 930 &spi3 {
 931         pinctrl-names = "default";
 932         pinctrl-0 = <&spi3_pins>;
 933         mediatek,pad-select = <0>;
 934         status = "disabled";
 935 };
 936
 937 &spi4 {
 938         pinctrl-names = "default";
 939         pinctrl-0 = <&spi4_pins>;
 940         mediatek,pad-select = <0>;
 941         status = "disabled";
 942 };
 943
 944 &spi5 {
 945         pinctrl-names = "default";
 946         pinctrl-0 = <&spi5_pins>;
 947         mediatek,pad-select = <0>;
 948         status = "disabled";
 949 };
 950
 951 &ssusb {
 952         dr_mode = "host";
 953         wakeup-source;
 954         vusb33-supply = <&mt6358_vusb_reg>;
 955         status = "okay";
 956 };
 957
 958 &thermal_zones {
 959         tboard1 {
 960                 polling-delay = <1000>; /* milliseconds */
 961                 polling-delay-passive = <0>; /* milliseconds */
 962                 thermal-sensors = <&tboard_thermistor1>;
 963         };
 964
 965         tboard2 {
 966                 polling-delay = <1000>; /* milliseconds */
 967                 polling-delay-passive = <0>; /* milliseconds */
 968                 thermal-sensors = <&tboard_thermistor2>;
 969         };
 970 };
 971
 972 &u3phy {
 973         status = "okay";
 974 };
 975
 976 &uart0 {
 977         pinctrl-names = "default";
 978         pinctrl-0 = <&uart0_pins_default>;
 979         status = "okay";
 980 };
 981
 982 &uart1 {
 983         pinctrl-names = "default", "sleep";
 984         pinctrl-0 = <&uart1_pins_default>;
 985         pinctrl-1 = <&uart1_pins_sleep>;
 986         status = "okay";
 987         /delete-property/ interrupts;
 988         interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
 989                               <&pio 121 IRQ_TYPE_EDGE_FALLING>;
 990
 991         bluetooth: bluetooth {
 992                 pinctrl-names = "default";
 993                 pinctrl-0 = <&bt_pins>;
 994                 status = "okay";
 995                 compatible = "qcom,qca6174-bt";
 996                 enable-gpios = <&pio 120 0>;
 997                 clocks = <&clk32k>;
 998                 firmware-name = "nvm_00440302_i2s.bin";
 999         };
1000 };
1001
1002 &usb_host {
1003         #address-cells = <1>;
1004         #size-cells = <0>;
1005         vusb33-supply = <&mt6358_vusb_reg>;
1006         status = "okay";
1007
1008         hub@1 {
1009                 compatible = "usb5e3,610";
1010                 reg = <1>;
1011         };
1012 };
1013
1014 #include <arm/cros-ec-sbs.dtsi>