arm64: dts: mediatek: kukui: Remove i2s-share properties
[platform/kernel/linux-starfive.git] / arch / arm64 / boot / dts / mediatek / mt8183-kukui.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3  * Copyright (c) 2018 MediaTek Inc.
4  * Author: Ben Ho <ben.ho@mediatek.com>
5  *         Erin Lo <erin.lo@mediatek.com>
6  */
7
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include "mt8183.dtsi"
11 #include "mt6358.dtsi"
12
13 / {
14         aliases {
15                 serial0 = &uart0;
16                 mmc0 = &mmc0;
17                 mmc1 = &mmc1;
18         };
19
20         chosen {
21                 stdout-path = "serial0:115200n8";
22         };
23
24         backlight_lcd0: backlight_lcd0 {
25                 compatible = "pwm-backlight";
26                 pwms = <&pwm0 0 500000>;
27                 power-supply = <&bl_pp5000>;
28                 enable-gpios = <&pio 176 0>;
29                 brightness-levels = <0 1023>;
30                 num-interpolated-steps = <1023>;
31                 default-brightness-level = <576>;
32                 status = "okay";
33         };
34
35         memory@40000000 {
36                 device_type = "memory";
37                 reg = <0 0x40000000 0 0x80000000>;
38         };
39
40         clk32k: oscillator1 {
41                 compatible = "fixed-clock";
42                 #clock-cells = <0>;
43                 clock-frequency = <32768>;
44                 clock-output-names = "clk32k";
45         };
46
47         it6505_pp18_reg: regulator0 {
48                 compatible = "regulator-fixed";
49                 regulator-name = "it6505_pp18";
50                 regulator-min-microvolt = <1800000>;
51                 regulator-max-microvolt = <1800000>;
52                 gpio = <&pio 178 0>;
53                 enable-active-high;
54         };
55
56         lcd_pp3300: regulator1 {
57                 compatible = "regulator-fixed";
58                 regulator-name = "lcd_pp3300";
59                 regulator-min-microvolt = <3300000>;
60                 regulator-max-microvolt = <3300000>;
61                 regulator-always-on;
62                 regulator-boot-on;
63         };
64
65         bl_pp5000: regulator2 {
66                 compatible = "regulator-fixed";
67                 regulator-name = "bl_pp5000";
68                 regulator-min-microvolt = <5000000>;
69                 regulator-max-microvolt = <5000000>;
70                 regulator-always-on;
71                 regulator-boot-on;
72         };
73
74         mmc1_fixed_power: regulator3 {
75                 compatible = "regulator-fixed";
76                 regulator-name = "mmc1_power";
77                 regulator-min-microvolt = <3300000>;
78                 regulator-max-microvolt = <3300000>;
79         };
80
81         mmc1_fixed_io: regulator4 {
82                 compatible = "regulator-fixed";
83                 regulator-name = "mmc1_io";
84                 regulator-min-microvolt = <1800000>;
85                 regulator-max-microvolt = <1800000>;
86         };
87
88         pp1800_alw: regulator5 {
89                 compatible = "regulator-fixed";
90                 regulator-name = "pp1800_alw";
91                 regulator-always-on;
92                 regulator-boot-on;
93                 regulator-min-microvolt = <1800000>;
94                 regulator-max-microvolt = <1800000>;
95         };
96
97         pp3300_alw: regulator6 {
98                 compatible = "regulator-fixed";
99                 regulator-name = "pp3300_alw";
100                 regulator-always-on;
101                 regulator-boot-on;
102                 regulator-min-microvolt = <3300000>;
103                 regulator-max-microvolt = <3300000>;
104         };
105
106         reserved_memory: reserved-memory {
107                 #address-cells = <2>;
108                 #size-cells = <2>;
109                 ranges;
110
111                 scp_mem_reserved: scp_mem_region {
112                         compatible = "shared-dma-pool";
113                         reg = <0 0x50000000 0 0x2900000>;
114                         no-map;
115                 };
116         };
117
118         sound: mt8183-sound {
119                 mediatek,platform = <&afe>;
120                 pinctrl-names = "default",
121                                 "aud_tdm_out_on",
122                                 "aud_tdm_out_off";
123                 pinctrl-0 = <&aud_pins_default>;
124                 pinctrl-1 = <&aud_pins_tdm_out_on>;
125                 pinctrl-2 = <&aud_pins_tdm_out_off>;
126                 status = "okay";
127         };
128
129         btsco: bt-sco {
130                 compatible = "linux,bt-sco";
131         };
132
133         wifi_pwrseq: wifi-pwrseq {
134                 compatible = "mmc-pwrseq-simple";
135                 pinctrl-names = "default";
136                 pinctrl-0 = <&wifi_pins_pwrseq>;
137
138                 /* Toggle WIFI_ENABLE to reset the chip. */
139                 reset-gpios = <&pio 119 1>;
140         };
141
142         wifi_wakeup: wifi-wakeup {
143                 compatible = "gpio-keys";
144                 pinctrl-names = "default";
145                 pinctrl-0 = <&wifi_pins_wakeup>;
146
147                 button-wowlan {
148                         label = "Wake on WiFi";
149                         gpios = <&pio 113 GPIO_ACTIVE_HIGH>;
150                         linux,code = <KEY_WAKEUP>;
151                         wakeup-source;
152                 };
153         };
154
155         tboard_thermistor1: thermal-sensor1 {
156                 compatible = "generic-adc-thermal";
157                 #thermal-sensor-cells = <0>;
158                 io-channels = <&auxadc 0>;
159                 io-channel-names = "sensor-channel";
160                 temperature-lookup-table = <    (-5000) 1553
161                                                 0 1488
162                                                 5000 1412
163                                                 10000 1326
164                                                 15000 1232
165                                                 20000 1132
166                                                 25000 1029
167                                                 30000 925
168                                                 35000 823
169                                                 40000 726
170                                                 45000 635
171                                                 50000 552
172                                                 55000 478
173                                                 60000 411
174                                                 65000 353
175                                                 70000 303
176                                                 75000 260
177                                                 80000 222
178                                                 85000 190
179                                                 90000 163
180                                                 95000 140
181                                                 100000 121
182                                                 105000 104
183                                                 110000 90
184                                                 115000 78
185                                                 120000 67
186                                                 125000 59>;
187         };
188
189         tboard_thermistor2: thermal-sensor2 {
190                 compatible = "generic-adc-thermal";
191                 #thermal-sensor-cells = <0>;
192                 io-channels = <&auxadc 1>;
193                 io-channel-names = "sensor-channel";
194                 temperature-lookup-table = <    (-5000) 1553
195                                                 0 1488
196                                                 5000 1412
197                                                 10000 1326
198                                                 15000 1232
199                                                 20000 1132
200                                                 25000 1029
201                                                 30000 925
202                                                 35000 823
203                                                 40000 726
204                                                 45000 635
205                                                 50000 552
206                                                 55000 478
207                                                 60000 411
208                                                 65000 353
209                                                 70000 303
210                                                 75000 260
211                                                 80000 222
212                                                 85000 190
213                                                 90000 163
214                                                 95000 140
215                                                 100000 121
216                                                 105000 104
217                                                 110000 90
218                                                 115000 78
219                                                 120000 67
220                                                 125000 59>;
221         };
222 };
223
224 &auxadc {
225         status = "okay";
226 };
227
228 &cci {
229         proc-supply = <&mt6358_vproc12_reg>;
230 };
231
232 &cpu0 {
233         proc-supply = <&mt6358_vproc12_reg>;
234 };
235
236 &cpu1 {
237         proc-supply = <&mt6358_vproc12_reg>;
238 };
239
240 &cpu2 {
241         proc-supply = <&mt6358_vproc12_reg>;
242 };
243
244 &cpu3 {
245         proc-supply = <&mt6358_vproc12_reg>;
246 };
247
248 &cpu4 {
249         proc-supply = <&mt6358_vproc11_reg>;
250 };
251
252 &cpu5 {
253         proc-supply = <&mt6358_vproc11_reg>;
254 };
255
256 &cpu6 {
257         proc-supply = <&mt6358_vproc11_reg>;
258 };
259
260 &cpu7 {
261         proc-supply = <&mt6358_vproc11_reg>;
262 };
263
264 &dsi0 {
265         status = "okay";
266         #address-cells = <1>;
267         #size-cells = <0>;
268         panel: panel@0 {
269                 /* compatible will be set in board dts */
270                 reg = <0>;
271                 enable-gpios = <&pio 45 0>;
272                 pinctrl-names = "default";
273                 pinctrl-0 = <&panel_pins_default>;
274                 avdd-supply = <&ppvarn_lcd>;
275                 avee-supply = <&ppvarp_lcd>;
276                 pp1800-supply = <&pp1800_lcd>;
277                 backlight = <&backlight_lcd0>;
278                 rotation = <270>;
279                 port {
280                         panel_in: endpoint {
281                                 remote-endpoint = <&dsi_out>;
282                         };
283                 };
284         };
285
286         ports {
287                 port {
288                         dsi_out: endpoint {
289                                 remote-endpoint = <&panel_in>;
290                         };
291                 };
292         };
293 };
294
295 &gpu {
296         mali-supply = <&mt6358_vgpu_reg>;
297         sram-supply = <&mt6358_vsram_gpu_reg>;
298 };
299
300 &i2c0 {
301         pinctrl-names = "default";
302         pinctrl-0 = <&i2c0_pins>;
303         status = "okay";
304         clock-frequency = <400000>;
305         #address-cells = <1>;
306         #size-cells = <0>;
307 };
308
309 &i2c1 {
310         pinctrl-names = "default";
311         pinctrl-0 = <&i2c1_pins>;
312         status = "okay";
313         clock-frequency = <100000>;
314 };
315
316 &i2c3 {
317         pinctrl-names = "default";
318         pinctrl-0 = <&i2c3_pins>;
319         status = "okay";
320         clock-frequency = <100000>;
321         #address-cells = <1>;
322         #size-cells = <0>;
323 };
324
325 &i2c5 {
326         pinctrl-names = "default";
327         pinctrl-0 = <&i2c5_pins>;
328         status = "okay";
329         clock-frequency = <100000>;
330         #address-cells = <1>;
331         #size-cells = <0>;
332 };
333
334 &i2c6 {
335         pinctrl-names = "default";
336         pinctrl-0 = <&i2c6_pins>;
337         status = "okay";
338         clock-frequency = <100000>;
339 };
340
341 &mipi_tx0 {
342         status = "okay";
343 };
344
345 &mmc0 {
346         status = "okay";
347         pinctrl-names = "default", "state_uhs";
348         pinctrl-0 = <&mmc0_pins_default>;
349         pinctrl-1 = <&mmc0_pins_uhs>;
350         bus-width = <8>;
351         max-frequency = <200000000>;
352         cap-mmc-highspeed;
353         mmc-hs200-1_8v;
354         mmc-hs400-1_8v;
355         cap-mmc-hw-reset;
356         no-sdio;
357         no-sd;
358         hs400-ds-delay = <0x12814>;
359         vmmc-supply = <&mt6358_vemc_reg>;
360         vqmmc-supply = <&mt6358_vio18_reg>;
361         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
362         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
363         non-removable;
364 };
365
366 &mmc1 {
367         status = "okay";
368         pinctrl-names = "default", "state_uhs";
369         pinctrl-0 = <&mmc1_pins_default>;
370         pinctrl-1 = <&mmc1_pins_uhs>;
371         vmmc-supply = <&mmc1_fixed_power>;
372         vqmmc-supply = <&mmc1_fixed_io>;
373         mmc-pwrseq = <&wifi_pwrseq>;
374         bus-width = <4>;
375         max-frequency = <200000000>;
376         drv-type = <2>;
377         cap-sd-highspeed;
378         sd-uhs-sdr50;
379         sd-uhs-sdr104;
380         keep-power-in-suspend;
381         wakeup-source;
382         cap-sdio-irq;
383         non-removable;
384         no-mmc;
385         no-sd;
386         assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC30_1>;
387         assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
388         #address-cells = <1>;
389         #size-cells = <0>;
390
391         qca_wifi: qca-wifi@1 {
392                 compatible = "qcom,ath10k";
393                 reg = <1>;
394         };
395 };
396
397 &mt6358_vdram2_reg {
398         regulator-always-on;
399 };
400
401 &mt6358codec {
402         Avdd-supply = <&mt6358_vaud28_reg>;
403 };
404
405 &mt6358_vsim1_reg {
406         regulator-min-microvolt = <2700000>;
407         regulator-max-microvolt = <2700000>;
408 };
409
410 &mt6358_vsim2_reg {
411         regulator-min-microvolt = <2700000>;
412         regulator-max-microvolt = <2700000>;
413 };
414
415 &pio {
416         aud_pins_default: audiopins {
417                 pins_bus {
418                         pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
419                                 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
420                                 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
421                                 <PINMUX_GPIO102__FUNC_I2S2_DI>,
422                                 <PINMUX_GPIO3__FUNC_I2S3_DO>, /*i2s to da7219/max98357*/
423                                 <PINMUX_GPIO89__FUNC_I2S5_BCK>,
424                                 <PINMUX_GPIO90__FUNC_I2S5_LRCK>,
425                                 <PINMUX_GPIO91__FUNC_I2S5_DO>,
426                                 <PINMUX_GPIO174__FUNC_I2S0_DI>, /*i2s to wifi/bt*/
427                                 <PINMUX_GPIO136__FUNC_AUD_CLK_MOSI>,
428                                 <PINMUX_GPIO137__FUNC_AUD_SYNC_MOSI>,
429                                 <PINMUX_GPIO138__FUNC_AUD_DAT_MOSI0>,
430                                 <PINMUX_GPIO139__FUNC_AUD_DAT_MOSI1>,
431                                 <PINMUX_GPIO140__FUNC_AUD_CLK_MISO>,
432                                 <PINMUX_GPIO141__FUNC_AUD_SYNC_MISO>,
433                                 <PINMUX_GPIO142__FUNC_AUD_DAT_MISO0>,
434                                 <PINMUX_GPIO143__FUNC_AUD_DAT_MISO1>; /*mtkaif3.0*/
435                 };
436         };
437
438         aud_pins_tdm_out_on: audiotdmouton {
439                 pins_bus {
440                         pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
441                                 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
442                                 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
443                                 <PINMUX_GPIO172__FUNC_TDM_DATA1_2ND>,
444                                 <PINMUX_GPIO173__FUNC_TDM_DATA2_2ND>,
445                                 <PINMUX_GPIO10__FUNC_TDM_DATA3>; /*8ch-i2s to it6505*/
446                         drive-strength = <MTK_DRIVE_6mA>;
447                 };
448         };
449
450         aud_pins_tdm_out_off: audiotdmoutoff {
451                 pins_bus {
452                         pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
453                                 <PINMUX_GPIO170__FUNC_GPIO170>,
454                                 <PINMUX_GPIO171__FUNC_GPIO171>,
455                                 <PINMUX_GPIO172__FUNC_GPIO172>,
456                                 <PINMUX_GPIO173__FUNC_GPIO173>,
457                                 <PINMUX_GPIO10__FUNC_GPIO10>;
458                         input-enable;
459                         bias-pull-down;
460                         drive-strength = <MTK_DRIVE_2mA>;
461                 };
462         };
463
464         bt_pins: bt-pins {
465                 pins_bt_en {
466                         pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
467                         output-low;
468                 };
469         };
470
471         ec_ap_int_odl: ec_ap_int_odl {
472                 pins1 {
473                         pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
474                         input-enable;
475                         bias-pull-up;
476                 };
477         };
478
479         h1_int_od_l: h1_int_od_l {
480                 pins1 {
481                         pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
482                         input-enable;
483                 };
484         };
485
486         i2c0_pins: i2c0 {
487                 pins_bus {
488                         pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
489                                  <PINMUX_GPIO83__FUNC_SCL0>;
490                         mediatek,pull-up-adv = <3>;
491                         mediatek,drive-strength-adv = <00>;
492                 };
493         };
494
495         i2c1_pins: i2c1 {
496                 pins_bus {
497                         pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
498                                  <PINMUX_GPIO84__FUNC_SCL1>;
499                         mediatek,pull-up-adv = <3>;
500                         mediatek,drive-strength-adv = <00>;
501                 };
502         };
503
504         i2c2_pins: i2c2 {
505                 pins_bus {
506                         pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
507                                  <PINMUX_GPIO104__FUNC_SDA2>;
508                         bias-disable;
509                         mediatek,drive-strength-adv = <00>;
510                 };
511         };
512
513         i2c3_pins: i2c3 {
514                 pins_bus {
515                         pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
516                                  <PINMUX_GPIO51__FUNC_SDA3>;
517                         mediatek,pull-up-adv = <3>;
518                         mediatek,drive-strength-adv = <00>;
519                 };
520         };
521
522         i2c4_pins: i2c4 {
523                 pins_bus {
524                         pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
525                                  <PINMUX_GPIO106__FUNC_SDA4>;
526                         bias-disable;
527                         mediatek,drive-strength-adv = <00>;
528                 };
529         };
530
531         i2c5_pins: i2c5 {
532                 pins_bus {
533                         pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
534                                  <PINMUX_GPIO49__FUNC_SDA5>;
535                         mediatek,pull-up-adv = <3>;
536                         mediatek,drive-strength-adv = <00>;
537                 };
538         };
539
540         i2c6_pins: i2c6 {
541                 pins_bus {
542                         pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
543                                  <PINMUX_GPIO12__FUNC_SDA6>;
544                         bias-disable;
545                 };
546         };
547
548         mmc0_pins_default: mmc0-pins-default {
549                 pins_cmd_dat {
550                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
551                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
552                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
553                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
554                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
555                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
556                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
557                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
558                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
559                         input-enable;
560                         drive-strength = <MTK_DRIVE_14mA>;
561                         mediatek,pull-up-adv = <01>;
562                 };
563
564                 pins_clk {
565                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
566                         drive-strength = <MTK_DRIVE_14mA>;
567                         mediatek,pull-down-adv = <10>;
568                 };
569
570                 pins_rst {
571                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
572                         drive-strength = <MTK_DRIVE_14mA>;
573                         mediatek,pull-down-adv = <01>;
574                 };
575         };
576
577         mmc0_pins_uhs: mmc0-pins-uhs {
578                 pins_cmd_dat {
579                         pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
580                                  <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
581                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
582                                  <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
583                                  <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
584                                  <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
585                                  <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
586                                  <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
587                                  <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
588                         input-enable;
589                         drive-strength = <MTK_DRIVE_14mA>;
590                         mediatek,pull-up-adv = <01>;
591                 };
592
593                 pins_clk {
594                         pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
595                         drive-strength = <MTK_DRIVE_14mA>;
596                         mediatek,pull-down-adv = <10>;
597                 };
598
599                 pins_ds {
600                         pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
601                         drive-strength = <MTK_DRIVE_14mA>;
602                         mediatek,pull-down-adv = <10>;
603                 };
604
605                 pins_rst {
606                         pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
607                         drive-strength = <MTK_DRIVE_14mA>;
608                         mediatek,pull-up-adv = <01>;
609                 };
610         };
611
612         mmc1_pins_default: mmc1-pins-default {
613                 pins_cmd_dat {
614                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
615                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
616                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
617                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
618                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
619                         input-enable;
620                         mediatek,pull-up-adv = <10>;
621                 };
622
623                 pins_clk {
624                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
625                         input-enable;
626                         mediatek,pull-down-adv = <10>;
627                 };
628         };
629
630         mmc1_pins_uhs: mmc1-pins-uhs {
631                 pins_cmd_dat {
632                         pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
633                                  <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
634                                  <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
635                                  <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
636                                  <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
637                         drive-strength = <MTK_DRIVE_6mA>;
638                         input-enable;
639                         mediatek,pull-up-adv = <10>;
640                 };
641
642                 pins_clk {
643                         pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
644                         drive-strength = <MTK_DRIVE_8mA>;
645                         mediatek,pull-down-adv = <10>;
646                         input-enable;
647                 };
648         };
649
650         panel_pins_default: panel_pins_default {
651                 panel_reset {
652                         pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
653                         output-low;
654                         bias-pull-up;
655                 };
656         };
657
658         pwm0_pin_default: pwm0_pin_default {
659                 pins1 {
660                         pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
661                         output-high;
662                         bias-pull-up;
663                 };
664                 pins2 {
665                         pinmux = <PINMUX_GPIO43__FUNC_DISP_PWM>;
666                 };
667         };
668
669         scp_pins: scp {
670                 pins_scp_uart {
671                         pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
672                                  <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
673                 };
674         };
675
676         spi0_pins: spi0 {
677                 pins_spi{
678                         pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
679                                  <PINMUX_GPIO86__FUNC_GPIO86>,
680                                  <PINMUX_GPIO87__FUNC_SPI0_MO>,
681                                  <PINMUX_GPIO88__FUNC_SPI0_CLK>;
682                         bias-disable;
683                 };
684         };
685
686         spi1_pins: spi1 {
687                 pins_spi{
688                         pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
689                                  <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
690                                  <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
691                                  <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
692                         bias-disable;
693                 };
694         };
695
696         spi2_pins: spi2 {
697                 pins_spi{
698                         pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
699                                  <PINMUX_GPIO1__FUNC_SPI2_MO>,
700                                  <PINMUX_GPIO2__FUNC_SPI2_CLK>;
701                         bias-disable;
702                 };
703                 pins_spi_mi {
704                         pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
705                         mediatek,pull-down-adv = <00>;
706                 };
707         };
708
709         spi3_pins: spi3 {
710                 pins_spi{
711                         pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
712                                  <PINMUX_GPIO22__FUNC_SPI3_CSB>,
713                                  <PINMUX_GPIO23__FUNC_SPI3_MO>,
714                                  <PINMUX_GPIO24__FUNC_SPI3_CLK>;
715                         bias-disable;
716                 };
717         };
718
719         spi4_pins: spi4 {
720                 pins_spi{
721                         pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
722                                  <PINMUX_GPIO18__FUNC_SPI4_CSB>,
723                                  <PINMUX_GPIO19__FUNC_SPI4_MO>,
724                                  <PINMUX_GPIO20__FUNC_SPI4_CLK>;
725                         bias-disable;
726                 };
727         };
728
729         spi5_pins: spi5 {
730                 pins_spi{
731                         pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
732                                  <PINMUX_GPIO14__FUNC_SPI5_CSB>,
733                                  <PINMUX_GPIO15__FUNC_SPI5_MO>,
734                                  <PINMUX_GPIO16__FUNC_SPI5_CLK>;
735                         bias-disable;
736                 };
737         };
738
739         uart0_pins_default: uart0-pins-default {
740                 pins_rx {
741                         pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
742                         input-enable;
743                         bias-pull-up;
744                 };
745                 pins_tx {
746                         pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
747                 };
748         };
749
750         uart1_pins_default: uart1-pins-default {
751                 pins_rx {
752                         pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
753                         input-enable;
754                         bias-pull-up;
755                 };
756                 pins_tx {
757                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
758                 };
759                 pins_rts {
760                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
761                         output-enable;
762                 };
763                 pins_cts {
764                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
765                         input-enable;
766                 };
767         };
768
769         uart1_pins_sleep: uart1-pins-sleep {
770                 pins_rx {
771                         pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
772                         input-enable;
773                         bias-pull-up;
774                 };
775                 pins_tx {
776                         pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
777                 };
778                 pins_rts {
779                         pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
780                         output-enable;
781                 };
782                 pins_cts {
783                         pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
784                         input-enable;
785                 };
786         };
787
788         wifi_pins_pwrseq: wifi-pins-pwrseq {
789                 pins_wifi_enable {
790                         pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
791                         output-low;
792                 };
793         };
794
795         wifi_pins_wakeup: wifi-pins-wakeup {
796                 pins_wifi_wakeup {
797                         pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
798                         input-enable;
799                 };
800         };
801 };
802
803 &pwm0 {
804         status = "okay";
805         pinctrl-names = "default";
806         pinctrl-0 = <&pwm0_pin_default>;
807 };
808
809 &scp {
810         status = "okay";
811         pinctrl-names = "default";
812         pinctrl-0 = <&scp_pins>;
813
814         cros_ec {
815                 compatible = "google,cros-ec-rpmsg";
816                 mediatek,rpmsg-name = "cros-ec-rpmsg";
817         };
818 };
819
820 &mfg_async {
821         domain-supply = <&mt6358_vsram_gpu_reg>;
822 };
823
824 &mfg {
825         domain-supply = <&mt6358_vgpu_reg>;
826 };
827
828 &soc_data {
829         status = "okay";
830 };
831
832 &spi0 {
833         pinctrl-names = "default";
834         pinctrl-0 = <&spi0_pins>;
835         mediatek,pad-select = <0>;
836         status = "okay";
837         cs-gpios = <&pio 86 GPIO_ACTIVE_LOW>;
838
839         cr50@0 {
840                 compatible = "google,cr50";
841                 reg = <0>;
842                 spi-max-frequency = <1000000>;
843                 pinctrl-names = "default";
844                 pinctrl-0 = <&h1_int_od_l>;
845                 interrupt-parent = <&pio>;
846                 interrupts = <153 IRQ_TYPE_EDGE_RISING>;
847         };
848 };
849
850 &spi1 {
851         pinctrl-names = "default";
852         pinctrl-0 = <&spi1_pins>;
853         mediatek,pad-select = <0>;
854         status = "okay";
855
856         w25q64dw: flash@0 {
857                 compatible = "winbond,w25q64dw", "jedec,spi-nor";
858                 reg = <0>;
859                 spi-max-frequency = <25000000>;
860         };
861 };
862
863 &spi2 {
864         pinctrl-names = "default";
865         pinctrl-0 = <&spi2_pins>;
866         mediatek,pad-select = <0>;
867         status = "okay";
868
869         cros_ec: cros-ec@0 {
870                 compatible = "google,cros-ec-spi";
871                 reg = <0>;
872                 spi-max-frequency = <3000000>;
873                 interrupt-parent = <&pio>;
874                 interrupts = <151 IRQ_TYPE_LEVEL_LOW>;
875                 pinctrl-names = "default";
876                 pinctrl-0 = <&ec_ap_int_odl>;
877
878                 i2c_tunnel: i2c-tunnel {
879                         compatible = "google,cros-ec-i2c-tunnel";
880                         google,remote-bus = <1>;
881                         #address-cells = <1>;
882                         #size-cells = <0>;
883                 };
884
885                 usbc_extcon: extcon0 {
886                         compatible = "google,extcon-usbc-cros-ec";
887                         google,usb-port-id = <0>;
888                 };
889
890                 cbas {
891                         compatible = "google,cros-cbas";
892                 };
893
894                 typec {
895                         compatible = "google,cros-ec-typec";
896                         #address-cells = <1>;
897                         #size-cells = <0>;
898
899                         usb_c0: connector@0 {
900                                 compatible = "usb-c-connector";
901                                 reg = <0>;
902                                 power-role = "dual";
903                                 data-role = "host";
904                                 try-power-role = "sink";
905                         };
906                 };
907         };
908 };
909
910 &spi3 {
911         pinctrl-names = "default";
912         pinctrl-0 = <&spi3_pins>;
913         mediatek,pad-select = <0>;
914         status = "disabled";
915 };
916
917 &spi4 {
918         pinctrl-names = "default";
919         pinctrl-0 = <&spi4_pins>;
920         mediatek,pad-select = <0>;
921         status = "disabled";
922 };
923
924 &spi5 {
925         pinctrl-names = "default";
926         pinctrl-0 = <&spi5_pins>;
927         mediatek,pad-select = <0>;
928         status = "disabled";
929 };
930
931 &ssusb {
932         dr_mode = "host";
933         wakeup-source;
934         vusb33-supply = <&mt6358_vusb_reg>;
935         status = "okay";
936 };
937
938 &thermal_zones {
939         tboard1 {
940                 polling-delay = <1000>; /* milliseconds */
941                 polling-delay-passive = <0>; /* milliseconds */
942                 thermal-sensors = <&tboard_thermistor1>;
943         };
944
945         tboard2 {
946                 polling-delay = <1000>; /* milliseconds */
947                 polling-delay-passive = <0>; /* milliseconds */
948                 thermal-sensors = <&tboard_thermistor2>;
949         };
950 };
951
952 &u3phy {
953         status = "okay";
954 };
955
956 &uart0 {
957         pinctrl-names = "default";
958         pinctrl-0 = <&uart0_pins_default>;
959         status = "okay";
960 };
961
962 &uart1 {
963         pinctrl-names = "default", "sleep";
964         pinctrl-0 = <&uart1_pins_default>;
965         pinctrl-1 = <&uart1_pins_sleep>;
966         status = "okay";
967         interrupts-extended = <&sysirq GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>,
968                               <&pio 121 IRQ_TYPE_EDGE_FALLING>;
969
970         bluetooth: bluetooth {
971                 pinctrl-names = "default";
972                 pinctrl-0 = <&bt_pins>;
973                 status = "okay";
974                 compatible = "qcom,qca6174-bt";
975                 enable-gpios = <&pio 120 0>;
976                 clocks = <&clk32k>;
977                 firmware-name = "nvm_00440302_i2s.bin";
978         };
979 };
980
981 &usb_host {
982         #address-cells = <1>;
983         #size-cells = <0>;
984         vusb33-supply = <&mt6358_vusb_reg>;
985         status = "okay";
986
987         hub@1 {
988                 compatible = "usb5e3,610";
989                 reg = <1>;
990         };
991 };
992
993 #include <arm/cros-ec-keyboard.dtsi>
994 #include <arm/cros-ec-sbs.dtsi>