arch/arm64/boot/dts/freescale/imx93.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright 2022 NXP
   4  */
   5
   6 #include <dt-bindings/clock/imx93-clock.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/fsl,imx93-power.h>
  11 #include <dt-bindings/thermal/thermal.h>
  12
  13 #include "imx93-pinfunc.h"
  14
  15 / {
  16         interrupt-parent = <&gic>;
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 gpio0 = &gpio1;
  22                 gpio1 = &gpio2;
  23                 gpio2 = &gpio3;
  24                 gpio3 = &gpio4;
  25                 i2c0 = &lpi2c1;
  26                 i2c1 = &lpi2c2;
  27                 i2c2 = &lpi2c3;
  28                 i2c3 = &lpi2c4;
  29                 i2c4 = &lpi2c5;
  30                 i2c5 = &lpi2c6;
  31                 i2c6 = &lpi2c7;
  32                 i2c7 = &lpi2c8;
  33                 mmc0 = &usdhc1;
  34                 mmc1 = &usdhc2;
  35                 mmc2 = &usdhc3;
  36                 serial0 = &lpuart1;
  37                 serial1 = &lpuart2;
  38                 serial2 = &lpuart3;
  39                 serial3 = &lpuart4;
  40                 serial4 = &lpuart5;
  41                 serial5 = &lpuart6;
  42                 serial6 = &lpuart7;
  43                 serial7 = &lpuart8;
  44         };
  45
  46         cpus {
  47                 #address-cells = <1>;
  48                 #size-cells = <0>;
  49
  50                 idle-states {
  51                         entry-method = "psci";
  52
  53                         cpu_pd_wait: cpu-pd-wait {
  54                                 compatible = "arm,idle-state";
  55                                 arm,psci-suspend-param = <0x0010033>;
  56                                 local-timer-stop;
  57                                 entry-latency-us = <10000>;
  58                                 exit-latency-us = <7000>;
  59                                 min-residency-us = <27000>;
  60                                 wakeup-latency-us = <15000>;
  61                         };
  62                 };
  63
  64                 A55_0: cpu@0 {
  65                         device_type = "cpu";
  66                         compatible = "arm,cortex-a55";
  67                         reg = <0x0>;
  68                         enable-method = "psci";
  69                         #cooling-cells = <2>;
  70                         cpu-idle-states = <&cpu_pd_wait>;
  71                 };
  72
  73                 A55_1: cpu@100 {
  74                         device_type = "cpu";
  75                         compatible = "arm,cortex-a55";
  76                         reg = <0x100>;
  77                         enable-method = "psci";
  78                         #cooling-cells = <2>;
  79                         cpu-idle-states = <&cpu_pd_wait>;
  80                 };
  81
  82         };
  83
  84         osc_32k: clock-osc-32k {
  85                 compatible = "fixed-clock";
  86                 #clock-cells = <0>;
  87                 clock-frequency = <32768>;
  88                 clock-output-names = "osc_32k";
  89         };
  90
  91         osc_24m: clock-osc-24m {
  92                 compatible = "fixed-clock";
  93                 #clock-cells = <0>;
  94                 clock-frequency = <24000000>;
  95                 clock-output-names = "osc_24m";
  96         };
  97
  98         clk_ext1: clock-ext1 {
  99                 compatible = "fixed-clock";
 100                 #clock-cells = <0>;
 101                 clock-frequency = <133000000>;
 102                 clock-output-names = "clk_ext1";
 103         };
 104
 105         pmu {
 106                 compatible = "arm,cortex-a55-pmu";
 107                 interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
 108         };
 109
 110         psci {
 111                 compatible = "arm,psci-1.0";
 112                 method = "smc";
 113         };
 114
 115         timer {
 116                 compatible = "arm,armv8-timer";
 117                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 118                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 119                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
 120                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
 121                 clock-frequency = <24000000>;
 122                 arm,no-tick-in-suspend;
 123                 interrupt-parent = <&gic>;
 124         };
 125
 126         gic: interrupt-controller@48000000 {
 127                 compatible = "arm,gic-v3";
 128                 reg = <0 0x48000000 0 0x10000>,
 129                       <0 0x48040000 0 0xc0000>;
 130                 #interrupt-cells = <3>;
 131                 interrupt-controller;
 132                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 133                 interrupt-parent = <&gic>;
 134         };
 135
 136         thermal-zones {
 137                 cpu-thermal {
 138                         polling-delay-passive = <250>;
 139                         polling-delay = <2000>;
 140
 141                         thermal-sensors = <&tmu 0>;
 142
 143                         trips {
 144                                 cpu_alert: cpu-alert {
 145                                         temperature = <80000>;
 146                                         hysteresis = <2000>;
 147                                         type = "passive";
 148                                 };
 149
 150                                 cpu_crit: cpu-crit {
 151                                         temperature = <90000>;
 152                                         hysteresis = <2000>;
 153                                         type = "critical";
 154                                 };
 155                         };
 156
 157                         cooling-maps {
 158                                 map0 {
 159                                         trip = <&cpu_alert>;
 160                                         cooling-device =
 161                                                 <&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 162                                                 <&A55_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 163                                 };
 164                         };
 165                 };
 166         };
 167
 168         cm33: remoteproc-cm33 {
 169                 compatible = "fsl,imx93-cm33";
 170                 clocks = <&clk IMX93_CLK_CM33_GATE>;
 171                 status = "disabled";
 172         };
 173
 174         soc@0 {
 175                 compatible = "simple-bus";
 176                 #address-cells = <1>;
 177                 #size-cells = <1>;
 178                 ranges = <0x0 0x0 0x0 0x80000000>,
 179                          <0x28000000 0x0 0x28000000 0x10000000>;
 180
 181                 aips1: bus@44000000 {
 182                         compatible = "fsl,aips-bus", "simple-bus";
 183                         reg = <0x44000000 0x800000>;
 184                         #address-cells = <1>;
 185                         #size-cells = <1>;
 186                         ranges;
 187
 188                         anomix_ns_gpr: syscon@44210000 {
 189                                 compatible = "fsl,imx93-aonmix-ns-syscfg", "syscon";
 190                                 reg = <0x44210000 0x1000>;
 191                         };
 192
 193                         mu1: mailbox@44230000 {
 194                                 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 195                                 reg = <0x44230000 0x10000>;
 196                                 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 197                                 clocks = <&clk IMX93_CLK_MU1_B_GATE>;
 198                                 #mbox-cells = <2>;
 199                                 status = "disabled";
 200                         };
 201
 202                         system_counter: timer@44290000 {
 203                                 compatible = "nxp,sysctr-timer";
 204                                 reg = <0x44290000 0x30000>;
 205                                 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 206                                 clocks = <&osc_24m>;
 207                                 clock-names = "per";
 208                                 nxp,no-divider;
 209                         };
 210
 211                         wdog1: watchdog@442d0000 {
 212                                 compatible = "fsl,imx93-wdt";
 213                                 reg = <0x442d0000 0x10000>;
 214                                 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 215                                 clocks = <&clk IMX93_CLK_WDOG1_GATE>;
 216                                 timeout-sec = <40>;
 217                                 status = "disabled";
 218                         };
 219
 220                         wdog2: watchdog@442e0000 {
 221                                 compatible = "fsl,imx93-wdt";
 222                                 reg = <0x442e0000 0x10000>;
 223                                 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 224                                 clocks = <&clk IMX93_CLK_WDOG2_GATE>;
 225                                 timeout-sec = <40>;
 226                                 status = "disabled";
 227                         };
 228
 229                         tpm1: pwm@44310000 {
 230                                 compatible = "fsl,imx7ulp-pwm";
 231                                 reg = <0x44310000 0x1000>;
 232                                 clocks = <&clk IMX93_CLK_TPM1_GATE>;
 233                                 #pwm-cells = <3>;
 234                                 status = "disabled";
 235                         };
 236
 237                         tpm2: pwm@44320000 {
 238                                 compatible = "fsl,imx7ulp-pwm";
 239                                 reg = <0x44320000 0x10000>;
 240                                 clocks = <&clk IMX93_CLK_TPM2_GATE>;
 241                                 #pwm-cells = <3>;
 242                                 status = "disabled";
 243                         };
 244
 245                         lpi2c1: i2c@44340000 {
 246                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 247                                 reg = <0x44340000 0x10000>;
 248                                 #address-cells = <1>;
 249                                 #size-cells = <0>;
 250                                 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 251                                 clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
 252                                          <&clk IMX93_CLK_BUS_AON>;
 253                                 clock-names = "per", "ipg";
 254                                 status = "disabled";
 255                         };
 256
 257                         lpi2c2: i2c@44350000 {
 258                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 259                                 reg = <0x44350000 0x10000>;
 260                                 #address-cells = <1>;
 261                                 #size-cells = <0>;
 262                                 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 263                                 clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
 264                                          <&clk IMX93_CLK_BUS_AON>;
 265                                 clock-names = "per", "ipg";
 266                                 status = "disabled";
 267                         };
 268
 269                         lpspi1: spi@44360000 {
 270                                 #address-cells = <1>;
 271                                 #size-cells = <0>;
 272                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 273                                 reg = <0x44360000 0x10000>;
 274                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 275                                 clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
 276                                          <&clk IMX93_CLK_BUS_AON>;
 277                                 clock-names = "per", "ipg";
 278                                 status = "disabled";
 279                         };
 280
 281                         lpspi2: spi@44370000 {
 282                                 #address-cells = <1>;
 283                                 #size-cells = <0>;
 284                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 285                                 reg = <0x44370000 0x10000>;
 286                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 287                                 clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
 288                                          <&clk IMX93_CLK_BUS_AON>;
 289                                 clock-names = "per", "ipg";
 290                                 status = "disabled";
 291                         };
 292
 293                         lpuart1: serial@44380000 {
 294                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 295                                 reg = <0x44380000 0x1000>;
 296                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 297                                 clocks = <&clk IMX93_CLK_LPUART1_GATE>;
 298                                 clock-names = "ipg";
 299                                 status = "disabled";
 300                         };
 301
 302                         lpuart2: serial@44390000 {
 303                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 304                                 reg = <0x44390000 0x1000>;
 305                                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 306                                 clocks = <&clk IMX93_CLK_LPUART2_GATE>;
 307                                 clock-names = "ipg";
 308                                 status = "disabled";
 309                         };
 310
 311                         flexcan1: can@443a0000 {
 312                                 compatible = "fsl,imx93-flexcan";
 313                                 reg = <0x443a0000 0x10000>;
 314                                 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 315                                 clocks = <&clk IMX93_CLK_BUS_AON>,
 316                                          <&clk IMX93_CLK_CAN1_GATE>;
 317                                 clock-names = "ipg", "per";
 318                                 assigned-clocks = <&clk IMX93_CLK_CAN1>;
 319                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 320                                 assigned-clock-rates = <40000000>;
 321                                 fsl,clk-source = /bits/ 8 <0>;
 322                                 status = "disabled";
 323                         };
 324
 325                         iomuxc: pinctrl@443c0000 {
 326                                 compatible = "fsl,imx93-iomuxc";
 327                                 reg = <0x443c0000 0x10000>;
 328                                 status = "okay";
 329                         };
 330
 331                         bbnsm: bbnsm@44440000 {
 332                                 compatible = "nxp,imx93-bbnsm", "syscon", "simple-mfd";
 333                                 reg = <0x44440000 0x10000>;
 334
 335                                 bbnsm_rtc: rtc {
 336                                         compatible = "nxp,imx93-bbnsm-rtc";
 337                                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 338                                 };
 339
 340                                 bbnsm_pwrkey: pwrkey {
 341                                         compatible = "nxp,imx93-bbnsm-pwrkey";
 342                                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 343                                         linux,code = <KEY_POWER>;
 344                                 };
 345                         };
 346
 347                         clk: clock-controller@44450000 {
 348                                 compatible = "fsl,imx93-ccm";
 349                                 reg = <0x44450000 0x10000>;
 350                                 #clock-cells = <1>;
 351                                 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>;
 352                                 clock-names = "osc_32k", "osc_24m", "clk_ext1";
 353                                 status = "okay";
 354                         };
 355
 356                         src: system-controller@44460000 {
 357                                 compatible = "fsl,imx93-src", "syscon";
 358                                 reg = <0x44460000 0x10000>;
 359                                 #address-cells = <1>;
 360                                 #size-cells = <1>;
 361                                 ranges;
 362
 363                                 mlmix: power-domain@44461800 {
 364                                         compatible = "fsl,imx93-src-slice";
 365                                         reg = <0x44461800 0x400>, <0x44464800 0x400>;
 366                                         #power-domain-cells = <0>;
 367                                         clocks = <&clk IMX93_CLK_ML_APB>,
 368                                                  <&clk IMX93_CLK_ML>;
 369                                 };
 370
 371                                 mediamix: power-domain@44462400 {
 372                                         compatible = "fsl,imx93-src-slice";
 373                                         reg = <0x44462400 0x400>, <0x44465800 0x400>;
 374                                         #power-domain-cells = <0>;
 375                                         clocks = <&clk IMX93_CLK_MEDIA_AXI>,
 376                                                  <&clk IMX93_CLK_MEDIA_APB>;
 377                                 };
 378                         };
 379
 380                         anatop: anatop@44480000 {
 381                                 compatible = "fsl,imx93-anatop", "syscon";
 382                                 reg = <0x44480000 0x2000>;
 383                         };
 384
 385                         tmu: tmu@44482000 {
 386                                 compatible = "fsl,qoriq-tmu";
 387                                 reg = <0x44482000 0x1000>;
 388                                 clocks = <&clk IMX93_CLK_TMC_GATE>;
 389                                 little-endian;
 390                                 fsl,tmu-range = <0x800000da 0x800000e9
 391                                                  0x80000102 0x8000012a
 392                                                  0x80000166 0x800001a7
 393                                                  0x800001b6>;
 394                                 fsl,tmu-calibration = <0x00000000 0x0000000e
 395                                                        0x00000001 0x00000029
 396                                                        0x00000002 0x00000056
 397                                                        0x00000003 0x000000a2
 398                                                        0x00000004 0x00000116
 399                                                        0x00000005 0x00000195
 400                                                        0x00000006 0x000001b2>;
 401                                 #thermal-sensor-cells = <1>;
 402                         };
 403
 404
 405                         adc1: adc@44530000 {
 406                                 compatible = "nxp,imx93-adc";
 407                                 reg = <0x44530000 0x10000>;
 408                                 interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 409                                              <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 410                                              <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 411                                              <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
 412                                 clocks = <&clk IMX93_CLK_ADC1_GATE>;
 413                                 clock-names = "ipg";
 414                                 #io-channel-cells = <1>;
 415                                 status = "disabled";
 416                         };
 417                 };
 418
 419                 aips2: bus@42000000 {
 420                         compatible = "fsl,aips-bus", "simple-bus";
 421                         reg = <0x42000000 0x800000>;
 422                         #address-cells = <1>;
 423                         #size-cells = <1>;
 424                         ranges;
 425
 426                         wakeupmix_gpr: syscon@42420000 {
 427                                 compatible = "fsl,imx93-wakeupmix-syscfg", "syscon";
 428                                 reg = <0x42420000 0x1000>;
 429                         };
 430
 431                         mu2: mailbox@42440000 {
 432                                 compatible = "fsl,imx93-mu", "fsl,imx8ulp-mu";
 433                                 reg = <0x42440000 0x10000>;
 434                                 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
 435                                 clocks = <&clk IMX93_CLK_MU2_B_GATE>;
 436                                 #mbox-cells = <2>;
 437                                 status = "disabled";
 438                         };
 439
 440                         wdog3: watchdog@42490000 {
 441                                 compatible = "fsl,imx93-wdt";
 442                                 reg = <0x42490000 0x10000>;
 443                                 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 444                                 clocks = <&clk IMX93_CLK_WDOG3_GATE>;
 445                                 timeout-sec = <40>;
 446                                 status = "disabled";
 447                         };
 448
 449                         wdog4: watchdog@424a0000 {
 450                                 compatible = "fsl,imx93-wdt";
 451                                 reg = <0x424a0000 0x10000>;
 452                                 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 453                                 clocks = <&clk IMX93_CLK_WDOG4_GATE>;
 454                                 timeout-sec = <40>;
 455                                 status = "disabled";
 456                         };
 457
 458                         wdog5: watchdog@424b0000 {
 459                                 compatible = "fsl,imx93-wdt";
 460                                 reg = <0x424b0000 0x10000>;
 461                                 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
 462                                 clocks = <&clk IMX93_CLK_WDOG5_GATE>;
 463                                 timeout-sec = <40>;
 464                                 status = "disabled";
 465                         };
 466
 467                         tpm3: pwm@424e0000 {
 468                                 compatible = "fsl,imx7ulp-pwm";
 469                                 reg = <0x424e0000 0x1000>;
 470                                 clocks = <&clk IMX93_CLK_TPM3_GATE>;
 471                                 #pwm-cells = <3>;
 472                                 status = "disabled";
 473                         };
 474
 475                         tpm4: pwm@424f0000 {
 476                                 compatible = "fsl,imx7ulp-pwm";
 477                                 reg = <0x424f0000 0x10000>;
 478                                 clocks = <&clk IMX93_CLK_TPM4_GATE>;
 479                                 #pwm-cells = <3>;
 480                                 status = "disabled";
 481                         };
 482
 483                         tpm5: pwm@42500000 {
 484                                 compatible = "fsl,imx7ulp-pwm";
 485                                 reg = <0x42500000 0x10000>;
 486                                 clocks = <&clk IMX93_CLK_TPM5_GATE>;
 487                                 #pwm-cells = <3>;
 488                                 status = "disabled";
 489                         };
 490
 491                         tpm6: pwm@42510000 {
 492                                 compatible = "fsl,imx7ulp-pwm";
 493                                 reg = <0x42510000 0x10000>;
 494                                 clocks = <&clk IMX93_CLK_TPM6_GATE>;
 495                                 #pwm-cells = <3>;
 496                                 status = "disabled";
 497                         };
 498
 499                         lpi2c3: i2c@42530000 {
 500                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 501                                 reg = <0x42530000 0x10000>;
 502                                 #address-cells = <1>;
 503                                 #size-cells = <0>;
 504                                 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 505                                 clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
 506                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 507                                 clock-names = "per", "ipg";
 508                                 status = "disabled";
 509                         };
 510
 511                         lpi2c4: i2c@42540000 {
 512                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 513                                 reg = <0x42540000 0x10000>;
 514                                 #address-cells = <1>;
 515                                 #size-cells = <0>;
 516                                 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 517                                 clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
 518                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 519                                 clock-names = "per", "ipg";
 520                                 status = "disabled";
 521                         };
 522
 523                         lpspi3: spi@42550000 {
 524                                 #address-cells = <1>;
 525                                 #size-cells = <0>;
 526                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 527                                 reg = <0x42550000 0x10000>;
 528                                 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 529                                 clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
 530                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 531                                 clock-names = "per", "ipg";
 532                                 status = "disabled";
 533                         };
 534
 535                         lpspi4: spi@42560000 {
 536                                 #address-cells = <1>;
 537                                 #size-cells = <0>;
 538                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 539                                 reg = <0x42560000 0x10000>;
 540                                 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 541                                 clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
 542                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 543                                 clock-names = "per", "ipg";
 544                                 status = "disabled";
 545                         };
 546
 547                         lpuart3: serial@42570000 {
 548                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 549                                 reg = <0x42570000 0x1000>;
 550                                 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
 551                                 clocks = <&clk IMX93_CLK_LPUART3_GATE>;
 552                                 clock-names = "ipg";
 553                                 status = "disabled";
 554                         };
 555
 556                         lpuart4: serial@42580000 {
 557                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 558                                 reg = <0x42580000 0x1000>;
 559                                 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 560                                 clocks = <&clk IMX93_CLK_LPUART4_GATE>;
 561                                 clock-names = "ipg";
 562                                 status = "disabled";
 563                         };
 564
 565                         lpuart5: serial@42590000 {
 566                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 567                                 reg = <0x42590000 0x1000>;
 568                                 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 569                                 clocks = <&clk IMX93_CLK_LPUART5_GATE>;
 570                                 clock-names = "ipg";
 571                                 status = "disabled";
 572                         };
 573
 574                         lpuart6: serial@425a0000 {
 575                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 576                                 reg = <0x425a0000 0x1000>;
 577                                 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 578                                 clocks = <&clk IMX93_CLK_LPUART6_GATE>;
 579                                 clock-names = "ipg";
 580                                 status = "disabled";
 581                         };
 582
 583                         flexcan2: can@425b0000 {
 584                                 compatible = "fsl,imx93-flexcan";
 585                                 reg = <0x425b0000 0x10000>;
 586                                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 587                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 588                                          <&clk IMX93_CLK_CAN2_GATE>;
 589                                 clock-names = "ipg", "per";
 590                                 assigned-clocks = <&clk IMX93_CLK_CAN2>;
 591                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 592                                 assigned-clock-rates = <40000000>;
 593                                 fsl,clk-source = /bits/ 8 <0>;
 594                                 status = "disabled";
 595                         };
 596
 597                         flexspi1: spi@425e0000 {
 598                                 compatible = "nxp,imx8mm-fspi";
 599                                 reg = <0x425e0000 0x10000>, <0x28000000 0x10000000>;
 600                                 reg-names = "fspi_base", "fspi_mmap";
 601                                 #address-cells = <1>;
 602                                 #size-cells = <0>;
 603                                 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
 604                                 clocks = <&clk IMX93_CLK_FLEXSPI1_GATE>,
 605                                          <&clk IMX93_CLK_FLEXSPI1_GATE>;
 606                                 clock-names = "fspi_en", "fspi";
 607                                 assigned-clocks = <&clk IMX93_CLK_FLEXSPI1>;
 608                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
 609                                 status = "disabled";
 610                         };
 611
 612                         lpuart7: serial@42690000 {
 613                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 614                                 reg = <0x42690000 0x1000>;
 615                                 interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
 616                                 clocks = <&clk IMX93_CLK_LPUART7_GATE>;
 617                                 clock-names = "ipg";
 618                                 status = "disabled";
 619                         };
 620
 621                         lpuart8: serial@426a0000 {
 622                                 compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
 623                                 reg = <0x426a0000 0x1000>;
 624                                 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
 625                                 clocks = <&clk IMX93_CLK_LPUART8_GATE>;
 626                                 clock-names = "ipg";
 627                                 status = "disabled";
 628                         };
 629
 630                         lpi2c5: i2c@426b0000 {
 631                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 632                                 reg = <0x426b0000 0x10000>;
 633                                 #address-cells = <1>;
 634                                 #size-cells = <0>;
 635                                 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
 636                                 clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
 637                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 638                                 clock-names = "per", "ipg";
 639                                 status = "disabled";
 640                         };
 641
 642                         lpi2c6: i2c@426c0000 {
 643                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 644                                 reg = <0x426c0000 0x10000>;
 645                                 #address-cells = <1>;
 646                                 #size-cells = <0>;
 647                                 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
 648                                 clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
 649                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 650                                 clock-names = "per", "ipg";
 651                                 status = "disabled";
 652                         };
 653
 654                         lpi2c7: i2c@426d0000 {
 655                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 656                                 reg = <0x426d0000 0x10000>;
 657                                 #address-cells = <1>;
 658                                 #size-cells = <0>;
 659                                 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 660                                 clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
 661                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 662                                 clock-names = "per", "ipg";
 663                                 status = "disabled";
 664                         };
 665
 666                         lpi2c8: i2c@426e0000 {
 667                                 compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c";
 668                                 reg = <0x426e0000 0x10000>;
 669                                 #address-cells = <1>;
 670                                 #size-cells = <0>;
 671                                 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
 672                                 clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
 673                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 674                                 clock-names = "per", "ipg";
 675                                 status = "disabled";
 676                         };
 677
 678                         lpspi5: spi@426f0000 {
 679                                 #address-cells = <1>;
 680                                 #size-cells = <0>;
 681                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 682                                 reg = <0x426f0000 0x10000>;
 683                                 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
 684                                 clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
 685                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 686                                 clock-names = "per", "ipg";
 687                                 status = "disabled";
 688                         };
 689
 690                         lpspi6: spi@42700000 {
 691                                 #address-cells = <1>;
 692                                 #size-cells = <0>;
 693                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 694                                 reg = <0x42700000 0x10000>;
 695                                 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 696                                 clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
 697                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 698                                 clock-names = "per", "ipg";
 699                                 status = "disabled";
 700                         };
 701
 702                         lpspi7: spi@42710000 {
 703                                 #address-cells = <1>;
 704                                 #size-cells = <0>;
 705                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 706                                 reg = <0x42710000 0x10000>;
 707                                 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
 708                                 clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
 709                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 710                                 clock-names = "per", "ipg";
 711                                 status = "disabled";
 712                         };
 713
 714                         lpspi8: spi@42720000 {
 715                                 #address-cells = <1>;
 716                                 #size-cells = <0>;
 717                                 compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
 718                                 reg = <0x42720000 0x10000>;
 719                                 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
 720                                 clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
 721                                          <&clk IMX93_CLK_BUS_WAKEUP>;
 722                                 clock-names = "per", "ipg";
 723                                 status = "disabled";
 724                         };
 725
 726                 };
 727
 728                 aips3: bus@42800000 {
 729                         compatible = "fsl,aips-bus", "simple-bus";
 730                         reg = <0x42800000 0x800000>;
 731                         #address-cells = <1>;
 732                         #size-cells = <1>;
 733                         ranges;
 734
 735                         usdhc1: mmc@42850000 {
 736                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 737                                 reg = <0x42850000 0x10000>;
 738                                 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 739                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 740                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 741                                          <&clk IMX93_CLK_USDHC1_GATE>;
 742                                 clock-names = "ipg", "ahb", "per";
 743                                 bus-width = <8>;
 744                                 fsl,tuning-start-tap = <20>;
 745                                 fsl,tuning-step = <2>;
 746                                 status = "disabled";
 747                         };
 748
 749                         usdhc2: mmc@42860000 {
 750                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 751                                 reg = <0x42860000 0x10000>;
 752                                 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 753                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 754                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 755                                          <&clk IMX93_CLK_USDHC2_GATE>;
 756                                 clock-names = "ipg", "ahb", "per";
 757                                 bus-width = <4>;
 758                                 fsl,tuning-start-tap = <20>;
 759                                 fsl,tuning-step = <2>;
 760                                 status = "disabled";
 761                         };
 762
 763                         fec: ethernet@42890000 {
 764                                 compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
 765                                 reg = <0x42890000 0x10000>;
 766                                 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
 767                                              <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
 768                                              <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
 769                                              <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
 770                                 clocks = <&clk IMX93_CLK_ENET1_GATE>,
 771                                          <&clk IMX93_CLK_ENET1_GATE>,
 772                                          <&clk IMX93_CLK_ENET_TIMER1>,
 773                                          <&clk IMX93_CLK_ENET_REF>,
 774                                          <&clk IMX93_CLK_ENET_REF_PHY>;
 775                                 clock-names = "ipg", "ahb", "ptp",
 776                                               "enet_clk_ref", "enet_out";
 777                                 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
 778                                                   <&clk IMX93_CLK_ENET_REF>,
 779                                                   <&clk IMX93_CLK_ENET_REF_PHY>;
 780                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
 781                                                          <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>,
 782                                                          <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
 783                                 assigned-clock-rates = <100000000>, <250000000>, <50000000>;
 784                                 fsl,num-tx-queues = <3>;
 785                                 fsl,num-rx-queues = <3>;
 786                                 fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
 787                                 status = "disabled";
 788                         };
 789
 790                         eqos: ethernet@428a0000 {
 791                                 compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a";
 792                                 reg = <0x428a0000 0x10000>;
 793                                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
 794                                              <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
 795                                 interrupt-names = "macirq", "eth_wake_irq";
 796                                 clocks = <&clk IMX93_CLK_ENET_QOS_GATE>,
 797                                          <&clk IMX93_CLK_ENET_QOS_GATE>,
 798                                          <&clk IMX93_CLK_ENET_TIMER2>,
 799                                          <&clk IMX93_CLK_ENET>,
 800                                          <&clk IMX93_CLK_ENET_QOS_GATE>;
 801                                 clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "mem";
 802                                 assigned-clocks = <&clk IMX93_CLK_ENET_TIMER2>,
 803                                                   <&clk IMX93_CLK_ENET>;
 804                                 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
 805                                                          <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
 806                                 assigned-clock-rates = <100000000>, <250000000>;
 807                                 intf_mode = <&wakeupmix_gpr 0x28>;
 808                                 snps,clk-csr = <0>;
 809                                 status = "disabled";
 810                         };
 811
 812                         usdhc3: mmc@428b0000 {
 813                                 compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
 814                                 reg = <0x428b0000 0x10000>;
 815                                 interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
 816                                 clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
 817                                          <&clk IMX93_CLK_WAKEUP_AXI>,
 818                                          <&clk IMX93_CLK_USDHC3_GATE>;
 819                                 clock-names = "ipg", "ahb", "per";
 820                                 bus-width = <4>;
 821                                 fsl,tuning-start-tap = <20>;
 822                                 fsl,tuning-step = <2>;
 823                                 status = "disabled";
 824                         };
 825                 };
 826
 827                 gpio2: gpio@43810080 {
 828                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 829                         reg = <0x43810080 0x1000>, <0x43810040 0x40>;
 830                         gpio-controller;
 831                         #gpio-cells = <2>;
 832                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 833                         interrupt-controller;
 834                         #interrupt-cells = <2>;
 835                         clocks = <&clk IMX93_CLK_GPIO2_GATE>,
 836                                  <&clk IMX93_CLK_GPIO2_GATE>;
 837                         clock-names = "gpio", "port";
 838                         gpio-ranges = <&iomuxc 0 4 30>;
 839                 };
 840
 841                 gpio3: gpio@43820080 {
 842                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 843                         reg = <0x43820080 0x1000>, <0x43820040 0x40>;
 844                         gpio-controller;
 845                         #gpio-cells = <2>;
 846                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 847                         interrupt-controller;
 848                         #interrupt-cells = <2>;
 849                         clocks = <&clk IMX93_CLK_GPIO3_GATE>,
 850                                  <&clk IMX93_CLK_GPIO3_GATE>;
 851                         clock-names = "gpio", "port";
 852                         gpio-ranges = <&iomuxc 0 84 8>, <&iomuxc 8 66 18>,
 853                                       <&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
 854                 };
 855
 856                 gpio4: gpio@43830080 {
 857                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 858                         reg = <0x43830080 0x1000>, <0x43830040 0x40>;
 859                         gpio-controller;
 860                         #gpio-cells = <2>;
 861                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
 862                         interrupt-controller;
 863                         #interrupt-cells = <2>;
 864                         clocks = <&clk IMX93_CLK_GPIO4_GATE>,
 865                                  <&clk IMX93_CLK_GPIO4_GATE>;
 866                         clock-names = "gpio", "port";
 867                         gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
 868                 };
 869
 870                 gpio1: gpio@47400080 {
 871                         compatible = "fsl,imx93-gpio", "fsl,imx7ulp-gpio";
 872                         reg = <0x47400080 0x1000>, <0x47400040 0x40>;
 873                         gpio-controller;
 874                         #gpio-cells = <2>;
 875                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 876                         interrupt-controller;
 877                         #interrupt-cells = <2>;
 878                         clocks = <&clk IMX93_CLK_GPIO1_GATE>,
 879                                  <&clk IMX93_CLK_GPIO1_GATE>;
 880                         clock-names = "gpio", "port";
 881                         gpio-ranges = <&iomuxc 0 92 16>;
 882                 };
 883
 884                 ocotp: efuse@47510000 {
 885                         compatible = "fsl,imx93-ocotp", "syscon";
 886                         reg = <0x47510000 0x10000>;
 887                         #address-cells = <1>;
 888                         #size-cells = <1>;
 889                 };
 890
 891                 s4muap: mailbox@47520000 {
 892                         compatible = "fsl,imx93-mu-s4";
 893                         reg = <0x47520000 0x10000>;
 894                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
 895                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 896                         interrupt-names = "tx", "rx";
 897                         #mbox-cells = <2>;
 898                 };
 899
 900                 media_blk_ctrl: system-controller@4ac10000 {
 901                         compatible = "fsl,imx93-media-blk-ctrl", "syscon";
 902                         reg = <0x4ac10000 0x10000>;
 903                         power-domains = <&mediamix>;
 904                         clocks = <&clk IMX93_CLK_MEDIA_APB>,
 905                                  <&clk IMX93_CLK_MEDIA_AXI>,
 906                                  <&clk IMX93_CLK_NIC_MEDIA_GATE>,
 907                                  <&clk IMX93_CLK_MEDIA_DISP_PIX>,
 908                                  <&clk IMX93_CLK_CAM_PIX>,
 909                                  <&clk IMX93_CLK_PXP_GATE>,
 910                                  <&clk IMX93_CLK_LCDIF_GATE>,
 911                                  <&clk IMX93_CLK_ISI_GATE>,
 912                                  <&clk IMX93_CLK_MIPI_CSI_GATE>,
 913                                  <&clk IMX93_CLK_MIPI_DSI_GATE>;
 914                         clock-names = "apb", "axi", "nic", "disp", "cam",
 915                                       "pxp", "lcdif", "isi", "csi", "dsi";
 916                         #power-domain-cells = <1>;
 917                         status = "disabled";
 918                 };
 919
 920                 ddr-pmu@4e300dc0 {
 921                         compatible = "fsl,imx93-ddr-pmu";
 922                         reg = <0x4e300dc0 0x200>;
 923                         interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
 924                 };
 925         };
 926 };