arch/arm64/boot/dts/freescale/imx8qxp-mek.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2017~2018 NXP
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "imx8qxp.dtsi"
   9 #include <dt-bindings/usb/pd.h>
  10
  11 / {
  12         model = "Freescale i.MX8QXP MEK";
  13         compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp";
  14
  15         chosen {
  16                 stdout-path = &lpuart0;
  17         };
  18
  19         memory@80000000 {
  20                 device_type = "memory";
  21                 reg = <0x00000000 0x80000000 0 0x40000000>;
  22         };
  23
  24         reg_usdhc2_vmmc: usdhc2-vmmc {
  25                 compatible = "regulator-fixed";
  26                 regulator-name = "SD1_SPWR";
  27                 regulator-min-microvolt = <3000000>;
  28                 regulator-max-microvolt = <3000000>;
  29                 gpio = <&lsio_gpio4 19 GPIO_ACTIVE_HIGH>;
  30                 enable-active-high;
  31         };
  32
  33         gpio-sbu-mux {
  34                 compatible = "gpio-sbu-mux";
  35                 pinctrl-names = "default";
  36                 pinctrl-0 = <&pinctrl_typec_mux>;
  37                 select-gpios = <&lsio_gpio5 9 GPIO_ACTIVE_HIGH>;
  38                 enable-gpios = <&pca9557_a 7 GPIO_ACTIVE_LOW>;
  39                 orientation-switch;
  40
  41                 port {
  42                         usb3_data_ss: endpoint {
  43                                 remote-endpoint = <&typec_con_ss>;
  44                         };
  45                 };
  46         };
  47 };
  48
  49 &dsp {
  50         status = "okay";
  51 };
  52
  53 &fec1 {
  54         pinctrl-names = "default";
  55         pinctrl-0 = <&pinctrl_fec1>;
  56         phy-mode = "rgmii-id";
  57         phy-handle = <&ethphy0>;
  58         fsl,magic-packet;
  59         status = "okay";
  60
  61         mdio {
  62                 #address-cells = <1>;
  63                 #size-cells = <0>;
  64
  65                 ethphy0: ethernet-phy@0 {
  66                         compatible = "ethernet-phy-ieee802.3-c22";
  67                         reg = <0>;
  68                 };
  69         };
  70 };
  71
  72 &i2c1 {
  73         #address-cells = <1>;
  74         #size-cells = <0>;
  75         clock-frequency = <100000>;
  76         pinctrl-names = "default";
  77         pinctrl-0 = <&pinctrl_lpi2c1 &pinctrl_ioexp_rst>;
  78         status = "okay";
  79
  80         i2c-mux@71 {
  81                 compatible = "nxp,pca9646", "nxp,pca9546";
  82                 #address-cells = <1>;
  83                 #size-cells = <0>;
  84                 reg = <0x71>;
  85                 reset-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>;
  86
  87                 i2c@0 {
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         reg = <0>;
  91
  92                         max7322: gpio@68 {
  93                                 compatible = "maxim,max7322";
  94                                 reg = <0x68>;
  95                                 gpio-controller;
  96                                 #gpio-cells = <2>;
  97                         };
  98                 };
  99
 100                 i2c@1 {
 101                         #address-cells = <1>;
 102                         #size-cells = <0>;
 103                         reg = <1>;
 104                 };
 105
 106                 i2c@2 {
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109                         reg = <2>;
 110
 111                         pressure-sensor@60 {
 112                                 compatible = "fsl,mpl3115";
 113                                 reg = <0x60>;
 114                         };
 115                 };
 116
 117                 i2c@3 {
 118                         #address-cells = <1>;
 119                         #size-cells = <0>;
 120                         reg = <3>;
 121
 122                         pca9557_a: gpio@1a {
 123                                 compatible = "nxp,pca9557";
 124                                 reg = <0x1a>;
 125                                 gpio-controller;
 126                                 #gpio-cells = <2>;
 127                         };
 128
 129                         pca9557_b: gpio@1d {
 130                                 compatible = "nxp,pca9557";
 131                                 reg = <0x1d>;
 132                                 gpio-controller;
 133                                 #gpio-cells = <2>;
 134                         };
 135
 136                         light-sensor@44 {
 137                                 pinctrl-names = "default";
 138                                 pinctrl-0 = <&pinctrl_isl29023>;
 139                                 compatible = "isil,isl29023";
 140                                 reg = <0x44>;
 141                                 interrupt-parent = <&lsio_gpio1>;
 142                                 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
 143                         };
 144                 };
 145         };
 146
 147         ptn5110: tcpc@50 {
 148                 compatible = "nxp,ptn5110";
 149                 pinctrl-names = "default";
 150                 pinctrl-0 = <&pinctrl_typec>;
 151                 reg = <0x50>;
 152                 interrupt-parent = <&lsio_gpio1>;
 153                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
 154
 155                 port {
 156                         typec_dr_sw: endpoint {
 157                                 remote-endpoint = <&usb3_drd_sw>;
 158                         };
 159                 };
 160
 161                 usb_con1: connector {
 162                         compatible = "usb-c-connector";
 163                         label = "USB-C";
 164                         power-role = "source";
 165                         data-role = "dual";
 166                         source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
 167
 168                         ports {
 169                                 #address-cells = <1>;
 170                                 #size-cells = <0>;
 171
 172                                 port@1 {
 173                                         reg = <1>;
 174                                         typec_con_ss: endpoint {
 175                                                 remote-endpoint = <&usb3_data_ss>;
 176                                         };
 177                                 };
 178                         };
 179                 };
 180         };
 181
 182 };
 183
 184 &lpuart0 {
 185         pinctrl-names = "default";
 186         pinctrl-0 = <&pinctrl_lpuart0>;
 187         status = "okay";
 188 };
 189
 190 &mu_m0 {
 191         status = "okay";
 192 };
 193
 194 &mu1_m0 {
 195         status = "okay";
 196 };
 197
 198 &scu_key {
 199         status = "okay";
 200 };
 201
 202 &thermal_zones {
 203         pmic-thermal {
 204                 polling-delay-passive = <250>;
 205                 polling-delay = <2000>;
 206                 thermal-sensors = <&tsens IMX_SC_R_PMIC_0>;
 207
 208                 trips {
 209                         pmic_alert0: trip0 {
 210                                 temperature = <110000>;
 211                                 hysteresis = <2000>;
 212                                 type = "passive";
 213                         };
 214
 215                         pmic_crit0: trip1 {
 216                                 temperature = <125000>;
 217                                 hysteresis = <2000>;
 218                                 type = "critical";
 219                         };
 220                 };
 221
 222                 cooling-maps {
 223                         map0 {
 224                                 trip = <&pmic_alert0>;
 225                                 cooling-device =
 226                                         <&A35_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 227                                         <&A35_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 228                                         <&A35_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 229                                         <&A35_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 230                         };
 231                 };
 232         };
 233 };
 234
 235 &usdhc1 {
 236         assigned-clocks = <&clk IMX_SC_R_SDHC_0 IMX_SC_PM_CLK_PER>;
 237         assigned-clock-rates = <200000000>;
 238         pinctrl-names = "default";
 239         pinctrl-0 = <&pinctrl_usdhc1>;
 240         bus-width = <8>;
 241         no-sd;
 242         no-sdio;
 243         non-removable;
 244         status = "okay";
 245 };
 246
 247 &usdhc2 {
 248         assigned-clocks = <&clk IMX_SC_R_SDHC_1 IMX_SC_PM_CLK_PER>;
 249         assigned-clock-rates = <200000000>;
 250         pinctrl-names = "default";
 251         pinctrl-0 = <&pinctrl_usdhc2>;
 252         bus-width = <4>;
 253         vmmc-supply = <&reg_usdhc2_vmmc>;
 254         cd-gpios = <&lsio_gpio4 22 GPIO_ACTIVE_LOW>;
 255         wp-gpios = <&lsio_gpio4 21 GPIO_ACTIVE_HIGH>;
 256         status = "okay";
 257 };
 258
 259 &usb3_phy {
 260         status = "okay";
 261 };
 262
 263 &usbotg3 {
 264         status = "okay";
 265 };
 266
 267 &usbotg3_cdns3 {
 268         dr_mode = "otg";
 269         usb-role-switch;
 270         status = "okay";
 271
 272         port {
 273                 usb3_drd_sw: endpoint {
 274                         remote-endpoint = <&typec_dr_sw>;
 275                 };
 276         };
 277 };
 278
 279
 280 &vpu {
 281         compatible = "nxp,imx8qxp-vpu";
 282         status = "okay";
 283 };
 284
 285 &vpu_core0 {
 286         reg = <0x2d040000 0x10000>;
 287         memory-region = <&decoder_boot>, <&decoder_rpc>;
 288         status = "okay";
 289 };
 290
 291 &vpu_core1 {
 292         reg = <0x2d050000 0x10000>;
 293         memory-region = <&encoder_boot>, <&encoder_rpc>;
 294         status = "okay";
 295 };
 296
 297 &iomuxc {
 298         pinctrl_fec1: fec1grp {
 299                 fsl,pins = <
 300                         IMX8QXP_ENET0_MDC_CONN_ENET0_MDC                        0x06000020
 301                         IMX8QXP_ENET0_MDIO_CONN_ENET0_MDIO                      0x06000020
 302                         IMX8QXP_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL      0x06000020
 303                         IMX8QXP_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC            0x06000020
 304                         IMX8QXP_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0          0x06000020
 305                         IMX8QXP_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1          0x06000020
 306                         IMX8QXP_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2          0x06000020
 307                         IMX8QXP_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3          0x06000020
 308                         IMX8QXP_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC            0x06000020
 309                         IMX8QXP_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL      0x06000020
 310                         IMX8QXP_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0          0x06000020
 311                         IMX8QXP_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1          0x06000020
 312                         IMX8QXP_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2          0x06000020
 313                         IMX8QXP_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3          0x06000020
 314                 >;
 315         };
 316
 317         pinctrl_ioexp_rst: ioexprstgrp {
 318                 fsl,pins = <
 319                         IMX8QXP_SPI2_SDO_LSIO_GPIO1_IO01                        0x06000021
 320                 >;
 321         };
 322
 323         pinctrl_isl29023: isl29023grp {
 324                 fsl,pins = <
 325                         IMX8QXP_SPI2_SDI_LSIO_GPIO1_IO02                        0x00000021
 326                 >;
 327         };
 328
 329         pinctrl_lpi2c1: lpi2c1grp {
 330                 fsl,pins = <
 331                         IMX8QXP_USB_SS3_TC1_ADMA_I2C1_SCL                       0x06000021
 332                         IMX8QXP_USB_SS3_TC3_ADMA_I2C1_SDA                       0x06000021
 333                 >;
 334         };
 335
 336         pinctrl_lpuart0: lpuart0grp {
 337                 fsl,pins = <
 338                         IMX8QXP_UART0_RX_ADMA_UART0_RX                          0x06000020
 339                         IMX8QXP_UART0_TX_ADMA_UART0_TX                          0x06000020
 340                 >;
 341         };
 342
 343         pinctrl_typec: typecgrp {
 344                 fsl,pins = <
 345                         IMX8QXP_SPI2_SCK_LSIO_GPIO1_IO03                        0x06000021
 346                 >;
 347         };
 348
 349         pinctrl_typec_mux: typecmuxgrp {
 350                 fsl,pins = <
 351                         IMX8QXP_ENET0_REFCLK_125M_25M_LSIO_GPIO5_IO09           0x60
 352                 >;
 353         };
 354
 355         pinctrl_usdhc1: usdhc1grp {
 356                 fsl,pins = <
 357                         IMX8QXP_EMMC0_CLK_CONN_EMMC0_CLK                        0x06000041
 358                         IMX8QXP_EMMC0_CMD_CONN_EMMC0_CMD                        0x00000021
 359                         IMX8QXP_EMMC0_DATA0_CONN_EMMC0_DATA0                    0x00000021
 360                         IMX8QXP_EMMC0_DATA1_CONN_EMMC0_DATA1                    0x00000021
 361                         IMX8QXP_EMMC0_DATA2_CONN_EMMC0_DATA2                    0x00000021
 362                         IMX8QXP_EMMC0_DATA3_CONN_EMMC0_DATA3                    0x00000021
 363                         IMX8QXP_EMMC0_DATA4_CONN_EMMC0_DATA4                    0x00000021
 364                         IMX8QXP_EMMC0_DATA5_CONN_EMMC0_DATA5                    0x00000021
 365                         IMX8QXP_EMMC0_DATA6_CONN_EMMC0_DATA6                    0x00000021
 366                         IMX8QXP_EMMC0_DATA7_CONN_EMMC0_DATA7                    0x00000021
 367                         IMX8QXP_EMMC0_STROBE_CONN_EMMC0_STROBE                  0x00000041
 368                 >;
 369         };
 370
 371         pinctrl_usdhc2: usdhc2grp {
 372                 fsl,pins = <
 373                         IMX8QXP_USDHC1_CLK_CONN_USDHC1_CLK                      0x06000041
 374                         IMX8QXP_USDHC1_CMD_CONN_USDHC1_CMD                      0x00000021
 375                         IMX8QXP_USDHC1_DATA0_CONN_USDHC1_DATA0                  0x00000021
 376                         IMX8QXP_USDHC1_DATA1_CONN_USDHC1_DATA1                  0x00000021
 377                         IMX8QXP_USDHC1_DATA2_CONN_USDHC1_DATA2                  0x00000021
 378                         IMX8QXP_USDHC1_DATA3_CONN_USDHC1_DATA3                  0x00000021
 379                         IMX8QXP_USDHC1_VSELECT_CONN_USDHC1_VSELECT              0x00000021
 380                 >;
 381         };
 382 };