1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright 2020 Compass Electronics Group, LLC
8 compatible = "gpio-leds";
12 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
13 default-state = "off";
18 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
19 default-state = "off";
24 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
25 default-state = "off";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_led3>;
32 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
33 linux,default-trigger = "heartbeat";
37 reg_audio: regulator-audio {
38 compatible = "regulator-fixed";
39 regulator-name = "3v3_aud";
40 regulator-min-microvolt = <3300000>;
41 regulator-max-microvolt = <3300000>;
42 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
46 reg_usdhc2_vmmc: regulator-usdhc2 {
47 compatible = "regulator-fixed";
48 regulator-name = "vsd_3v3";
49 regulator-min-microvolt = <3300000>;
50 regulator-max-microvolt = <3300000>;
51 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
55 reg_usb_otg_vbus: regulator-usb {
56 compatible = "regulator-fixed";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_reg_usb_otg>;
59 regulator-name = "usb_otg_vbus";
60 regulator-min-microvolt = <5000000>;
61 regulator-max-microvolt = <5000000>;
62 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
67 compatible = "fsl,imx-audio-wm8962";
68 model = "wm8962-audio";
70 audio-codec = <&wm8962>;
72 "Headphone Jack", "HPOUTL",
73 "Headphone Jack", "HPOUTR",
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_espi2>;
84 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
88 compatible = "microchip,at25160bn", "atmel,at25";
90 spi-max-frequency = <5000000>;
100 clock-frequency = <400000>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_i2c4>;
106 compatible = "nxp,pcal6416";
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_pcal6414>;
112 interrupt-parent = <&gpio4>;
113 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
117 compatible = "nxp,pcal6416";
121 interrupt-parent = <&gpio4>;
122 interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
125 wm8962: audio-codec@1a {
126 compatible = "wlf,wm8962";
128 clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
129 DCVDD-supply = <®_audio>;
130 DBVDD-supply = <®_audio>;
131 AVDD-supply = <®_audio>;
132 CPVDD-supply = <®_audio>;
133 MICVDD-supply = <®_audio>;
134 PLLVDD-supply = <®_audio>;
135 SPKVDD1-supply = <®_audio>;
136 SPKVDD2-supply = <®_audio>;
138 0x0000 /* 0:Default */
139 0x0000 /* 1:Default */
140 0x0000 /* 2:FN_DMICCLK */
141 0x0000 /* 3:Default */
142 0x0000 /* 4:FN_DMICCDAT */
143 0x0000 /* 5:Default */
149 fsl,asrc-rate = <48000>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&pinctrl_sai3>;
156 assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
157 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
158 assigned-clock-rates = <24576000>;
159 fsl,sai-mclk-direction-output;
167 &uart2 { /* console */
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_uart2>;
174 pinctrl-names = "default";
175 pinctrl-0 = <&pinctrl_uart3>;
176 assigned-clocks = <&clk IMX8MN_CLK_UART3>;
177 assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
183 vbus-supply = <®_usb_otg_vbus>;
184 disable-over-current;
190 pinctrl-names = "default", "state_100mhz", "state_200mhz";
191 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
192 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
193 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
195 vmmc-supply = <®_usdhc2_vmmc>;
200 pinctrl_espi2: espi2grp {
202 MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
203 MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
204 MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
205 MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
209 pinctrl_i2c2: i2c2grp {
211 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
212 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
216 pinctrl_i2c4: i2c4grp {
218 MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
219 MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
223 pinctrl_led3: led3grp {
225 MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41
229 pinctrl_pcal6414: pcal6414-gpiogrp {
231 MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
235 pinctrl_reg_usb_otg: reg-otggrp {
237 MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
241 pinctrl_sai3: sai3grp {
243 MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
244 MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
245 MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
246 MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
247 MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
251 pinctrl_uart2: uart2grp {
253 MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
254 MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
258 pinctrl_uart3: uart3grp {
260 MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
261 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
262 MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40
263 MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40
267 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
269 MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
270 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
274 pinctrl_usdhc2: usdhc2grp {
276 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
277 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
278 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
279 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
280 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
281 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
282 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
286 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
288 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
289 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
290 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
291 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
292 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
293 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
294 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
298 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
300 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
301 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
302 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
303 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
304 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
305 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
306 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0