1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/usb/pd.h>
10 #include "imx8mm.dtsi"
18 device_type = "memory";
19 reg = <0x0 0x40000000 0 0x80000000>;
23 compatible = "hdmi-connector";
28 hdmi_connector_in: endpoint {
29 remote-endpoint = <&adv7533_out>;
35 compatible = "gpio-leds";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_gpio_led>;
41 gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
46 pcie0_refclk: pcie0-refclk {
47 compatible = "fixed-clock";
49 clock-frequency = <100000000>;
52 reg_pcie0: regulator-pcie {
53 compatible = "regulator-fixed";
54 pinctrl-names = "default";
55 pinctrl-0 = <&pinctrl_pcie0_reg>;
56 regulator-name = "MPCIE_3V3";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
63 reg_usdhc2_vmmc: regulator-usdhc2 {
64 compatible = "regulator-fixed";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
67 regulator-name = "VSD_3V3";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
71 off-on-delay-us = <20000>;
75 backlight: backlight {
76 compatible = "pwm-backlight";
77 pwms = <&pwm1 0 5000000 0>;
78 brightness-levels = <0 255>;
79 num-interpolated-steps = <255>;
80 default-brightness-level = <250>;
84 compatible = "gpio-ir-receiver";
85 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&pinctrl_ir>;
88 linux,autosuspend-period = <125>;
91 audio_codec_bt_sco: audio-codec-bt-sco {
92 compatible = "linux,bt-sco";
93 #sound-dai-cells = <1>;
97 #sound-dai-cells = <0>;
98 compatible = "wlf,wm8524";
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_gpio_wlf>;
101 wlf,mute-gpios = <&gpio5 21 GPIO_ACTIVE_LOW>;
105 compatible = "simple-audio-card";
106 simple-audio-card,name = "bt-sco-audio";
107 simple-audio-card,format = "dsp_a";
108 simple-audio-card,bitclock-inversion;
109 simple-audio-card,frame-master = <&btcpu>;
110 simple-audio-card,bitclock-master = <&btcpu>;
112 btcpu: simple-audio-card,cpu {
114 dai-tdm-slot-num = <2>;
115 dai-tdm-slot-width = <16>;
118 simple-audio-card,codec {
119 sound-dai = <&audio_codec_bt_sco 1>;
124 compatible = "simple-audio-card";
125 simple-audio-card,name = "wm8524-audio";
126 simple-audio-card,format = "i2s";
127 simple-audio-card,frame-master = <&cpudai>;
128 simple-audio-card,bitclock-master = <&cpudai>;
129 simple-audio-card,widgets =
130 "Line", "Left Line Out Jack",
131 "Line", "Right Line Out Jack";
132 simple-audio-card,routing =
133 "Left Line Out Jack", "LINEVOUTL",
134 "Right Line Out Jack", "LINEVOUTR";
136 cpudai: simple-audio-card,cpu {
138 dai-tdm-slot-num = <2>;
139 dai-tdm-slot-width = <32>;
142 simple-audio-card,codec {
143 sound-dai = <&wm8524>;
144 clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
150 cpu-supply = <&buck2_reg>;
154 cpu-supply = <&buck2_reg>;
158 cpu-supply = <&buck2_reg>;
162 cpu-supply = <&buck2_reg>;
166 pinctrl-names = "default";
167 pinctrl-0 = <&pinctrl_fec1>;
168 phy-mode = "rgmii-id";
169 phy-handle = <ðphy0>;
174 #address-cells = <1>;
177 ethphy0: ethernet-phy@0 {
178 compatible = "ethernet-phy-ieee802.3-c22";
180 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
181 reset-assert-us = <10000>;
182 qca,disable-smarteee;
183 vddio-supply = <&vddio>;
185 vddio: vddio-regulator {
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <1800000>;
194 clock-frequency = <400000>;
195 pinctrl-names = "default";
196 pinctrl-0 = <&pinctrl_i2c1>;
200 compatible = "rohm,bd71847";
202 pinctrl-names = "default";
203 pinctrl-0 = <&pinctrl_pmic>;
204 interrupt-parent = <&gpio1>;
205 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
206 rohm,reset-snvs-powered;
210 clock-output-names = "clk-32k-out";
214 regulator-name = "buck1";
215 regulator-min-microvolt = <700000>;
216 regulator-max-microvolt = <1300000>;
219 regulator-ramp-delay = <1250>;
223 regulator-name = "buck2";
224 regulator-min-microvolt = <700000>;
225 regulator-max-microvolt = <1300000>;
228 regulator-ramp-delay = <1250>;
229 rohm,dvs-run-voltage = <1000000>;
230 rohm,dvs-idle-voltage = <900000>;
234 // BUCK5 in datasheet
235 regulator-name = "buck3";
236 regulator-min-microvolt = <700000>;
237 regulator-max-microvolt = <1350000>;
243 // BUCK6 in datasheet
244 regulator-name = "buck4";
245 regulator-min-microvolt = <3000000>;
246 regulator-max-microvolt = <3300000>;
252 // BUCK7 in datasheet
253 regulator-name = "buck5";
254 regulator-min-microvolt = <1605000>;
255 regulator-max-microvolt = <1995000>;
261 // BUCK8 in datasheet
262 regulator-name = "buck6";
263 regulator-min-microvolt = <800000>;
264 regulator-max-microvolt = <1400000>;
270 regulator-name = "ldo1";
271 regulator-min-microvolt = <1600000>;
272 regulator-max-microvolt = <3300000>;
278 regulator-name = "ldo2";
279 regulator-min-microvolt = <800000>;
280 regulator-max-microvolt = <900000>;
286 regulator-name = "ldo3";
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <3300000>;
294 regulator-name = "ldo4";
295 regulator-min-microvolt = <900000>;
296 regulator-max-microvolt = <1800000>;
302 regulator-name = "ldo6";
303 regulator-min-microvolt = <900000>;
304 regulator-max-microvolt = <1800000>;
313 clock-frequency = <400000>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&pinctrl_i2c2>;
319 compatible = "adi,adv7535";
320 reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;
321 reg-names = "main", "cec", "edid", "packet";
324 adi,input-depth = <8>;
325 adi,input-colorspace = "rgb";
326 adi,input-clock = "1x";
327 adi,input-style = <1>;
328 adi,input-justification = "evenly";
331 #address-cells = <1>;
337 adv7533_in: endpoint {
338 remote-endpoint = <&dsi_out>;
345 adv7533_out: endpoint {
346 remote-endpoint = <&hdmi_connector_in>;
354 compatible = "nxp,ptn5110";
355 pinctrl-names = "default";
356 pinctrl-0 = <&pinctrl_typec1>;
358 interrupt-parent = <&gpio2>;
363 typec1_dr_sw: endpoint {
364 remote-endpoint = <&usb1_drd_sw>;
368 typec1_con: connector {
369 compatible = "usb-c-connector";
373 try-power-role = "sink";
374 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
375 sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)
376 PDO_VAR(5000, 20000, 3000)>;
377 op-sink-microwatt = <15000000>;
389 clock-frequency = <400000>;
390 pinctrl-names = "default";
391 pinctrl-0 = <&pinctrl_i2c3>;
395 compatible = "nxp,pca6416";
399 vcc-supply = <&buck4_reg>;
403 compatible = "ovti,ov5640";
405 pinctrl-names = "default";
406 pinctrl-0 = <&pinctrl_camera>;
407 clocks = <&clk IMX8MM_CLK_CLKO1>;
408 clock-names = "xclk";
409 assigned-clocks = <&clk IMX8MM_CLK_CLKO1>;
410 assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
411 assigned-clock-rates = <24000000>;
412 powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
413 reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
416 ov5640_to_mipi_csi2: endpoint {
417 remote-endpoint = <&imx8mm_mipi_csi_in>;
434 imx8mm_mipi_csi_in: endpoint {
435 remote-endpoint = <&ov5640_to_mipi_csi2>;
443 samsung,esc-clock-frequency = <10000000>;
451 remote-endpoint = <&adv7533_in>;
452 data-lanes = <1 2 3 4>;
459 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
460 fsl,tx-deemph-gen1 = <0x2d>;
461 fsl,tx-deemph-gen2 = <0xf>;
462 clocks = <&pcie0_refclk>;
467 pinctrl-names = "default";
468 pinctrl-0 = <&pinctrl_pcie0>;
469 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
470 clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,
471 <&clk IMX8MM_CLK_PCIE1_AUX>;
472 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
473 <&clk IMX8MM_CLK_PCIE1_CTRL>;
474 assigned-clock-rates = <10000000>, <250000000>;
475 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
476 <&clk IMX8MM_SYS_PLL2_250M>;
477 vpcie-supply = <®_pcie0>;
482 #sound-dai-cells = <0>;
483 pinctrl-names = "default";
484 pinctrl-0 = <&pinctrl_sai2>;
485 assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
486 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
487 assigned-clock-rates = <24576000>;
492 pinctrl-names = "default";
493 pinctrl-0 = <&pinctrl_sai3>;
494 assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
495 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
496 assigned-clock-rates = <24576000>;
504 &uart2 { /* console */
505 pinctrl-names = "default";
506 pinctrl-0 = <&pinctrl_uart2>;
520 disable-over-current;
521 samsung,picophy-pre-emp-curr-control = <3>;
522 samsung,picophy-dc-vol-level-adjust = <7>;
526 usb1_drd_sw: endpoint {
527 remote-endpoint = <&typec1_dr_sw>;
533 assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
534 assigned-clock-rates = <200000000>;
535 pinctrl-names = "default", "state_100mhz", "state_200mhz";
536 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
537 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
538 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
539 cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
541 vmmc-supply = <®_usdhc2_vmmc>;
546 pinctrl-names = "default";
547 pinctrl-0 = <&pinctrl_wdog>;
548 fsl,ext-reset-output;
553 pinctrl-names = "default";
554 pinctrl-0 = <&pinctrl_backlight>;
559 pinctrl_fec1: fec1grp {
561 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
562 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
563 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
564 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
565 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
566 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
567 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
568 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
569 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
570 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
571 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
572 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
573 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
574 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
575 MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x19
579 pinctrl_gpio_led: gpioledgrp {
581 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
587 MX8MM_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x4f
591 pinctrl_gpio_wlf: gpiowlfgrp {
593 MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21 0xd6
597 pinctrl_i2c1: i2c1grp {
599 MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3
600 MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3
604 pinctrl_i2c2: i2c2grp {
606 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
607 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
611 pinctrl_i2c3: i2c3grp {
613 MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c3
614 MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
618 pinctrl_pcie0: pcie0grp {
620 MX8MM_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x61
621 MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x41
625 pinctrl_pcie0_reg: pcie0reggrp {
627 MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41
631 pinctrl_pmic: pmicirqgrp {
633 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
637 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
639 MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
643 pinctrl_sai2: sai2grp {
645 MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
646 MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
647 MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
648 MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
652 pinctrl_sai3: sai3grp {
654 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
655 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
656 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
657 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
661 pinctrl_typec1: typec1grp {
663 MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11 0x159
667 pinctrl_uart2: uart2grp {
669 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
670 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
674 pinctrl_usdhc2_gpio: usdhc2grpgpiogrp {
676 MX8MM_IOMUXC_GPIO1_IO15_GPIO1_IO15 0x1c4
680 pinctrl_usdhc2: usdhc2grp {
682 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
683 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
684 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
685 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
686 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
687 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
688 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
692 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
694 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
695 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
696 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
697 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
698 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
699 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
700 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
704 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
706 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
707 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
708 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
709 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
710 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
711 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
712 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
716 pinctrl_wdog: wdoggrp {
718 MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x166
722 pinctrl_backlight: backlightgrp {
724 MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x06
728 pinctrl_camera: cameragrp {
730 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
731 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
732 MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59