1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2019~2020, 2022 NXP
7 clock-frequency = <160000000>;
11 clock-frequency = <160000000>;
15 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
19 compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
20 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
24 compatible = "fsl,imx8dxl-lpi2c", "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
25 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
29 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
30 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
34 compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c";
35 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
39 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
40 interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
44 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
45 interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
49 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
50 interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
54 compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart";
55 interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;