arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi

   1 /*
   2  * SAMSUNG Exynos5433 TM2 board device tree source
   3  *
   4  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
   5  *
   6  * Common device tree source file for Samsung's TM2 and TM2E boards
   7  * which are based on Samsung Exynos5433 SoC.
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 /dts-v1/;
  15 #include "exynos5433.dtsi"
  16 #include <dt-bindings/clock/samsung,s2mps11.h>
  17 #include <dt-bindings/gpio/gpio.h>
  18 #include <dt-bindings/input/input.h>
  19 #include <dt-bindings/interrupt-controller/irq.h>
  20 #include <dt-bindings/soc/exynos,boot-mode.h>
  21 #include <dt-bindings/sound/samsung-i2s.h>
  22
  23 / {
  24         aliases {
  25                 csis0 = &mipi_csis_0;
  26                 csis1 = &mipi_csis_1;
  27                 csis2 = &mipi_csis_2;
  28                 fimc-lite0 = &fimc_lite_a;
  29                 fimc-lite1 = &fimc_lite_b;
  30                 fimc-lite2 = &fimc_lite_c;
  31                 gsc0 = &gsc_0;
  32                 gsc1 = &gsc_1;
  33                 gsc2 = &gsc_2;
  34                 i2c0 = &hsi2c_0;
  35                 i2c1 = &hsi2c_1;
  36                 i2c2 = &hsi2c_2;
  37                 i2c3 = &hsi2c_3;
  38                 i2c4 = &hsi2c_4;
  39                 i2c5 = &hsi2c_5;
  40                 i2c6 = &hsi2c_6;
  41                 i2c7 = &hsi2c_7;
  42                 i2c8 = &hsi2c_8;
  43                 i2c9 = &hsi2c_9;
  44                 i2c10 = &hsi2c_10;
  45                 i2c11 = &hsi2c_11;
  46                 i2c12 = &i2c_max98504;
  47                 i2c13 = &i2c_6d1;
  48                 i2c20 = &ispi2c_0;
  49                 pinctrl0 = &pinctrl_alive;
  50                 pinctrl1 = &pinctrl_aud;
  51                 pinctrl2 = &pinctrl_cpif;
  52                 pinctrl3 = &pinctrl_ese;
  53                 pinctrl4 = &pinctrl_finger;
  54                 pinctrl5 = &pinctrl_fsys;
  55                 pinctrl6 = &pinctrl_imem;
  56                 pinctrl7 = &pinctrl_nfc;
  57                 pinctrl8 = &pinctrl_peric;
  58                 pinctrl9 = &pinctrl_touch;
  59                 serial0 = &serial_0;
  60                 serial1 = &serial_1;
  61                 serial2 = &serial_2;
  62                 serial3 = &serial_3;
  63                 spi0 = &spi_0;
  64                 spi1 = &spi_1;
  65                 spi2 = &spi_2;
  66                 spi3 = &spi_3;
  67                 spi4 = &spi_4;
  68                 spi5 = &spi_5;
  69                 spi6 = &spi_6;
  70                 mshc0 = &mshc_0;
  71                 mshc2 = &mshc_2;
  72         };
  73
  74         chosen {
  75                 stdout-path = &serial_1;
  76         };
  77
  78         memory@20000000 {
  79                 device_type = "memory";
  80                 reg = <0x0 0x20000000 0x0 0xc0000000>;
  81         };
  82
  83         camera-flash {
  84                 compatible = "kinetic,ktd2692";
  85                 ctrl-gpios = <&gpc0 1 GPIO_ACTIVE_HIGH>;
  86                 aux-gpios = <&gpc0 2 GPIO_ACTIVE_HIGH>;
  87
  88                 flash-led {
  89                         label = "ktd2692-flash";
  90                         led-max-microamp = <300000>;
  91                         flash-max-microamp = <1500000>;
  92                         flash-max-timeout-us = <1835000>;
  93                 };
  94         };
  95
  96         gpio-keys {
  97                 compatible = "gpio-keys";
  98
  99                 power-key {
 100                         gpios = <&gpa2 7 GPIO_ACTIVE_LOW>;
 101                         linux,code = <KEY_POWER>;
 102                         label = "power key";
 103                         debounce-interval = <10>;
 104                         wakeup-source;
 105                 };
 106
 107                 volume-up-key {
 108                         gpios = <&gpa2 0 GPIO_ACTIVE_LOW>;
 109                         linux,code = <KEY_VOLUMEUP>;
 110                         label = "volume-up key";
 111                         debounce-interval = <10>;
 112                 };
 113
 114                 volume-down-key {
 115                         gpios = <&gpa2 1 GPIO_ACTIVE_LOW>;
 116                         linux,code = <KEY_VOLUMEDOWN>;
 117                         label = "volume-down key";
 118                         debounce-interval = <10>;
 119                 };
 120
 121                 homepage-key {
 122                         gpios = <&gpa0 3 GPIO_ACTIVE_LOW>;
 123                         linux,code = <KEY_MENU>;
 124                         label = "homepage key";
 125                         debounce-interval = <10>;
 126                 };
 127         };
 128
 129         gps {
 130                 compatible = "samsung,exynos54xx-bcm4753";
 131                 gpios = <&gpg2 0 0x1 &gpa1 0 0xf>;
 132                 status = "okay";
 133                 pinctrl-names ="default";
 134                 pinctrl-0 = <&ssp_gps_pwr_en &ssp_host_wake>;
 135         };
 136
 137         i2c_6d1: i2c-gpio-1 {
 138                 compatible = "i2c-gpio";
 139                 gpios = <&gpc2 4 GPIO_ACTIVE_HIGH /* SDA */
 140                          &gpc2 5 GPIO_ACTIVE_HIGH /* SCL */>;
 141                 i2c-gpio,delay-us = <2>;
 142                 #address-cells = <1>;
 143                 #size-cells = <0>;
 144                 status = "okay";
 145                 fimc-is-vision@35 {
 146                         compatible = "samsung,exynos5-fimc-is-sensor-6d1";
 147                         reg = <0x35>;
 148                 };
 149         };
 150
 151         i2c_max98504: i2c-gpio-0 {
 152                 compatible = "i2c-gpio";
 153                 gpios = <&gpd0 1 GPIO_ACTIVE_HIGH /* SPK_AMP_SDA */
 154                          &gpd0 0 GPIO_ACTIVE_HIGH /* SPK_AMP_SCL */ >;
 155                 i2c-gpio,delay-us = <2>;
 156                 #address-cells = <1>;
 157                 #size-cells = <0>;
 158                 status = "okay";
 159
 160                 max98504: max98504@31 {
 161                         compatible = "maxim,max98504";
 162                         reg = <0x31>;
 163                         maxim,rx-path = <1>;
 164                         maxim,tx-path = <1>;
 165                         maxim,tx-channel-mask = <3>;
 166                         maxim,tx-channel-source = <2>;
 167                 };
 168         };
 169
 170         irda_regulator: irda-regulator {
 171                 compatible = "regulator-fixed";
 172                 enable-active-high;
 173                 gpio = <&gpr3 3 GPIO_ACTIVE_HIGH>;
 174                 regulator-name = "irda_regulator";
 175         };
 176
 177         rfkill-bcm {
 178                 compatible = "brcm,bcm4358";
 179                 rfkill-name = "bcm4358-bt";
 180                 rfkill-type = <2>;
 181                 shutdown-gpios = <&gpd4 0 GPIO_ACTIVE_HIGH>;
 182                 wake-gpios = <&gpr3 7 GPIO_ACTIVE_HIGH>;
 183                 host-wake-gpios = <&gpa2 2 GPIO_ACTIVE_HIGH>;
 184                 clocks = <&s2mps13_osc S2MPS11_CLK_BT>;
 185                 clock-names = "clk32k";
 186         };
 187
 188         sound {
 189                 compatible = "samsung,tm2-audio";
 190                 audio-codec = <&wm5110>, <&hdmi>;
 191                 i2s-controller = <&i2s0 0>, <&i2s1 0>;
 192                 audio-amplifier = <&max98504>;
 193                 mic-bias-gpios = <&gpr3 2 GPIO_ACTIVE_HIGH>;
 194                 model = "wm5110";
 195                 samsung,audio-routing =
 196                         /* Headphone */
 197                         "HP", "HPOUT1L",
 198                         "HP", "HPOUT1R",
 199
 200                         /* Speaker */
 201                         "SPK", "SPKOUT",
 202                         "SPKOUT", "HPOUT2L",
 203                         "SPKOUT", "HPOUT2R",
 204
 205                         /* Receiver */
 206                         "RCV", "HPOUT3L",
 207                         "RCV", "HPOUT3R";
 208                 status = "okay";
 209         };
 210
 211         fimc_is_sensor0: fimc_is_sensor@12100000 {
 212                 compatible = "samsung,exynos5-fimc-is-sensor";
 213                 reg = <0x12100000 0x10000>, <0x12120000 0x10000>;
 214                 interrupts = <0 140 0>;
 215                 power-domains = <&pd_cam0>;
 216                 clock-names = "sclk_isp_sensor0",
 217                                 "sclk_isp_sensor1",
 218                                 "sclk_isp_sensor2",
 219
 220                                 "mout_sclk_isp_sensor0",
 221                                 "mout_sclk_isp_sensor1",
 222                                 "mout_sclk_isp_sensor2",
 223
 224                                 "dout_sclk_isp_sensor0_a",
 225                                 "dout_sclk_isp_sensor0_b",
 226                                 "dout_sclk_isp_sensor1_a",
 227                                 "dout_sclk_isp_sensor1_b",
 228                                 "dout_sclk_isp_sensor2_a",
 229                                 "dout_sclk_isp_sensor2_b",
 230                                 "oscclk";
 231                 clocks = <&cmu_top CLK_SCLK_ISP_SENSOR0>,
 232                                 <&cmu_top CLK_SCLK_ISP_SENSOR1>,
 233                                 <&cmu_top CLK_SCLK_ISP_SENSOR2>,
 234
 235                                 <&cmu_top CLK_MOUT_SCLK_ISP_SENSOR0>,
 236                                 <&cmu_top CLK_MOUT_SCLK_ISP_SENSOR1>,
 237                                 <&cmu_top CLK_MOUT_SCLK_ISP_SENSOR2>,
 238
 239                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR0_A>,
 240                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR0_B>,
 241                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR1_A>,
 242                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR1_B>,
 243                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR2_A>,
 244                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR2_B>,
 245                                 <&xxti>;
 246
 247                 pinctrl-names = "ch0", "af0";
 248                 pinctrl-0 = <&fimc_is_ch0_i2c &fimc_is_ch0_mclk>;
 249                 pinctrl-1 = <&fimc_is_ch0_i2c &fimc_is_ch0_mclk &fimc_is_ch1_i2c>;
 250
 251                 scenario = <0>;
 252                 gpio_rest = <&gpc0 4 0x1>;
 253                 id = <0>;
 254                 mclk_ch = <0>;
 255                 csi_ch = <0>;
 256                 flite_ch = <0>;
 257                 i2c_ch = <0x010100>;
 258                 i2c_addr = <0x483434>;
 259                 flash_first_gpio = <1>;
 260                 flash_second_gpio = <2>;
 261                 sensor_name = "imx240";
 262                 sensor_id = <104>;
 263                 is_bns = <1>;
 264                 status = "okay";
 265                 phys = <&mipi_phy 0>;
 266                 phy-names = "csis";
 267         };
 268
 269         fimc_is_sensor1: fimc_is_sensor@12110000 {
 270                 compatible = "samsung,exynos5-fimc-is-sensor";
 271                 reg = <0x12110000 0x40000>, <0x12130000 0x10000>;
 272                 interrupts = <0 141 0>;
 273                 power-domains = <&pd_cam0>;
 274                 clock-names = "sclk_isp_sensor0",
 275                                 "sclk_isp_sensor1",
 276                                 "sclk_isp_sensor2",
 277
 278                                 "mout_sclk_isp_sensor0",
 279                                 "mout_sclk_isp_sensor1",
 280                                 "mout_sclk_isp_sensor2",
 281
 282                                 "dout_sclk_isp_sensor0_a",
 283                                 "dout_sclk_isp_sensor0_b",
 284                                 "dout_sclk_isp_sensor1_a",
 285                                 "dout_sclk_isp_sensor1_b",
 286                                 "dout_sclk_isp_sensor2_a",
 287                                 "dout_sclk_isp_sensor2_b",
 288                                 "oscclk";
 289                 clocks = <&cmu_top CLK_SCLK_ISP_SENSOR0>,
 290                                 <&cmu_top CLK_SCLK_ISP_SENSOR1>,
 291                                 <&cmu_top CLK_SCLK_ISP_SENSOR2>,
 292
 293                                 <&cmu_top CLK_MOUT_SCLK_ISP_SENSOR0>,
 294                                 <&cmu_top CLK_MOUT_SCLK_ISP_SENSOR1>,
 295                                 <&cmu_top CLK_MOUT_SCLK_ISP_SENSOR2>,
 296
 297                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR0_A>,
 298                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR0_B>,
 299                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR1_A>,
 300                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR1_B>,
 301                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR2_A>,
 302                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR2_B>,
 303                                 <&xxti>;
 304
 305                 pinctrl-names ="default", "ch1", "off1";
 306                 pinctrl-0 = <&fimc_is_ch2_mclk_off>;
 307                 pinctrl-1 = <&fimc_is_ch2_i2c &fimc_is_ch2_mclk>;
 308                 pinctrl-2 = <&fimc_is_ch2_mclk_off &fimc_is_ch2_i2c_off>;
 309
 310                 scenario = <0>;
 311                 gpio_reset = <&gpc0 3 0x1>;
 312                 gpio_standby = <&gpc0 0 0x1>;
 313                 id = <1>;
 314                 mclk_ch = <2>;
 315                 csi_ch = <1>;
 316                 flite_ch = <1>;
 317                 i2c_ch = <0x2>;
 318                 i2c_addr = <0x6A>;
 319                 sensor_name = "6d1";
 320                 sensor_id = <16>;
 321                 is_bns = <0>;
 322                 status = "okay";
 323                 phys = <&mipi_phy 2>;
 324                 phy-names = "csis";
 325         };
 326 };
 327
 328 &adc {
 329         vdd-supply = <&ldo3_reg>;
 330         status = "okay";
 331
 332         thermistor-ap {
 333                 compatible = "murata,ncp03wf104";
 334                 pullup-uv = <1800000>;
 335                 pullup-ohm = <100000>;
 336                 pulldown-ohm = <0>;
 337                 io-channels = <&adc 0>;
 338         };
 339
 340         thermistor-battery {
 341                 compatible = "murata,ncp03wf104";
 342                 pullup-uv = <1800000>;
 343                 pullup-ohm = <100000>;
 344                 pulldown-ohm = <0>;
 345                 io-channels = <&adc 1>;
 346                 #thermal-sensor-cells = <0>;
 347         };
 348
 349         thermistor-charger {
 350                 compatible = "murata,ncp03wf104";
 351                 pullup-uv = <1800000>;
 352                 pullup-ohm = <100000>;
 353                 pulldown-ohm = <0>;
 354                 io-channels = <&adc 2>;
 355         };
 356 };
 357
 358 &bus_g2d_400 {
 359         devfreq-events = <&ppmu_event0_d0_general>, <&ppmu_event0_d1_general>;
 360         vdd-supply = <&buck4_reg>;
 361         exynos,saturation-ratio = <10>;
 362         status = "okay";
 363 };
 364
 365 &bus_g2d_266 {
 366         devfreq = <&bus_g2d_400>;
 367         status = "okay";
 368 };
 369
 370 &bus_gscl {
 371         devfreq = <&bus_g2d_400>;
 372         status = "okay";
 373 };
 374
 375 &bus_hevc {
 376         devfreq = <&bus_g2d_400>;
 377         status = "okay";
 378 };
 379
 380 &bus_jpeg {
 381         devfreq = <&bus_g2d_400>;
 382         status = "okay";
 383 };
 384
 385 &bus_mfc {
 386         devfreq = <&bus_g2d_400>;
 387         status = "okay";
 388 };
 389
 390 &bus_mscl {
 391         devfreq = <&bus_g2d_400>;
 392         status = "okay";
 393 };
 394
 395 &bus_noc0 {
 396         devfreq = <&bus_g2d_400>;
 397         status = "okay";
 398 };
 399
 400 &bus_noc1 {
 401         devfreq = <&bus_g2d_400>;
 402         status = "okay";
 403 };
 404
 405 &bus_noc2 {
 406         devfreq = <&bus_g2d_400>;
 407         status = "okay";
 408 };
 409
 410 &cmu_aud {
 411         assigned-clocks = <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
 412                 <&cmu_aud CLK_MOUT_SCLK_AUD_I2S>,
 413                 <&cmu_aud CLK_MOUT_SCLK_AUD_PCM>,
 414                 <&cmu_top CLK_MOUT_AUD_PLL>,
 415                 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
 416                 <&cmu_top CLK_MOUT_SCLK_AUDIO0>,
 417                 <&cmu_top CLK_MOUT_SCLK_AUDIO1>,
 418                 <&cmu_top CLK_MOUT_SCLK_SPDIF>,
 419
 420                 <&cmu_aud CLK_DIV_AUD_CA5>,
 421                 <&cmu_aud CLK_DIV_ACLK_AUD>,
 422                 <&cmu_aud CLK_DIV_PCLK_DBG_AUD>,
 423                 <&cmu_aud CLK_DIV_SCLK_AUD_I2S>,
 424                 <&cmu_aud CLK_DIV_SCLK_AUD_PCM>,
 425                 <&cmu_aud CLK_DIV_SCLK_AUD_SLIMBUS>,
 426                 <&cmu_aud CLK_DIV_SCLK_AUD_UART>,
 427                 <&cmu_top CLK_DIV_SCLK_AUDIO0>,
 428                 <&cmu_top CLK_DIV_SCLK_AUDIO1>,
 429                 <&cmu_top CLK_DIV_SCLK_PCM1>,
 430                 <&cmu_top CLK_DIV_SCLK_I2S1>;
 431
 432         assigned-clock-parents = <&cmu_top CLK_FOUT_AUD_PLL>,
 433                 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
 434                 <&cmu_aud CLK_MOUT_AUD_PLL_USER>,
 435                 <&cmu_top CLK_FOUT_AUD_PLL>,
 436                 <&cmu_top CLK_MOUT_AUD_PLL>,
 437                 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
 438                 <&cmu_top CLK_MOUT_AUD_PLL_USER_T>,
 439                 <&cmu_top CLK_SCLK_AUDIO0>;
 440
 441         assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
 442                 <196608001>, <65536001>, <32768001>, <49152001>,
 443                 <2048001>, <24576001>, <196608001>,
 444                 <24576001>, <98304001>, <2048001>, <49152001>;
 445 };
 446
 447 &cmu_fsys {
 448         assigned-clocks = <&cmu_top CLK_MOUT_SCLK_USBDRD30>,
 449                 <&cmu_top CLK_MOUT_SCLK_USBHOST30>,
 450                 <&cmu_fsys CLK_MOUT_SCLK_USBDRD30_USER>,
 451                 <&cmu_fsys CLK_MOUT_SCLK_USBHOST30_USER>,
 452                 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_USER>,
 453                 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_USER>,
 454                 <&cmu_fsys CLK_MOUT_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_USER>,
 455                 <&cmu_fsys CLK_MOUT_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_USER>,
 456                 <&cmu_top CLK_DIV_SCLK_USBDRD30>,
 457                 <&cmu_top CLK_DIV_SCLK_USBHOST30>;
 458         assigned-clock-parents = <&cmu_top CLK_MOUT_BUS_PLL_USER>,
 459                 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
 460                 <&cmu_top CLK_SCLK_USBDRD30_FSYS>,
 461                 <&cmu_top CLK_SCLK_USBHOST30_FSYS>,
 462                 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PIPE_PCLK_PHY>,
 463                 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PIPE_PCLK_PHY>,
 464                 <&cmu_fsys CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK_PHY>,
 465                 <&cmu_fsys CLK_PHYCLK_USBHOST30_UHOST30_PHYCLOCK_PHY>;
 466         assigned-clock-rates = <0>, <0>, <0>, <0>, <0>, <0>, <0>, <0>,
 467                                <66700000>, <66700000>;
 468 };
 469
 470 &cmu_gscl {
 471         assigned-clocks = <&cmu_gscl CLK_MOUT_ACLK_GSCL_111_USER>,
 472                           <&cmu_gscl CLK_MOUT_ACLK_GSCL_333_USER>;
 473         assigned-clock-parents = <&cmu_top CLK_ACLK_GSCL_111>,
 474                                  <&cmu_top CLK_ACLK_GSCL_333>;
 475 };
 476
 477 &cmu_mfc {
 478         assigned-clocks = <&cmu_mfc CLK_MOUT_ACLK_MFC_400_USER>;
 479         assigned-clock-parents = <&cmu_top CLK_ACLK_MFC_400>;
 480 };
 481
 482 &cmu_mscl {
 483         assigned-clocks = <&cmu_mscl CLK_MOUT_ACLK_MSCL_400_USER>,
 484                           <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
 485                           <&cmu_mscl CLK_MOUT_SCLK_JPEG>,
 486                           <&cmu_top CLK_MOUT_SCLK_JPEG_A>;
 487         assigned-clock-parents = <&cmu_top CLK_ACLK_MSCL_400>,
 488                                  <&cmu_top CLK_SCLK_JPEG_MSCL>,
 489                                  <&cmu_mscl CLK_MOUT_SCLK_JPEG_USER>,
 490                                  <&cmu_top CLK_MOUT_BUS_PLL_USER>;
 491 };
 492
 493 &cmu_top {
 494         assigned-clocks = <&cmu_top CLK_FOUT_AUD_PLL>;
 495         assigned-clock-rates = <196608001>;
 496 };
 497
 498 &cpu0 {
 499         cpu-supply = <&buck3_reg>;
 500 };
 501
 502 &cpu4 {
 503         cpu-supply = <&buck2_reg>;
 504 };
 505
 506 &decon {
 507         status = "okay";
 508 };
 509
 510 &decon_tv {
 511         status = "okay";
 512
 513         ports {
 514                 #address-cells = <1>;
 515                 #size-cells = <0>;
 516
 517                 port@0 {
 518                         reg = <0>;
 519                         tv_to_hdmi: endpoint {
 520                                 remote-endpoint = <&hdmi_to_tv>;
 521                         };
 522                 };
 523         };
 524 };
 525
 526 &dsi {
 527         status = "okay";
 528         vddcore-supply = <&ldo6_reg>;
 529         vddio-supply = <&ldo7_reg>;
 530         samsung,burst-clock-frequency = <512000000>;
 531         samsung,esc-clock-frequency = <16000000>;
 532         samsung,pll-clock-frequency = <24000000>;
 533         pinctrl-names = "default";
 534         pinctrl-0 = <&te_irq>;
 535 };
 536
 537 &hdmi {
 538         hpd-gpios = <&gpa3 0 GPIO_ACTIVE_HIGH>;
 539         status = "okay";
 540         vdd-supply = <&ldo6_reg>;
 541         vdd_osc-supply = <&ldo7_reg>;
 542         vdd_pll-supply = <&ldo6_reg>;
 543
 544         ports {
 545                 #address-cells = <1>;
 546                 #size-cells = <0>;
 547
 548                 port@0 {
 549                         reg = <0>;
 550                         hdmi_to_tv: endpoint {
 551                                 remote-endpoint = <&tv_to_hdmi>;
 552                         };
 553                 };
 554
 555                 port@1 {
 556                         reg = <1>;
 557                         hdmi_to_mhl: endpoint {
 558                                 remote-endpoint = <&mhl_to_hdmi>;
 559                         };
 560                 };
 561         };
 562 };
 563
 564 &hsi2c_0 {
 565         status = "okay";
 566         clock-frequency = <2500000>;
 567
 568         s2mps13-pmic@66 {
 569                 compatible = "samsung,s2mps13-pmic";
 570                 interrupt-parent = <&gpa0>;
 571                 interrupts = <7 IRQ_TYPE_NONE>;
 572                 reg = <0x66>;
 573                 samsung,s2mps11-wrstbi-ground;
 574
 575                 s2mps13_osc: clocks {
 576                         compatible = "samsung,s2mps13-clk";
 577                         #clock-cells = <1>;
 578                         clock-output-names = "s2mps13_ap", "s2mps13_cp",
 579                                 "s2mps13_bt";
 580                 };
 581
 582                 regulators {
 583                         ldo1_reg: LDO1 {
 584                                 regulator-name = "VDD_ALIVE_0.9V_AP";
 585                                 regulator-min-microvolt = <900000>;
 586                                 regulator-max-microvolt = <900000>;
 587                                 regulator-always-on;
 588                         };
 589
 590                         ldo2_reg: LDO2 {
 591                                 regulator-name = "VDDQ_MMC2_2.8V_AP";
 592                                 regulator-min-microvolt = <2800000>;
 593                                 regulator-max-microvolt = <2800000>;
 594                                 regulator-always-on;
 595                                 regulator-state-mem {
 596                                         regulator-off-in-suspend;
 597                                 };
 598                         };
 599
 600                         ldo3_reg: LDO3 {
 601                                 regulator-name = "VDD1_E_1.8V_AP";
 602                                 regulator-min-microvolt = <1800000>;
 603                                 regulator-max-microvolt = <1800000>;
 604                                 regulator-always-on;
 605                         };
 606
 607                         ldo4_reg: LDO4 {
 608                                 regulator-name = "VDD10_MIF_PLL_1.0V_AP";
 609                                 regulator-min-microvolt = <1300000>;
 610                                 regulator-max-microvolt = <1300000>;
 611                                 regulator-always-on;
 612                                 regulator-state-mem {
 613                                         regulator-off-in-suspend;
 614                                 };
 615                         };
 616
 617                         ldo5_reg: LDO5 {
 618                                 regulator-name = "VDD10_DPLL_1.0V_AP";
 619                                 regulator-min-microvolt = <1000000>;
 620                                 regulator-max-microvolt = <1000000>;
 621                                 regulator-always-on;
 622                                 regulator-state-mem {
 623                                         regulator-off-in-suspend;
 624                                 };
 625                         };
 626
 627                         ldo6_reg: LDO6 {
 628                                 regulator-name = "VDD10_MIPI2L_1.0V_AP";
 629                                 regulator-min-microvolt = <1000000>;
 630                                 regulator-max-microvolt = <1000000>;
 631                                 regulator-always-on;
 632                                 regulator-state-mem {
 633                                         regulator-off-in-suspend;
 634                                 };
 635                         };
 636
 637                         ldo7_reg: LDO7 {
 638                                 regulator-name = "VDD18_MIPI2L_1.8V_AP";
 639                                 regulator-min-microvolt = <1800000>;
 640                                 regulator-max-microvolt = <1800000>;
 641                                 regulator-always-on;
 642                                 regulator-state-mem {
 643                                         regulator-off-in-suspend;
 644                                 };
 645                         };
 646
 647                         ldo8_reg: LDO8 {
 648                                 regulator-name = "VDD18_LLI_1.8V_AP";
 649                                 regulator-min-microvolt = <1800000>;
 650                                 regulator-max-microvolt = <1800000>;
 651                                 regulator-always-on;
 652                                 regulator-state-mem {
 653                                         regulator-off-in-suspend;
 654                                 };
 655                         };
 656
 657                         ldo9_reg: LDO9 {
 658                                 regulator-name = "VDD18_ABB_ETC_1.8V_AP";
 659                                 regulator-min-microvolt = <1800000>;
 660                                 regulator-max-microvolt = <1800000>;
 661                                 regulator-always-on;
 662                                 regulator-state-mem {
 663                                         regulator-off-in-suspend;
 664                                 };
 665                         };
 666
 667                         ldo10_reg: LDO10 {
 668                                 regulator-name = "VDD33_USB30_3.0V_AP";
 669                                 regulator-min-microvolt = <3000000>;
 670                                 regulator-max-microvolt = <3000000>;
 671                                 regulator-state-mem {
 672                                         regulator-off-in-suspend;
 673                                 };
 674                         };
 675
 676                         ldo11_reg: LDO11 {
 677                                 regulator-name = "VDD_INT_M_1.0V_AP";
 678                                 regulator-min-microvolt = <1000000>;
 679                                 regulator-max-microvolt = <1000000>;
 680                                 regulator-always-on;
 681                                 regulator-state-mem {
 682                                         regulator-off-in-suspend;
 683                                 };
 684                         };
 685
 686                         ldo12_reg: LDO12 {
 687                                 regulator-name = "VDD_KFC_M_1.1V_AP";
 688                                 regulator-min-microvolt = <800000>;
 689                                 regulator-max-microvolt = <1350000>;
 690                                 regulator-always-on;
 691                         };
 692
 693                         ldo13_reg: LDO13 {
 694                                 regulator-name = "VDD_G3D_M_0.95V_AP";
 695                                 regulator-min-microvolt = <950000>;
 696                                 regulator-max-microvolt = <950000>;
 697                                 regulator-always-on;
 698                                 regulator-state-mem {
 699                                         regulator-off-in-suspend;
 700                                 };
 701                         };
 702
 703                         ldo14_reg: LDO14 {
 704                                 regulator-name = "VDDQ_M1_LDO_1.2V_AP";
 705                                 regulator-min-microvolt = <1200000>;
 706                                 regulator-max-microvolt = <1200000>;
 707                                 regulator-always-on;
 708                                 regulator-state-mem {
 709                                         regulator-off-in-suspend;
 710                                 };
 711                         };
 712
 713                         ldo15_reg: LDO15 {
 714                                 regulator-name = "VDDQ_M2_LDO_1.2V_AP";
 715                                 regulator-min-microvolt = <1200000>;
 716                                 regulator-max-microvolt = <1200000>;
 717                                 regulator-always-on;
 718                                 regulator-state-mem {
 719                                         regulator-off-in-suspend;
 720                                 };
 721                         };
 722
 723                         ldo16_reg: LDO16 {
 724                                 regulator-name = "VDDQ_EFUSE";
 725                                 regulator-min-microvolt = <1400000>;
 726                                 regulator-max-microvolt = <3400000>;
 727                                 regulator-always-on;
 728                         };
 729
 730                         ldo17_reg: LDO17 {
 731                                 regulator-name = "V_TFLASH_2.8V_AP";
 732                                 regulator-min-microvolt = <2800000>;
 733                                 regulator-max-microvolt = <2800000>;
 734                         };
 735
 736                         ldo18_reg: LDO18 {
 737                                 regulator-name = "V_CODEC_1.8V_AP";
 738                                 regulator-min-microvolt = <1800000>;
 739                                 regulator-max-microvolt = <1800000>;
 740                         };
 741
 742                         ldo19_reg: LDO19 {
 743                                 regulator-name = "VDDA_1.8V_COMP";
 744                                 regulator-min-microvolt = <1800000>;
 745                                 regulator-max-microvolt = <1800000>;
 746                                 regulator-always-on;
 747                         };
 748
 749                         ldo20_reg: LDO20 {
 750                                 regulator-name = "VCC_2.8V_AP";
 751                                 regulator-min-microvolt = <2800000>;
 752                                 regulator-max-microvolt = <2800000>;
 753                                 regulator-always-on;
 754                         };
 755
 756                         ldo21_reg: LDO21 {
 757                                 regulator-name = "VT_CAM_1.8V";
 758                                 regulator-min-microvolt = <1800000>;
 759                                 regulator-max-microvolt = <1800000>;
 760                         };
 761
 762                         ldo22_reg: LDO22 {
 763                                 regulator-name = "CAM_IO_1.8V_AP";
 764                                 regulator-min-microvolt = <1800000>;
 765                                 regulator-max-microvolt = <1800000>;
 766                         };
 767
 768                         ldo23_reg: LDO23 {
 769                                 regulator-name = "CAM_SEN_CORE_1.2V_AP";
 770                                 regulator-min-microvolt = <1050000>;
 771                                 regulator-max-microvolt = <1200000>;
 772                         };
 773
 774                         ldo24_reg: LDO24 {
 775                                 regulator-name = "VT_CAM_1.2V";
 776                                 regulator-min-microvolt = <1200000>;
 777                                 regulator-max-microvolt = <1200000>;
 778                         };
 779
 780                         ldo25_reg: LDO25 {
 781                                 regulator-name = "UNUSED_LDO25";
 782                                 regulator-min-microvolt = <2800000>;
 783                                 regulator-max-microvolt = <2800000>;
 784                         };
 785
 786                         ldo26_reg: LDO26 {
 787                                 regulator-name = "CAM_AF_2.8V_AP";
 788                                 regulator-min-microvolt = <2800000>;
 789                                 regulator-max-microvolt = <2800000>;
 790                         };
 791
 792                         ldo27_reg: LDO27 {
 793                                 regulator-name = "VCC_3.0V_LCD_AP";
 794                                 regulator-min-microvolt = <3000000>;
 795                                 regulator-max-microvolt = <3000000>;
 796                         };
 797
 798                         ldo28_reg: LDO28 {
 799                                 regulator-name = "VCC_1.8V_LCD_AP";
 800                                 regulator-min-microvolt = <1800000>;
 801                                 regulator-max-microvolt = <1800000>;
 802                         };
 803
 804                         ldo29_reg: LDO29 {
 805                                 regulator-name = "VT_CAM_2.8V";
 806                                 regulator-min-microvolt = <3000000>;
 807                                 regulator-max-microvolt = <3000000>;
 808                         };
 809
 810                         ldo30_reg: LDO30 {
 811                                 regulator-name = "TSP_AVDD_3.3V_AP";
 812                                 regulator-min-microvolt = <3300000>;
 813                                 regulator-max-microvolt = <3300000>;
 814                         };
 815
 816                         ldo31_reg: LDO31 {
 817                                 /*
 818                                  * LDO31 differs from target to target,
 819                                  * its definition is in the .dts
 820                                  */
 821                         };
 822
 823                         ldo32_reg: LDO32 {
 824                                 regulator-name = "VTOUCH_1.8V_AP";
 825                                 regulator-min-microvolt = <1800000>;
 826                                 regulator-max-microvolt = <1800000>;
 827                         };
 828
 829                         ldo33_reg: LDO33 {
 830                                 regulator-name = "VTOUCH_LED_3.3V";
 831                                 regulator-min-microvolt = <2500000>;
 832                                 regulator-max-microvolt = <3300000>;
 833                                 regulator-ramp-delay = <12500>;
 834                         };
 835
 836                         ldo34_reg: LDO34 {
 837                                 regulator-name = "VCC_1.8V_MHL_AP";
 838                                 regulator-min-microvolt = <1000000>;
 839                                 regulator-max-microvolt = <2100000>;
 840                         };
 841
 842                         ldo35_reg: LDO35 {
 843                                 regulator-name = "OIS_VM_2.8V";
 844                                 regulator-min-microvolt = <1800000>;
 845                                 regulator-max-microvolt = <2800000>;
 846                         };
 847
 848                         ldo36_reg: LDO36 {
 849                                 regulator-name = "VSIL_1.0V";
 850                                 regulator-min-microvolt = <1000000>;
 851                                 regulator-max-microvolt = <1000000>;
 852                         };
 853
 854                         ldo37_reg: LDO37 {
 855                                 regulator-name = "VF_1.8V";
 856                                 regulator-min-microvolt = <1800000>;
 857                                 regulator-max-microvolt = <1800000>;
 858                         };
 859
 860                         ldo38_reg: LDO38 {
 861                                 /*
 862                                  * LDO38 differs from target to target,
 863                                  * its definition is in the .dts
 864                                  */
 865                         };
 866
 867                         ldo39_reg: LDO39 {
 868                                 regulator-name = "V_HRM_1.8V";
 869                                 regulator-min-microvolt = <1800000>;
 870                                 regulator-max-microvolt = <1800000>;
 871                         };
 872
 873                         ldo40_reg: LDO40 {
 874                                 regulator-name = "V_HRM_3.3V";
 875                                 regulator-min-microvolt = <3300000>;
 876                                 regulator-max-microvolt = <3300000>;
 877                         };
 878
 879                         buck1_reg: BUCK1 {
 880                                 regulator-name = "VDD_MIF_0.9V_AP";
 881                                 regulator-min-microvolt = <600000>;
 882                                 regulator-max-microvolt = <1500000>;
 883                                 regulator-always-on;
 884                                 regulator-state-mem {
 885                                         regulator-off-in-suspend;
 886                                 };
 887                         };
 888
 889                         buck2_reg: BUCK2 {
 890                                 regulator-name = "VDD_EGL_1.0V_AP";
 891                                 regulator-min-microvolt = <900000>;
 892                                 regulator-max-microvolt = <1300000>;
 893                                 regulator-always-on;
 894                                 regulator-state-mem {
 895                                         regulator-off-in-suspend;
 896                                 };
 897                         };
 898
 899                         buck3_reg: BUCK3 {
 900                                 regulator-name = "VDD_KFC_1.0V_AP";
 901                                 regulator-min-microvolt = <800000>;
 902                                 regulator-max-microvolt = <1200000>;
 903                                 regulator-always-on;
 904                                 regulator-state-mem {
 905                                         regulator-off-in-suspend;
 906                                 };
 907                         };
 908
 909                         buck4_reg: BUCK4 {
 910                                 regulator-name = "VDD_INT_0.95V_AP";
 911                                 regulator-min-microvolt = <600000>;
 912                                 regulator-max-microvolt = <1500000>;
 913                                 regulator-always-on;
 914                                 regulator-state-mem {
 915                                         regulator-off-in-suspend;
 916                                 };
 917                         };
 918
 919                         buck5_reg: BUCK5 {
 920                                 regulator-name = "VDD_DISP_CAM0_0.9V_AP";
 921                                 regulator-min-microvolt = <600000>;
 922                                 regulator-max-microvolt = <1500000>;
 923                                 regulator-always-on;
 924                                 regulator-state-mem {
 925                                         regulator-off-in-suspend;
 926                                 };
 927                         };
 928
 929                         buck6_reg: BUCK6 {
 930                                 regulator-name = "VDD_G3D_0.9V_AP";
 931                                 regulator-min-microvolt = <600000>;
 932                                 regulator-max-microvolt = <1500000>;
 933                                 regulator-always-on;
 934                                 regulator-state-mem {
 935                                         regulator-off-in-suspend;
 936                                 };
 937                         };
 938
 939                         buck7_reg: BUCK7 {
 940                                 regulator-name = "VDD_MEM1_1.2V_AP";
 941                                 regulator-min-microvolt = <1200000>;
 942                                 regulator-max-microvolt = <1200000>;
 943                                 regulator-always-on;
 944                         };
 945
 946                         buck8_reg: BUCK8 {
 947                                 regulator-name = "VDD_LLDO_1.35V_AP";
 948                                 regulator-min-microvolt = <1350000>;
 949                                 regulator-max-microvolt = <3300000>;
 950                                 regulator-always-on;
 951                         };
 952
 953                         buck9_reg: BUCK9 {
 954                                 regulator-name = "VDD_MLDO_2.0V_AP";
 955                                 regulator-min-microvolt = <1350000>;
 956                                 regulator-max-microvolt = <3300000>;
 957                                 regulator-always-on;
 958                         };
 959
 960                         buck10_reg: BUCK10 {
 961                                 regulator-name = "vdd_mem2";
 962                                 regulator-min-microvolt = <550000>;
 963                                 regulator-max-microvolt = <1500000>;
 964                                 regulator-always-on;
 965                         };
 966                 };
 967         };
 968 };
 969
 970 &hsi2c_3 {
 971         status = "okay";
 972
 973         clock-frequency = <400000>;
 974         pinctrl-names = "default","on_i2c","off_i2c";
 975         pinctrl-0 = <&fimc_is_hsi2c_off &fimc_is_ch1_i2c_off>;
 976         pinctrl-1 = <&fimc_is_ois_hsi2c_on &fimc_is_ch1_i2c_off>;
 977         pinctrl-2 = <&fimc_is_hsi2c_off &fimc_is_ch1_i2c>;
 978
 979         ois@24{
 980                 compatible = "rumba,ois";
 981                 reg = <0x24>;
 982         };
 983
 984         af@0c{
 985                 compatible = "samsung,af";
 986                 reg = <0x0c>;
 987         };
 988 };
 989
 990 &hsi2c_4 {
 991         status = "okay";
 992
 993         s3fwrn5: nfc@27 {
 994                 compatible = "samsung,s3fwrn5-i2c";
 995                 reg = <0x27>;
 996                 interrupt-parent = <&gpa1>;
 997                 interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
 998                 s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
 999                 s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
1000         };
1001
1002         fimc_is_fan53555@60 {
1003                 compatible = "samsung,fimc_is_fan53555";
1004                 reg = <0x60>;
1005                 comp_en = <&gpf1 7 0x01>;
1006                 status = "okay";
1007         };
1008
1009         max86900@51 {
1010                 compatible = "maxim,max86902";
1011                 reg = <0x51>;
1012                 interrupt-parent = <&gpa0>;
1013                 interrupts = <6 0 0>;
1014                 vdd_1p8-supply = <&ldo39_reg>;
1015                 led_3p3-supply = <&ldo40_reg>;
1016                 max86900,hrm_int-gpio = <&gpa0 6 0>;
1017                 max86900,hrm_en-gpio = <&gpr3 3 0>;
1018                 max86900,dual-hrm = <1>;
1019         };
1020 };
1021
1022 &hsi2c_5 {
1023         status = "okay";
1024
1025         stmfts: touchscreen@49 {
1026                 compatible = "st,stmfts";
1027                 reg = <0x49>;
1028                 interrupt-parent = <&gpa1>;
1029                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
1030                 avdd-supply = <&ldo30_reg>;
1031                 vdd-supply = <&ldo31_reg>;
1032         };
1033 };
1034
1035 &hsi2c_7 {
1036         status = "okay";
1037         clock-frequency = <1000000>;
1038
1039         sii8620@39 {
1040                 reg = <0x39>;
1041                 compatible = "sil,sii8620";
1042                 cvcc10-supply = <&ldo36_reg>;
1043                 iovcc18-supply = <&ldo34_reg>;
1044                 interrupt-parent = <&gpf0>;
1045                 interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
1046                 reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>;
1047                 clocks = <&pmu_system_controller 0>;
1048                 clock-names = "xtal";
1049
1050                 ports {
1051                         #address-cells = <1>;
1052                         #size-cells = <0>;
1053
1054                         port@0 {
1055                                 reg = <0>;
1056                                 mhl_to_hdmi: endpoint {
1057                                         remote-endpoint = <&hdmi_to_mhl>;
1058                                 };
1059                         };
1060
1061                         port@1 {
1062                                 reg = <1>;
1063                                 mhl_to_musb_con: endpoint {
1064                                         remote-endpoint = <&musb_con_to_mhl>;
1065                                 };
1066                         };
1067                 };
1068         };
1069 };
1070
1071 &hsi2c_8 {
1072         status = "okay";
1073
1074         max77843@66 {
1075                 compatible = "maxim,max77843";
1076                 interrupt-parent = <&gpa1>;
1077                 interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
1078                 reg = <0x66>;
1079
1080                 muic: max77843-muic {
1081                         compatible = "maxim,max77843-muic";
1082
1083                         musb_con: musb_connector {
1084                                 compatible = "samsung,usb-connector-11pin",
1085                                              "usb-b-connector";
1086                                 label = "micro-USB";
1087                                 type = "micro";
1088
1089                                 ports {
1090                                         #address-cells = <1>;
1091                                         #size-cells = <0>;
1092
1093                                         port@3 {
1094                                                 reg = <3>;
1095                                                 musb_con_to_mhl: endpoint {
1096                                                         remote-endpoint = <&mhl_to_musb_con>;
1097                                                 };
1098                                         };
1099                                 };
1100                         };
1101                 };
1102
1103                 regulators {
1104                         compatible = "maxim,max77843-regulator";
1105                         safeout1_reg: SAFEOUT1 {
1106                                 regulator-name = "SAFEOUT1";
1107                                 regulator-min-microvolt = <3300000>;
1108                                 regulator-max-microvolt = <4950000>;
1109                         };
1110
1111                         safeout2_reg: SAFEOUT2 {
1112                                 regulator-name = "SAFEOUT2";
1113                                 regulator-min-microvolt = <3300000>;
1114                                 regulator-max-microvolt = <4950000>;
1115                         };
1116
1117                         charger_reg: CHARGER {
1118                                 regulator-name = "CHARGER";
1119                                 regulator-min-microamp = <100000>;
1120                                 regulator-max-microamp = <3150000>;
1121                         };
1122                 };
1123
1124                 haptic: max77843-haptic {
1125                         compatible = "maxim,max77843-haptic";
1126                         haptic-supply = <&ldo38_reg>;
1127                         pwms = <&pwm 0 33670 0>;
1128                         pwm-names = "haptic";
1129                 };
1130         };
1131 };
1132
1133 &hsi2c_11 {
1134         status = "okay";
1135 };
1136
1137 &i2s0 {
1138         status = "okay";
1139 };
1140
1141 &i2s1 {
1142         assigned-clocks = <&i2s1 CLK_I2S_RCLK_SRC>;
1143         assigned-clock-parents = <&cmu_peric CLK_SCLK_I2S1>;
1144         status = "okay";
1145 };
1146
1147 &ispi2c_0 {
1148         fimc_is_companion: sensor@3d {
1149                 compatible = "samsung,s5c73c1";
1150                 reg = <0x3d>;
1151                 power-domains = <&pd_cam1>;
1152                 clock-names =
1153                                 /* SENSOR0 MCLK */
1154                                 "sclk_isp_sensor0",
1155                                 "mout_sclk_isp_sensor0",
1156                                 "dout_sclk_isp_sensor0_a",
1157                                 "dout_sclk_isp_sensor0_b",
1158
1159                                 "mout_bus_pll_user",
1160                                 "oscclk",
1161
1162                                 /* SPI-ISP */
1163                                 "sclk_isp_spi0_top",
1164                                 "sclk_isp_spi1_top",
1165                                 "mout_sclk_isp_spi0",
1166                                 "mout_sclk_isp_spi1",
1167
1168                                 "gate_isp_spi1",
1169                                 "gate_isp_spi0",
1170                                 "dout_sclk_isp_spi0_a",
1171                                 "dout_sclk_isp_spi0_b",
1172                                 "dout_sclk_isp_spi1_a",
1173                                 "dout_sclk_isp_spi1_b",
1174
1175                                 "mout_sclk_isp_spi0_user",
1176                                 "mout_sclk_isp_spi1_user",
1177
1178                                 /* CMU TOP */
1179                                 "dout_aclk_cam1_333",
1180
1181                                 /* USER_MUX_SEL */
1182                                 "aclk_cam1_333",
1183                                 "mout_aclk_cam1_333_user",
1184
1185                                 /* MPWM */
1186                                 "dout_pclk_cam1_166",
1187                                 "dout_pclk_cam1_83",
1188                                 "dout_sclk_isp_mpwm";
1189                 clocks =
1190                                 /* SENSOR0 MCLK */
1191                                 <&cmu_top CLK_SCLK_ISP_SENSOR0>,
1192                                 <&cmu_top CLK_MOUT_SCLK_ISP_SENSOR0>,
1193                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR0_A>,
1194                                 <&cmu_top CLK_DIV_SCLK_ISP_SENSOR0_B>,
1195
1196                                 <&cmu_top CLK_MOUT_BUS_PLL_USER>,
1197                                 <&xxti>,
1198
1199                                 <&cmu_top CLK_SCLK_ISP_SPI0_CAM1>,
1200                                 <&cmu_top CLK_SCLK_ISP_SPI1_CAM1>,
1201                                 <&cmu_top CLK_MOUT_SCLK_ISP_SPI0>,
1202                                 <&cmu_top CLK_MOUT_SCLK_ISP_SPI1>,
1203
1204                                 <&cmu_cam1 CLK_ISP_SPI1>,
1205                                 <&cmu_cam1 CLK_ISP_SPI0>,
1206
1207                                 <&cmu_top CLK_DIV_SCLK_ISP_SPI0_A>,
1208                                 <&cmu_top CLK_DIV_SCLK_ISP_SPI0_B>,
1209                                 <&cmu_top CLK_DIV_SCLK_ISP_SPI1_A>,
1210                                 <&cmu_top CLK_DIV_SCLK_ISP_SPI1_B>,
1211
1212                                 <&cmu_cam1 CLK_MOUT_SCLK_ISP_SPI0_USER>,
1213                                 <&cmu_cam1 CLK_MOUT_SCLK_ISP_SPI1_USER>,
1214
1215                                 <&cmu_top CLK_DIV_ACLK_CAM1_333>,
1216
1217                                 /* USER_MUX_SEL */
1218                                 <&cmu_top CLK_ACLK_CAM1_333>,
1219                                 <&cmu_cam1 CLK_MOUT_ACLK_CAM1_333_USER>,
1220
1221                                 /* MPWM */
1222                                 <&cmu_cam1 CLK_DIV_PCLK_CAM1_166>,
1223                                 <&cmu_cam1 CLK_DIV_PCLK_CAM1_83>,
1224                                 <&cmu_cam1 CLK_DIV_SCLK_ISP_MPWM>;
1225
1226                 pinctrl-names ="default", "ch0", "af0", "off0";
1227                 pinctrl-0 = <&fimc_is_ch0_mclk_off>;
1228                 pinctrl-1 = <&fimc_is_ch0_mclk>;
1229                 pinctrl-2 = <&fimc_is_ch0_mclk>;
1230                 pinctrl-3 = <&fimc_is_ch0_mclk_off>;
1231
1232                 scenario = <0>;
1233                 mclk_ch = <0>;
1234                 sensor_id = <104>;
1235
1236                 gpios_cam_en = <&gpf4 7 0x1>;
1237                 gpio_reset = <&gpc0 4 0x1>;
1238                 gpios_comp_en = <&gpf1 7 0x1>; /* COMP_EN */
1239                 gpios_comp_reset = <&gpf5 7 0x1>; /* COMP_RSTN */
1240                 gpios_ois_en = <&gpf4 6 0>; /* OIS_EN*/
1241
1242                 status = "okay";
1243         };
1244 };
1245
1246 &mali {
1247         status = "okay";
1248         vdd_g3d-supply = <&buck6_reg>;
1249         mali-supply = <&buck6_reg>;
1250 };
1251
1252 &mshc_0 {
1253         status = "okay";
1254         mmc-hs200-1_8v;
1255         mmc-hs400-1_8v;
1256         cap-mmc-highspeed;
1257         non-removable;
1258         card-detect-delay = <200>;
1259         samsung,dw-mshc-ciu-div = <3>;
1260         samsung,dw-mshc-sdr-timing = <0 4>;
1261         samsung,dw-mshc-ddr-timing = <0 2>;
1262         samsung,dw-mshc-hs400-timing = <0 3>;
1263         samsung,read-strobe-delay = <90>;
1264         fifo-depth = <0x80>;
1265         pinctrl-names = "default";
1266         pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_qrdy &sd0_bus1 &sd0_bus4
1267                         &sd0_bus8 &sd0_rdqs>;
1268         bus-width = <8>;
1269         assigned-clocks = <&cmu_top CLK_SCLK_MMC0_FSYS>;
1270         assigned-clock-rates = <800000000>;
1271 };
1272
1273 &mshc_2 {
1274         status = "okay";
1275         cap-sd-highspeed;
1276         disable-wp;
1277         cd-gpios = <&gpa2 4 GPIO_ACTIVE_HIGH>;
1278         cd-inverted;
1279         card-detect-delay = <200>;
1280         samsung,dw-mshc-ciu-div = <3>;
1281         samsung,dw-mshc-sdr-timing = <0 4>;
1282         samsung,dw-mshc-ddr-timing = <0 2>;
1283         fifo-depth = <0x80>;
1284         pinctrl-names = "default";
1285         pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_bus1 &sd2_bus4>;
1286         bus-width = <4>;
1287 };
1288
1289 &pcie {
1290         status = "okay";
1291         assigned-clocks = <&cmu_fsys CLK_MOUT_SCLK_PCIE_100_USER>,
1292                         <&cmu_top CLK_MOUT_SCLK_PCIE_100>;
1293         assigned-clock-parents = <&cmu_top CLK_SCLK_PCIE_100_FSYS>,
1294                         <&cmu_top CLK_MOUT_BUS_PLL_USER>;
1295         assigned-clock-rates = <0>, <100000000>;
1296         #interrupt-cells = <1>;
1297         interrupt-map-mask = <0 0 0 0>;
1298         interrupt-map = <0 0 0 0 &gic GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
1299 };
1300
1301 &ppmu_d0_general {
1302         status = "okay";
1303         events {
1304                 ppmu_event0_d0_general: ppmu-event0-d0-general {
1305                         event-name = "ppmu-event0-d0-general";
1306                 };
1307         };
1308 };
1309
1310 &ppmu_d1_general {
1311         status = "okay";
1312         events {
1313                 ppmu_event0_d1_general: ppmu-event0-d1-general {
1314                        event-name = "ppmu-event0-d1-general";
1315                };
1316        };
1317 };
1318
1319 &pinctrl_alive {
1320         pinctrl-names = "default";
1321         pinctrl-0 = <&initial_alive &sleep_alive>;
1322
1323         initial_alive: initial-state {
1324                 PIN(INPUT, gpa0-0, DOWN, FAST_SR1);
1325                 PIN(INPUT, gpa0-1, NONE, FAST_SR1);
1326                 PIN(INPUT, gpa0-2, DOWN, FAST_SR1);
1327                 PIN(INPUT, gpa0-3, NONE, FAST_SR1);
1328                 PIN(INPUT, gpa0-4, NONE, FAST_SR1);
1329                 PIN(INPUT, gpa0-5, DOWN, FAST_SR1);
1330                 PIN(INPUT, gpa0-6, NONE, FAST_SR1);
1331                 PIN(INPUT, gpa0-7, NONE, FAST_SR1);
1332
1333                 PIN(INPUT, gpa1-1, UP, FAST_SR1);
1334                 PIN(INPUT, gpa1-2, NONE, FAST_SR1);
1335                 PIN(INPUT, gpa1-3, DOWN, FAST_SR1);
1336                 PIN(INPUT, gpa1-4, DOWN, FAST_SR1);
1337                 PIN(INPUT, gpa1-5, NONE, FAST_SR1);
1338                 PIN(INPUT, gpa1-6, NONE, FAST_SR1);
1339                 PIN(INPUT, gpa1-7, NONE, FAST_SR1);
1340
1341                 PIN(INPUT, gpa2-0, NONE, FAST_SR1);
1342                 PIN(INPUT, gpa2-1, NONE, FAST_SR1);
1343                 PIN(INPUT, gpa2-2, NONE, FAST_SR1);
1344                 PIN(INPUT, gpa2-3, DOWN, FAST_SR1);
1345                 PIN(INPUT, gpa2-4, NONE, FAST_SR1);
1346                 PIN(INPUT, gpa2-5, DOWN, FAST_SR1);
1347                 PIN(INPUT, gpa2-6, DOWN, FAST_SR1);
1348                 PIN(INPUT, gpa2-7, NONE, FAST_SR1);
1349
1350                 PIN(INPUT, gpa3-0, DOWN, FAST_SR1);
1351                 PIN(INPUT, gpa3-1, DOWN, FAST_SR1);
1352                 PIN(INPUT, gpa3-2, NONE, FAST_SR1);
1353                 PIN(INPUT, gpa3-4, NONE, FAST_SR1);
1354                 PIN(INPUT, gpa3-5, DOWN, FAST_SR1);
1355                 PIN(INPUT, gpa3-6, DOWN, FAST_SR1);
1356                 PIN(INPUT, gpa3-7, DOWN, FAST_SR1);
1357
1358                 PIN(INPUT, gpf1-0, NONE, FAST_SR1);
1359                 PIN(INPUT, gpf1-1, NONE, FAST_SR1);
1360                 PIN(INPUT, gpf1-2, DOWN, FAST_SR1);
1361                 PIN(INPUT, gpf1-4, UP, FAST_SR1);
1362                 PIN(OUTPUT, gpf1-5, NONE, FAST_SR1);
1363                 PIN(INPUT, gpf1-6, DOWN, FAST_SR1);
1364                 PIN(INPUT, gpf1-7, DOWN, FAST_SR1);
1365
1366                 PIN(INPUT, gpf2-0, DOWN, FAST_SR1);
1367                 PIN(INPUT, gpf2-1, DOWN, FAST_SR1);
1368
1369                 PIN(INPUT, gpf3-0, DOWN, FAST_SR1);
1370                 PIN(INPUT, gpf3-1, DOWN, FAST_SR1);
1371                 PIN(INPUT, gpf3-2, NONE, FAST_SR1);
1372                 PIN(INPUT, gpf3-3, DOWN, FAST_SR1);
1373
1374                 PIN(INPUT, gpf4-0, DOWN, FAST_SR1);
1375                 PIN(INPUT, gpf4-1, DOWN, FAST_SR1);
1376                 PIN(INPUT, gpf4-2, DOWN, FAST_SR1);
1377                 PIN(INPUT, gpf4-3, DOWN, FAST_SR1);
1378                 PIN(INPUT, gpf4-4, DOWN, FAST_SR1);
1379                 PIN(INPUT, gpf4-5, DOWN, FAST_SR1);
1380                 PIN(INPUT, gpf4-6, DOWN, FAST_SR1);
1381                 PIN(INPUT, gpf4-7, DOWN, FAST_SR1);
1382
1383                 PIN(INPUT, gpf5-0, DOWN, FAST_SR1);
1384                 PIN(INPUT, gpf5-1, DOWN, FAST_SR1);
1385                 PIN(INPUT, gpf5-2, DOWN, FAST_SR1);
1386                 PIN(INPUT, gpf5-3, DOWN, FAST_SR1);
1387                 PIN(OUTPUT, gpf5-4, NONE, FAST_SR1);
1388                 PIN(INPUT, gpf5-5, DOWN, FAST_SR1);
1389                 PIN(INPUT, gpf5-6, DOWN, FAST_SR1);
1390                 PIN(INPUT, gpf5-7, DOWN, FAST_SR1);
1391         };
1392
1393         sleep_alive: sleep-state {
1394                 PIN_SLP(gpf2-2, INPUT, UP);     /* MCU_AP_INT_2_1.8V */
1395                 PIN_SLP(gpf2-3, OUT0, DOWN);    /* AP_MCU_INT_1.8V */
1396         };
1397
1398         ssp_irq: ssp-irq {
1399                 samsung,pins = "gpa3-3";
1400                 samsung,pin-function = <0xf>;
1401                 samsung,pin-pud = <1>;
1402                 samsung,pin-drv = <3>;
1403         };
1404
1405         ssp_mcu_req: ssp-mcu-req {
1406                 samsung,pins = "gpf2-3";
1407                 samsung,pin-function = <1>;
1408                 samsung,pin-pud = <1>;
1409                 samsung,pin-drv = <3>;
1410         };
1411
1412         ssp_mcu_resp: ssp-mcu-resp {
1413                 samsung,pins = "gpf2-2";
1414                 samsung,pin-function = <0>;
1415                 samsung,pin-pud = <3>;
1416                 samsung,pin-drv = <3>;
1417         };
1418
1419         ssp_host_wake: ssp-host-wake {
1420                 samsung,pins = "gpa1-0";
1421                 samsung,pin-function = <0>;
1422                 samsung,pin-pud = <3>;
1423                 samsung,pin-drv = <3>;
1424         };
1425
1426         te_irq: te_irq {
1427                 samsung,pins = "gpf1-3";
1428                 samsung,pin-function = <0xf>;
1429         };
1430 };
1431
1432 &pinctrl_cpif {
1433         pinctrl-names = "default";
1434         pinctrl-0 = <&initial_cpif>;
1435
1436         initial_cpif: initial-state {
1437                 PIN(INPUT, gpv6-0, DOWN, FAST_SR1);
1438                 PIN(INPUT, gpv6-1, DOWN, FAST_SR1);
1439         };
1440 };
1441
1442 &pinctrl_ese {
1443         pinctrl-names = "default";
1444         pinctrl-0 = <&initial_ese &sleep_ese>;
1445
1446         initial_ese: initial-state {
1447                 PIN(INPUT, gpj2-1, DOWN, FAST_SR1);
1448                 PIN(INPUT, gpj2-2, DOWN, FAST_SR1);
1449         };
1450
1451         sleep_ese: sleep-state {
1452                 PIN_SLP(gpj2-0, PREV, DOWN);    /* WLAN_EN */
1453         };
1454 };
1455
1456 &pinctrl_fsys {
1457         pinctrl-names = "default";
1458         pinctrl-0 = <&initial_fsys &sleep_fsys>;
1459
1460         initial_fsys: initial-state {
1461                 PIN(INPUT, gpr3-0, NONE, FAST_SR1);
1462                 PIN(INPUT, gpr3-1, DOWN, FAST_SR1);
1463                 PIN(INPUT, gpr3-2, DOWN, FAST_SR1);
1464                 PIN(INPUT, gpr3-3, DOWN, FAST_SR1);
1465                 PIN(INPUT, gpr3-7, NONE, FAST_SR1);
1466         };
1467
1468         sleep_fsys: sleep-state {
1469                 PIN_SLP(gpr3-7, OUT0, DOWN);  /* BT_WAKE */
1470         };
1471 };
1472
1473 &pinctrl_imem {
1474         pinctrl-names = "default";
1475         pinctrl-0 = <&initial_imem>;
1476
1477         initial_imem: initial-state {
1478                 PIN(INPUT, gpf0-0, UP, FAST_SR1);
1479                 PIN(INPUT, gpf0-1, UP, FAST_SR1);
1480                 PIN(INPUT, gpf0-2, DOWN, FAST_SR1);
1481                 PIN(INPUT, gpf0-3, UP, FAST_SR1);
1482                 PIN(INPUT, gpf0-4, DOWN, FAST_SR1);
1483                 PIN(INPUT, gpf0-5, NONE, FAST_SR1);
1484                 PIN(INPUT, gpf0-6, DOWN, FAST_SR1);
1485                 PIN(INPUT, gpf0-7, UP, FAST_SR1);
1486         };
1487 };
1488
1489 &pinctrl_nfc {
1490         pinctrl-names = "default";
1491         pinctrl-0 = <&initial_nfc>;
1492
1493         initial_nfc: initial-state {
1494                 PIN(INPUT, gpj0-2, DOWN, FAST_SR1);
1495         };
1496 };
1497
1498 &pinctrl_peric {
1499         pinctrl-names = "default";
1500         pinctrl-0 = <&initial_peric &sleep_peric>;
1501
1502         initial_peric: initial-state {
1503                 PIN(INPUT, gpv7-0, DOWN, FAST_SR1);
1504                 PIN(INPUT, gpv7-1, DOWN, FAST_SR1);
1505                 PIN(INPUT, gpv7-2, NONE, FAST_SR1);
1506                 PIN(INPUT, gpv7-3, DOWN, FAST_SR1);
1507                 PIN(INPUT, gpv7-4, DOWN, FAST_SR1);
1508                 PIN(INPUT, gpv7-5, DOWN, FAST_SR1);
1509
1510                 PIN(INPUT, gpb0-4, DOWN, FAST_SR1);
1511
1512                 PIN(INPUT, gpc0-2, DOWN, FAST_SR1);
1513                 PIN(INPUT, gpc0-5, DOWN, FAST_SR1);
1514                 PIN(INPUT, gpc0-7, DOWN, FAST_SR1);
1515
1516                 PIN(INPUT, gpc1-1, DOWN, FAST_SR1);
1517
1518                 PIN(INPUT, gpc3-4, NONE, FAST_SR1);
1519                 PIN(INPUT, gpc3-5, NONE, FAST_SR1);
1520                 PIN(INPUT, gpc3-6, NONE, FAST_SR1);
1521                 PIN(INPUT, gpc3-7, NONE, FAST_SR1);
1522
1523                 PIN(OUTPUT, gpg0-0, NONE, FAST_SR1);
1524                 PIN(2, gpg0-1, DOWN, FAST_SR1);
1525
1526                 PIN(INPUT, gpd2-5, DOWN, FAST_SR1);
1527
1528                 PIN(INPUT, gpd4-0, NONE, FAST_SR1);
1529                 PIN(INPUT, gpd4-1, DOWN, FAST_SR1);
1530                 PIN(INPUT, gpd4-2, DOWN, FAST_SR1);
1531                 PIN(INPUT, gpd4-3, DOWN, FAST_SR1);
1532                 PIN(INPUT, gpd4-4, DOWN, FAST_SR1);
1533
1534                 PIN(INPUT, gpd6-3, DOWN, FAST_SR1);
1535
1536                 PIN(INPUT, gpd8-1, UP, FAST_SR1);
1537
1538                 PIN(INPUT, gpg1-0, DOWN, FAST_SR1);
1539                 PIN(INPUT, gpg1-1, DOWN, FAST_SR1);
1540                 PIN(INPUT, gpg1-2, DOWN, FAST_SR1);
1541                 PIN(INPUT, gpg1-3, DOWN, FAST_SR1);
1542                 PIN(INPUT, gpg1-4, DOWN, FAST_SR1);
1543
1544                 PIN(INPUT, gpg2-0, DOWN, FAST_SR1);
1545                 PIN(INPUT, gpg2-1, DOWN, FAST_SR1);
1546
1547                 PIN(INPUT, gpg3-0, DOWN, FAST_SR1);
1548                 PIN(INPUT, gpg3-1, DOWN, FAST_SR1);
1549                 PIN(INPUT, gpg3-5, DOWN, FAST_SR1);
1550         };
1551
1552         sleep_peric: sleep-state {
1553                 PIN_SLP(gpc0-1, PREV, DOWN);    /* FLASH_LED_STROBE */
1554                 PIN_SLP(gpc0-2, INPUT, DOWN);   /* FLASH_LED_TORCH */
1555                 PIN_SLP(gpd4-0, PREV, DOWN);    /* BT_EN */
1556
1557                 PIN_SLP(gpd8-0, OUT1, UP);      /* SHUB_SPI_SCK */
1558                 PIN_SLP(gpd8-1, OUT1, UP);      /* SHUB_SPI_SSN */
1559                 PIN_SLP(gpd6-0, INPUT, DOWN);   /* SHUB_SPI_MISO */
1560                 PIN_SLP(gpd6-1, OUT1, UP);      /* SHUB_SPI_MOSI */
1561                 PIN_SLP(gpg2-0, PREV, NONE);    /* GPS_HUB_EN */
1562         };
1563
1564         ssp_gps_pwr_en: ssp-gps-pwr-en {
1565                 samsung,pins = "gpg2-0";
1566                 samsung,pin-function = <1>;
1567                 samsung,pin-pud = <1>;
1568                 samsung,pin-drv = <2>;
1569         };
1570
1571         fimc_is_ois_hsi2c_on: fimc-is-ois-hsi2c-on {
1572                 samsung,pins = "gpd1-3", "gpd1-2";
1573                 samsung,pin-function = <3>;
1574                 samsung,pin-pud = <0>;
1575                 samsung,pin-drv = <0>;
1576         };
1577
1578         fimc_is_hsi2c_off: fimc-is-hsi2c-off {
1579                 samsung,pins = "gpd1-3", "gpd1-2";
1580                 samsung,pin-function = <0>;
1581                 samsung,pin-pud = <0>;
1582                 samsung,pin-drv = <3>;
1583         };
1584
1585         fimc_is_ch2_i2c_off: fimc-is-ch2-i2c-off {
1586                 samsung,pins = "gpc2-5", "gpc2-4";
1587                 samsung,pin-function = <0>;
1588                 samsung,pin-pud = <0>;
1589                 samsung,pin-drv = <6>;
1590         };
1591
1592         fimc_is_ch2_mclk_off: fimc-is-ch2_mclk_off {
1593                 samsung,pins = "gpd7-2";
1594                 samsung,pin-function = <1>;
1595                 samsung,pin-pud = <1>;
1596                 samsung,pin-drv = <2>;
1597         };
1598
1599         fimc_is_spi_pin0: fimc-is-spi-pin0 {
1600                 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
1601                 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
1602                 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
1603                 samsung,pins = "gpc3-3", "gpc3-2", "gpc3-0";
1604         };
1605
1606         fimc_is_spi_ssn0: fimc-is-spi-ssn0 {
1607                 samsung,pins = "gpc3-1", "gpc0-6";
1608                 samsung,pin-function = <0>;
1609                 samsung,pin-pud = <0>;
1610                 samsung,pin-drv = <2>;
1611         };
1612
1613         fimc_is_ch0_mclk_off: fimc-is-ch0_mclk_off {
1614                 samsung,pins = "gpd7-0";
1615                 samsung,pin-function = <1>;
1616                 samsung,pin-pud = <1>;
1617                 samsung,pin-drv = <2>;
1618         };
1619
1620         fimc_is_ch1_i2c_off: fimc-is-ch1-i2c-off {
1621                 samsung,pins = "gpc2-3", "gpc2-2";
1622                 samsung,pin-function = <0>;
1623                 samsung,pin-pud = <0>;
1624                 samsung,pin-drv = <3>;
1625         };
1626
1627         fimc_is_comp_int: fimc-is-comp-int {
1628                 samsung,pins = "gpc1-0";
1629                 samsung,pin-function = <3>;
1630                 samsung,pin-pud = <1>;
1631                 samsung,pin-drv = <0>;
1632         };
1633
1634         uart1_bus: uart1-bus {
1635                 samsung,pins = "gpd1-1", "gpd1-0";
1636                 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
1637                 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
1638         };
1639 };
1640
1641 &pinctrl_touch {
1642         pinctrl-names = "default";
1643         pinctrl-0 = <&initial_touch>;
1644
1645         initial_touch: initial-state {
1646                 PIN(INPUT, gpj1-2, DOWN, FAST_SR1);
1647         };
1648 };
1649
1650 &pwm {
1651         pinctrl-0 = <&pwm0_out>;
1652         pinctrl-names = "default";
1653         status = "okay";
1654 };
1655
1656 &mic {
1657         status = "okay";
1658 };
1659
1660 &pmu_system_controller {
1661         assigned-clocks = <&pmu_system_controller 0>;
1662         assigned-clock-parents = <&xxti>;
1663
1664         syscon-reboot-mode {
1665                 compatible = "syscon-reboot-mode";
1666                 offset = <0x80c>;
1667                 mode-normal = <BOOT_NORMAL>;
1668                 mode-download = <BOOT_BL_DOWNLOAD>;
1669         };
1670 };
1671
1672 &serial_1 {
1673         status = "okay";
1674 };
1675
1676 &serial_3 {
1677         status = "okay";
1678 };
1679
1680 &spi_0 {
1681         cs-gpios = <&gpd8 1 0>;
1682         status = "okay";
1683
1684         bcm4773@0 {
1685                 compatible = "ssp,BCM4773";
1686                 reg = <0>;
1687                 spi-max-frequency = <26000000>;
1688                 spi-cpol;
1689                 spi-cpha;
1690
1691                 clocks = <&s2mps13_osc 0>;
1692                 clock-names = "xtal";
1693
1694                 pinctrl-names ="default";
1695                 pinctrl-0 = <&ssp_irq &ssp_mcu_req &ssp_mcu_resp>;
1696
1697                 ssp-irq = <&gpa3 3 0x01>;
1698                 ssp-mcu-req = <&gpf2 3 0x01>;
1699                 ssp-mcu-resp = <&gpf2 2 0x00>;
1700                 ssp-acc-position = <5>;
1701                 ssp-mag-position = <3>;
1702                 ssp-sns-combination = <0>;
1703                 ssp,prox-hi_thresh = <130>;
1704                 ssp,prox-low_thresh = <90>;
1705                 ssp-ap-rev = <1>;
1706                 ssp-mag-array = <10196 176 (-21) 516 10378 20 (-774) 1027 9454>;
1707                 ssp-hw-rev = <9>;
1708
1709                 controller-data {
1710                         samsung,spi-feedback-delay = <0>;
1711                 };
1712         };
1713 };
1714
1715 &spi_1 {
1716         cs-gpios = <&gpd6 3 GPIO_ACTIVE_HIGH>;
1717         status = "okay";
1718
1719         wm5110: wm5110-codec@0 {
1720                 compatible = "wlf,wm5110";
1721                 reg = <0x0>;
1722                 spi-max-frequency = <20000000>;
1723                 interrupt-parent = <&gpa0>;
1724                 interrupts = <4 IRQ_TYPE_NONE>;
1725                 clocks = <&pmu_system_controller 0>,
1726                         <&s2mps13_osc S2MPS11_CLK_BT>;
1727                 clock-names = "mclk1", "mclk2";
1728
1729                 gpio-controller;
1730                 #gpio-cells = <2>;
1731
1732                 wlf,micd-detect-debounce = <300>;
1733                 wlf,micd-bias-start-time = <0x1>;
1734                 wlf,micd-rate = <0x7>;
1735                 wlf,micd-dbtime = <0x1>;
1736                 wlf,micd-force-micbias;
1737                 wlf,micd-configs = <0x0 1 0>;
1738                 wlf,hpdet-channel = <1>;
1739                 wlf,gpsw = <0x1>;
1740                 wlf,inmode = <2 0 2 0>;
1741
1742                 wlf,reset = <&gpc0 7 GPIO_ACTIVE_HIGH>;
1743                 wlf,ldoena = <&gpf0 0 GPIO_ACTIVE_HIGH>;
1744
1745                 /* core supplies */
1746                 AVDD-supply = <&ldo18_reg>;
1747                 DBVDD1-supply = <&ldo18_reg>;
1748                 CPVDD-supply = <&ldo18_reg>;
1749                 DBVDD2-supply = <&ldo18_reg>;
1750                 DBVDD3-supply = <&ldo18_reg>;
1751
1752                 controller-data {
1753                         samsung,spi-feedback-delay = <0>;
1754                 };
1755         };
1756 };
1757
1758 &spi_3 {
1759         status = "okay";
1760         no-cs-readback;
1761
1762         irled@0 {
1763                 compatible = "ir-spi-led";
1764                 reg = <0x0>;
1765                 spi-max-frequency = <5000000>;
1766                 power-supply = <&irda_regulator>;
1767                 duty-cycle = <60>;
1768                 led-active-low;
1769
1770                 controller-data {
1771                         samsung,spi-feedback-delay = <0>;
1772                 };
1773         };
1774 };
1775
1776 &spi_5 {
1777         cs-gpios = <&gpc0 6 0>, <&gpc3 1 0>;
1778
1779         status = "okay";
1780         clocks = <&cmu_cam1 CLK_ISP_SPI0>,
1781                 <&cmu_top CLK_SCLK_ISP_SPI1_CAM1>;
1782         clock-names = "spi", "spi_busclk0";
1783         pinctrl-names ="default";
1784         pinctrl-0 = <&fimc_is_spi_pin0>;
1785         num-cs = <2>;
1786         byte-swap;
1787
1788         fimc_is_spi_0@0 {
1789                 compatible = "samsung,fimc_is_spi0";
1790                 spi-max-frequency = <50000000>;
1791                 reg = <0x0>;
1792
1793                 controller-data {
1794                         samsung,spi-feedback-delay = <2>;
1795                 };
1796         };
1797
1798         fimc_is_spi_1@1 {
1799                 compatible = "samsung,fimc_is_spi1";
1800                 fimc_is_spi_sclk = "gpc3-0";
1801                 fimc_is_spi_ssn = "gpc3-1";
1802                 fimc_is_spi_miso = "gpc3-2";
1803                 fimc_is_spi_mois = "gpc3-3";
1804                 spi-max-frequency = <50000000>;
1805                 reg = <0x1>;
1806                 pinctrl-names = "default";
1807                 pinctrl-0 = <&fimc_is_comp_int>;
1808
1809                 controller-data {
1810                         samsung,spi-feedback-delay = <3>;
1811                 };
1812         };
1813 };
1814
1815 &timer {
1816         clock-frequency = <24000000>;
1817 };
1818
1819 &tmu_atlas0 {
1820         vtmu-supply = <&ldo3_reg>;
1821         status = "okay";
1822 };
1823
1824 &tmu_apollo {
1825         vtmu-supply = <&ldo3_reg>;
1826         status = "okay";
1827 };
1828
1829 &tmu_g3d {
1830         vtmu-supply = <&ldo3_reg>;
1831         status = "okay";
1832 };
1833
1834 &usbdrd30 {
1835         vdd33-supply = <&ldo10_reg>;
1836         vdd10-supply = <&ldo6_reg>;
1837         status = "okay";
1838 };
1839
1840 &usbdrd_dwc3 {
1841         dr_mode = "otg";
1842         extcon = <&muic>;
1843 };
1844
1845 &usbdrd30_phy {
1846         vbus-supply = <&safeout1_reg>;
1847         status = "okay";
1848 };
1849
1850 &xxti {
1851         clock-frequency = <24000000>;
1852 };
1853
1854 &fimc_is {
1855         status = "okay";
1856         interrupts = <0 165 0>; /* Remove ISP_GIC to use FIMC IS i2c channel in host */
1857         companion_spi_channel = <0>;
1858         use_vision = <1>;
1859         use_sensor_dynamic_voltage_mode = <1>;
1860         use_ois;
1861         use_ois_hsi2c;
1862         use_module_check;
1863
1864         fimc_is_dvfs {
1865                 default_int = <400000>; /* L0 */
1866                 default_cam = <777000>; /* L0 */
1867                 default_mif = <825000>; /* L0 */
1868                 default_i2c = <0>;
1869
1870                 front_preview_int = <267000>; /* L2 */
1871                 front_preview_cam = <111000>; /* L9 */
1872                 front_preview_mif = <543000>; /* L2 */
1873                 front_preview_i2c = <0>;
1874
1875                 front_capture_int = <267000>; /* L2 */
1876                 front_capture_cam = <111000>; /* L9 */
1877                 front_capture_mif = <543000>; /* L2 */
1878                 front_capture_i2c = <0>;
1879
1880                 front_camcording_int = <267000>; /* L2 */
1881                 front_camcording_cam = <111000>; /* L9 */
1882                 front_camcording_mif = <543000>; /* L2 */
1883                 front_camcording_i2c = <0>;
1884
1885                 front_vt1_int = <200000>; /* L3 */
1886                 front_vt1_cam = <111000>; /* L9 */
1887                 front_vt1_mif = <543000>; /* L2 */
1888                 front_vt1_i2c = <0>;
1889
1890                 front_vt2_int = <200000>; /* L3 */
1891                 front_vt2_cam = <111000>; /* L9 */
1892                 front_vt2_mif = <543000>; /* L2 */
1893                 front_vt2_i2c = <0>;
1894
1895                 rear_preview_fhd_bns_off_int = <267000>; /* L2 */
1896                 rear_preview_fhd_bns_off_cam = <200000>; /* L8 */
1897                 rear_preview_fhd_bns_off_mif = <543000>; /* L2 */
1898                 rear_preview_fhd_bns_off_i2c = <0>;
1899
1900                 rear_preview_fhd_int = <267000>; /* L2 */
1901                 rear_preview_fhd_cam = <333000>; /* L6 */
1902                 rear_preview_fhd_mif = <543000>; /* L2 */
1903                 rear_preview_fhd_i2c = <0>;
1904
1905                 rear_preview_whd_int = <334000>; /* L1 */
1906                 rear_preview_whd_cam = <600000>; /* L2 */
1907                 rear_preview_whd_mif = <667000>; /* L1 */
1908                 rear_preview_whd_i2c = <0>;
1909
1910                 rear_preview_uhd_int = <400000>; /* L0 */
1911                 rear_preview_uhd_cam = <666000>; /* L1 */
1912                 rear_preview_uhd_mif = <825000>; /* L0 */
1913                 rear_preview_uhd_i2c = <0>;
1914
1915                 rear_capture_int = <400000>; /* L0 */
1916                 rear_capture_cam = <777000>; /* L0 */
1917                 rear_capture_mif = <667000>; /* L1 */
1918                 rear_capture_i2c = <0>;
1919
1920                 rear_camcording_fhd_bns_off_int = <267000>; /* L2 */
1921                 rear_camcording_fhd_bns_off_cam = <580000>; /* L3 */
1922                 rear_camcording_fhd_bns_off_mif = <543000>; /* L2 */
1923                 rear_camcording_fhd_bns_off_i2c = <0>;
1924
1925                 rear_camcording_fhd_int = <267000>; /* L2 */
1926                 rear_camcording_fhd_cam = <555000>; /* L4 */
1927                 rear_camcording_fhd_mif = <543000>; /* L2 */
1928                 rear_camcording_fhd_i2c = <0>;
1929
1930                 rear_camcording_whd_int = <334000>; /* L1 */
1931                 rear_camcording_whd_cam = <600000>; /* L2 */
1932                 rear_camcording_whd_mif = <667000>; /* L1 */
1933                 rear_camcording_whd_i2c = <0>;
1934
1935                 rear_camcording_uhd_int = <400000>; /* L0 */
1936                 rear_camcording_uhd_cam = <666000>; /* L1 */
1937                 rear_camcording_uhd_mif = <825000>; /* L0 */
1938                 rear_camcording_uhd_i2c = <0>;
1939
1940                 dual_preview_int = <334000>; /* L1 */
1941                 dual_preview_cam = <444000>; /* L5 */
1942                 dual_preview_mif = <825000>; /* L0 */
1943                 dual_preview_i2c = <0>;
1944
1945                 dual_capture_int = <400000>; /* L0 */
1946                 dual_capture_cam = <777000>; /* L4 */
1947                 dual_capture_mif = <825000>; /* L0 */
1948                 dual_capture_i2c = <0>;
1949
1950                 dual_camcording_int = <334000>; /* L1 */
1951                 dual_camcording_cam = <444000>; /* L5 */
1952                 dual_camcording_mif = <825000>; /* L0 */
1953                 dual_camcording_i2c = <0>;
1954
1955                 high_speed_fps_int = <400000>; /* L0 */
1956                 high_speed_fps_cam = <222000>; /* L7 */
1957                 high_speed_fps_mif = <825000>; /* L0 */
1958                 high_speed_fps_i2c = <0>;
1959
1960                 dis_enable_int = <400000>; /* L0 */
1961                 dis_enable_cam = <777000>; /* L0 */
1962                 dis_enable_mif = <825000>; /* L0 */
1963                 dis_enable_i2c = <0>;
1964
1965                 max_int = <400000>; /* L0 */
1966                 max_cam = <777000>; /* L0 */
1967                 max_mif = <825000>; /* L0 */
1968                 max_i2c = <0>;
1969         };
1970 };