arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts

   1 /*
   2  * arch/arm64/boot/dts/amlogic/meson64_odroidc4.dts
   3  *
   4  * Copyright (C) 2019 Hardkernel Co., Ltd. All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  */
  17
  18 /dts-v1/;
  19
  20 #include "mesonsm1.dtsi"
  21 #include "mesong12_odroid_common.dtsi"
  22 #include "mesong12a_drm.dtsi"
  23
  24 / {
  25         model = "Hardkernel ODROID-C4";
  26         compatible = "amlogic, g12a";
  27         interrupt-parent = <&gic>;
  28         #address-cells = <2>;
  29         #size-cells = <2>;
  30
  31         chosen { };
  32
  33         gpiomem {
  34                 compatible = "amlogic, gpiomem";
  35                 reg = <0x0 0xff634000 0x0 0x1000>;      /* GPIO banks */
  36                 dev_name = "gpiomem";
  37                 status = "okay";
  38         };
  39
  40         gpiomem_ao {
  41                 compatible = "amlogic, gpiomem";
  42                 reg = <0x0 0xff800000 0x0 0x1000>;      /* GPIO_AO bank */
  43                 dev_name = "gpiomem-ao";
  44                 status = "okay";
  45         };
  46
  47         reserved-memory {
  48                 #address-cells = <2>;
  49                 #size-cells = <2>;
  50                 ranges;
  51                 /* global autoconfigured region for contiguous allocations */
  52                 ramoops@0x07400000 {
  53                         compatible = "ramoops";
  54                         reg = <0x0 0x07400000 0x0 0x00100000>;
  55                         record-size = <0x8000>;
  56                         console-size = <0x8000>;
  57                         ftrace-size = <0x20000>;
  58                 };
  59
  60                 secmon_reserved:linux,secmon {
  61                         compatible = "shared-dma-pool";
  62                         reusable;
  63                         size = <0x0 0x400000>;
  64                         alignment = <0x0 0x400000>;
  65                         alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
  66                         clear-map;
  67                 };
  68
  69                 secos_reserved:linux,secos {
  70                         status = "disable";
  71                         compatible = "amlogic, aml_secos_memory";
  72                         reg = <0x0 0x05300000 0x0 0x2000000>;
  73                         no-map;
  74                 };
  75
  76                 /*  POST PROCESS MANAGER */
  77                 ppmgr_reserved:linux,ppmgr {
  78                         status = "disable";
  79                         compatible = "shared-dma-pool";
  80                         size = <0x0 0x0>;
  81                 };
  82
  83                 logo_reserved:linux,meson-fb {
  84                         compatible = "shared-dma-pool";
  85                         reusable;
  86                         size = <0x0 0x800000>;
  87                         alignment = <0x0 0x400000>;
  88                         alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
  89                 };
  90                 ion_cma_reserved:linux,ion-dev {
  91                         compatible = "shared-dma-pool";
  92                         reusable;
  93                         size = <0x0 0x10000000>;
  94                         alignment = <0x0 0x400000>;
  95                 };
  96
  97                 //di_reserved:linux,di {
  98                         //compatible = "amlogic, di-mem";
  99                         /* buffer_size = 3621952(yuv422 8bit) */
 100                         /* 4179008(yuv422 10bit full pack mode) */
 101                         /** 10x3621952=34.6M(0x23) support 8bit **/
 102                         /** 10x4736064=45.2M(0x2e) support 12bit **/
 103                         /** 10x4179008=40M(0x28) support 10bit **/
 104                         //size = <0x0 0x2800000>;
 105                         //no-map;
 106                 //};
 107                 /*di CMA pool */
 108                 di_cma_reserved:linux,di_cma {
 109                         compatible = "shared-dma-pool";
 110                         reusable;
 111                         /* buffer_size = 3621952(yuv422 8bit)
 112                          *  | 4736064(yuv422 10bit)
 113                          *  | 4074560(yuv422 10bit full pack mode)
 114                          * 10x3621952=34.6M(0x23) support 8bit
 115                          * 10x4736064=45.2M(0x2e) support 12bit
 116                          * 10x4074560=40M(0x28) support 10bit
 117                          */
 118                         size = <0x0 0x02800000>;
 119                         alignment = <0x0 0x400000>;
 120                 };
 121                 codec_mm_cma:linux,codec_mm_cma {
 122                         compatible = "shared-dma-pool";
 123                         reusable;
 124                         /* ion_codec_mm max can alloc size 80M*/
 125                         size = <0x0 0x13400000>;
 126                         alignment = <0x0 0x400000>;
 127                         linux,contiguous-region;
 128                         clear-map;
 129                 };
 130                 /* codec shared reserved */
 131                 codec_mm_reserved:linux,codec_mm_reserved {
 132                         status = "disable";
 133                         compatible = "amlogic, codec-mm-reserved";
 134                         size = <0x0 0x0>;
 135                         alignment = <0x0 0x100000>;
 136                         //no-map;
 137                 };
 138                 /*  vdin0 CMA pool */
 139                 vdin0_cma_reserved:linux,vdin0_cma {
 140                         status = "disable";
 141                         compatible = "shared-dma-pool";
 142                         reusable;
 143                         /* 1920x1080x2x4  =16+4 M */
 144                         size = <0x0 0x04000000>;
 145                         alignment = <0x0 0x400000>;
 146                 };
 147                 /*  vdin1 CMA pool */
 148                 vdin1_cma_reserved:linux,vdin1_cma {
 149                         status = "disable";
 150                         compatible = "shared-dma-pool";
 151                         reusable;
 152                         /* 1920x1080x2x4  =16 M */
 153                         size = <0x0 0x04000000>;
 154                         alignment = <0x0 0x400000>;
 155                 };
 156         };
 157
 158         cvbsout {
 159                 compatible = "amlogic, cvbsout-sm1";
 160                 dev_name = "cvbsout";
 161                 status = "okay";
 162                 clocks = <&clkc CLKID_VCLK2_ENCI
 163                         &clkc CLKID_VCLK2_VENCI0
 164                         &clkc CLKID_VCLK2_VENCI1
 165                         &clkc CLKID_DAC_CLK>;
 166                 clock-names = "venci_top_gate",
 167                         "venci_0_gate",
 168                         "venci_1_gate",
 169                         "vdac_clk_gate";
 170                 /* clk path */
 171                 /* 0:vid_pll vid2_clk */
 172                 /* 1:gp0_pll vid2_clk */
 173                 /* 2:vid_pll vid1_clk */
 174                 /* 3:gp0_pll vid1_clk */
 175                 clk_path = <0>;
 176
 177                 /* performance: reg_address, reg_value */
 178                 /* sm1 */
 179                 performance = <0x1bf0  0x9
 180                         0x1b56  0x333
 181                         0x1b12  0x8080
 182                         0x1b05  0xfd
 183                         0x1c59  0xf850
 184                         0xffff  0x0>; /* ending flag */
 185                 performance_sarft = <0x1bf0  0x9
 186                         0x1b56  0x333
 187                         0x1b12  0x0
 188                         0x1b05  0x9
 189                         0x1c59  0xfc48
 190                         0xffff  0x0>; /* ending flag */
 191                 performance_revB_telecom = <0x1bf0  0x9
 192                         0x1b56  0x546
 193                         0x1b12  0x8080
 194                         0x1b05  0x9
 195                         0x1c59  0xf850
 196                         0xffff  0x0>; /* ending flag */
 197         };
 198
 199         deinterlace {
 200                 compatible = "amlogic, deinterlace";
 201                 status = "okay";
 202                 /* 0:use reserved; 1:use cma; 2:use cma as reserved */
 203                 flag_cma = <1>;
 204                 //memory-region = <&di_reserved>;
 205                 memory-region = <&di_cma_reserved>;
 206                 interrupts = <0 46 1
 207                                 0 40 1>;
 208                 interrupt-names = "pre_irq", "post_irq";
 209                 clocks = <&clkc CLKID_VPU_CLKB_TMP_COMP>,
 210                         <&clkc CLKID_VPU_CLKB_COMP>;
 211                 clock-names = "vpu_clkb_tmp_composite",
 212                         "vpu_clkb_composite";
 213                 clock-range = <334 667>;
 214                 /* buffer-size = <3621952>;(yuv422 8bit) */
 215                 buffer-size = <4074560>;/*yuv422 fullpack*/
 216                 /* reserve-iomap = "true"; */
 217                 /* if enable nr10bit, set nr10bit-support to 1 */
 218                 post-wr-support = <1>;
 219                 nr10bit-support = <1>;
 220                 nrds-enable = <1>;
 221                 pps-enable = <1>;
 222         };
 223
 224         unifykey{
 225                 compatible = "amlogic, unifykey";
 226                 status = "ok";
 227                 unifykey-num = <14>;
 228                 unifykey-index-0 = <&keysn_0>;
 229                 unifykey-index-1 = <&keysn_1>;
 230                 unifykey-index-2 = <&keysn_2>;
 231                 unifykey-index-3 = <&keysn_3>;
 232                 unifykey-index-4 = <&keysn_4>;
 233                 unifykey-index-5 = <&keysn_5>;
 234                 unifykey-index-6 = <&keysn_6>;
 235                 unifykey-index-7 = <&keysn_7>;
 236                 unifykey-index-8 = <&keysn_8>;
 237                 unifykey-index-9 = <&keysn_9>;
 238                 unifykey-index-10= <&keysn_10>;
 239                 unifykey-index-11= <&keysn_11>;
 240                 unifykey-index-12= <&keysn_12>;
 241                 unifykey-index-13= <&keysn_13>;
 242                 unifykey-index-14= <&keysn_14>;
 243                 unifykey-index-15= <&keysn_15>;
 244                 unifykey-index-16= <&keysn_16>;
 245
 246                 keysn_0: key_0{
 247                         key-name = "usid";
 248                         key-device = "normal";
 249                         key-permit = "read","write","del";
 250                 };
 251                 keysn_1:key_1{
 252                         key-name = "mac";
 253                         key-device = "normal";
 254                         key-permit = "read","write","del";
 255                 };
 256                 keysn_2:key_2{
 257                         key-name = "hdcp";
 258                         key-device = "secure";
 259                         key-type = "sha1";
 260                         key-permit = "read","write","del";
 261                 };
 262                 keysn_3:key_3{
 263                         key-name = "secure_boot_set";
 264                         key-device = "efuse";
 265                         key-permit = "write";
 266                 };
 267                 keysn_4:key_4{
 268                         key-name = "mac_bt";
 269                         key-device = "normal";
 270                         key-permit = "read","write","del";
 271                         key-type  = "mac";
 272                 };
 273                 keysn_5:key_5{
 274                         key-name = "mac_wifi";
 275                         key-device = "normal";
 276                         key-permit = "read","write","del";
 277                         key-type = "mac";
 278                 };
 279                 keysn_6:key_6{
 280                         key-name = "hdcp2_tx";
 281                         key-device = "normal";
 282                         key-permit = "read","write","del";
 283                 };
 284                 keysn_7:key_7{
 285                         key-name = "hdcp2_rx";
 286                         key-device = "normal";
 287                         key-permit = "read","write","del";
 288                 };
 289                 keysn_8:key_8{
 290                         key-name = "widevinekeybox";
 291                         key-device = "secure";
 292                         key-permit = "read","write","del";
 293                 };
 294                 keysn_9:key_9{
 295                         key-name = "deviceid";
 296                         key-device = "normal";
 297                         key-permit = "read","write","del";
 298                 };
 299                 keysn_10:key_10{
 300                         key-name = "hdcp22_fw_private";
 301                         key-device = "secure";
 302                         key-permit = "read","write","del";
 303                 };
 304                 keysn_11:key_11{
 305                         key-name = "PlayReadykeybox25";
 306                         key-device = "secure";
 307                         key-permit = "read","write","del";
 308                 };
 309                 keysn_12:key_12{
 310                         key-name = "prpubkeybox";// PlayReady
 311                         key-device = "secure";
 312                         key-permit = "read","write","del";
 313                 };
 314                 keysn_13:key_13{
 315                         key-name = "prprivkeybox";// PlayReady
 316                         key-device = "secure";
 317                         key-permit = "read","write","del";
 318                 };
 319                 keysn_14:key_14{
 320                         key-name = "attestationkeybox";// attestation key
 321                         key-device = "secure";
 322                         key-permit = "read","write","del";
 323                 };
 324                 keysn_15:key_15{
 325                         key-name = "region_code";
 326                         key-device = "normal";
 327                         key-permit = "read","write","del";
 328                 };
 329                 keysn_16:key_16{
 330                         key-name = "netflix_mgkid";
 331                         key-device = "secure";
 332                         key-permit = "read","write","del";
 333                 };
 334         };//End unifykey
 335
 336         amlvecm {
 337                 compatible = "amlogic, vecm";
 338                 dev_name = "aml_vecm";
 339                 status = "okay";
 340                 gamma_en = <0>;/*1:enabel ;0:disable*/
 341                 wb_en = <0>;/*1:enabel ;0:disable*/
 342                 cm_en = <0>;/*1:enabel ;0:disable*/
 343                 /*0: 709/601  1: bt2020*/
 344                 tx_op_color_primary = <0>;
 345         };
 346
 347         amdolby_vision {
 348                 compatible = "amlogic, dolby_vision_sm1";
 349                 dev_name = "aml_amdolby_vision_driver";
 350                 status = "okay";
 351                 tv_mode = <0>;/*1:enabel ;0:disable*/
 352         };
 353
 354         meson-fb {
 355                 compatible = "amlogic, meson-g12a";
 356                 /*memory-region = <&logo_reserved>;*/
 357                 dev_name = "meson-fb";
 358                 status = "disabled";
 359                 interrupts = <0 3 1
 360                         0 56 1
 361                         0 89 1>;
 362                 interrupt-names = "viu-vsync", "viu2-vsync", "rdma";
 363                 mem_size = <0x00800000 0x4b80000 0x100000 0x100000 0x800000>;
 364                 /* uboot logo,fb0/fb1 memory size,if afbcd fb0=0x01851000*/
 365                 display_mode_default = "1080p60hz";
 366                 scale_mode = <1>;
 367                 /** 0:VPU free scale 1:OSD free scale 2:OSD super scale */
 368                 display_size_default = <1920 1080 1920 2160 32>;
 369                 /*1920*1080*4*3 = 0x17BB000*/
 370                 pxp_mode = <0>; /** 0:normal mode 1:pxp mode */
 371                 mem_alloc = <1>;
 372                 4k2k_fb = <1>;
 373                 logo_addr = "0x3f800000";
 374                 clocks = <&clkc CLKID_VPU_CLKC_MUX>;
 375                 clock-names = "vpu_clkc";
 376         };
 377
 378         p_tsensor: p_tsensor@ff634594 {
 379                 compatible = "amlogic, r1p1-tsensor";
 380                 device_name = "meson-pthermal";
 381                 status = "okay";
 382                 reg = <0x0 0xff634800 0x0 0x50>,
 383                         <0x0 0xff800268 0x0 0x4>;
 384                 cal_type = <0x1>;
 385                 cal_a = <324>;
 386                 cal_b = <424>;
 387                 cal_c = <3159>;
 388                 cal_d = <9411>;
 389                 rtemp = <115000>;
 390                 interrupts = <0 35 0>;
 391                 clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
 392                 clock-names = "ts_comp";
 393                 #thermal-sensor-cells = <1>;
 394         };
 395
 396         d_tsensor: d_tsensor@ff800228 {
 397                 compatible = "amlogic, r1p1-tsensor";
 398                 device_name = "meson-dthermal";
 399                 status = "okay";
 400                 reg = <0x0 0xff634c00 0x0 0x50>,
 401                         <0x0 0xff800230 0x0 0x4>;
 402                 cal_type = <0x1>;
 403                 cal_a = <324>;
 404                 cal_b = <424>;
 405                 cal_c = <3159>;
 406                 cal_d = <9411>;
 407                 rtemp = <115000>;
 408                 interrupts = <0 36 0>;
 409                 clocks = <&clkc CLKID_TS_COMP>; /* CLKID_TS_COMP>;*/
 410                 clock-names = "ts_comp";
 411                 #thermal-sensor-cells = <1>;
 412         };
 413
 414         meson_cooldev: meson-cooldev@0 {
 415                         status = "okay";
 416                         compatible = "amlogic, meson-cooldev";
 417                         device_name = "mcooldev";
 418                         cooling_devices {
 419                                 cpufreq_cool_cluster0 {
 420                                         min_state = <1000000>;
 421                                         dyn_coeff = <125>;
 422                                         cluster_id = <0>;
 423                                         node_name = "cpufreq_cool0";
 424                                         device_type = "cpufreq";
 425                                 };
 426                                 cpucore_cool_cluster0 {
 427                                         min_state = <1>;
 428                                         dyn_coeff = <0>;
 429                                         cluster_id = <0>;
 430                                         node_name = "cpucore_cool0";
 431                                         device_type = "cpucore";
 432                                 };
 433                                 gpufreq_cool {
 434                                         min_state = <400>;
 435                                         dyn_coeff = <215>;
 436                                         gpu_pp = <2>;
 437                                         cluster_id = <0>;
 438                                         node_name = "gpufreq_cool0";
 439                                         device_type = "gpufreq";
 440                                 };
 441                                 gpucore_cool {
 442                                         min_state = <1>;
 443                                         dyn_coeff = <0>;
 444                                         cluster_id = <0>;
 445                                         node_name = "gpucore_cool0";
 446                                         device_type = "gpucore";
 447                                 };
 448                         };
 449                         cpufreq_cool0:cpufreq_cool0 {
 450                                 #cooling-cells = <2>; /* min followed by max */
 451                         };
 452                         cpucore_cool0:cpucore_cool0 {
 453                                 #cooling-cells = <2>; /* min followed by max */
 454                         };
 455                         gpufreq_cool0:gpufreq_cool0 {
 456                                 #cooling-cells = <2>; /* min followed by max */
 457                         };
 458                         gpucore_cool0:gpucore_cool0 {
 459                                 #cooling-cells = <2>; /* min followed by max */
 460                         };
 461                 };
 462                 /*meson cooling devices end*/
 463
 464         thermal-zones {
 465                 soc_thermal: soc_thermal {
 466                         polling-delay = <1000>;
 467                         polling-delay-passive = <100>;
 468                         sustainable-power = <1410>;
 469                         thermal-sensors = <&p_tsensor 0>;
 470                         trips {
 471                                 pswitch_on: trip-point@0 {
 472                                         temperature = <60000>;
 473                                         hysteresis = <5000>;
 474                                         type = "passive";
 475                                 };
 476                                 pcontrol: trip-point@1 {
 477                                         temperature = <75000>;
 478                                         hysteresis = <5000>;
 479                                         type = "passive";
 480                                 };
 481                                 phot: trip-point@2 {
 482                                         temperature = <85000>;
 483                                         hysteresis = <5000>;
 484                                         type = "hot";
 485                                 };
 486                                 pcritical: trip-point@3 {
 487                                         temperature = <110000>;
 488                                         hysteresis = <1000>;
 489                                         type = "critical";
 490                                 };
 491                         };
 492
 493                         cooling-maps {
 494                                 cpufreq_cooling_map {
 495                                         trip = <&pcontrol>;
 496                                         cooling-device = <&cpufreq_cool0 0 4>;
 497                                         contribution = <1024>;
 498                                 };
 499                                 cpucore_cooling_map {
 500                                         trip = <&pcontrol>;
 501                                         cooling-device = <&cpucore_cool0 0 3>;
 502                                         contribution = <1024>;
 503                                 };
 504                                 gpufreq_cooling_map {
 505                                         trip = <&pcontrol>;
 506                                         cooling-device = <&gpufreq_cool0 0 4>;
 507                                         contribution = <1024>;
 508                                 };
 509                                 gpucore_cooling_map {
 510                                         trip = <&pcontrol>;
 511                                         cooling-device = <&gpucore_cool0 0 2>;
 512                                         contribution = <1024>;
 513                                 };
 514                         };
 515                 };
 516                 ddr_thermal: ddr_thermal {
 517                         polling-delay = <2000>;
 518                         polling-delay-passive = <1000>;
 519                         sustainable-power = <1410>;
 520                         thermal-sensors = <&d_tsensor 1>;
 521                         trips {
 522                                 dswitch_on: trip-point@0 {
 523                                         temperature = <60000>;
 524                                         hysteresis = <5000>;
 525                                         type = "passive";
 526                                 };
 527                                 dcontrol: trip-point@1 {
 528                                         temperature = <75000>;
 529                                         hysteresis = <5000>;
 530                                         type = "passive";
 531                                 };
 532                                 dhot: trip-point@2 {
 533                                         temperature = <85000>;
 534                                         hysteresis = <5000>;
 535                                         type = "hot";
 536                                 };
 537                                 dcritical: trip-point@3 {
 538                                         temperature = <110000>;
 539                                         hysteresis = <1000>;
 540                                         type = "critical";
 541                                 };
 542                         };
 543
 544                 };
 545         };
 546         /*thermal zone end*/
 547
 548         cpu_opp_table0: cpu_opp_table0 {
 549                 compatible = "operating-points-v2";
 550                 opp-shared;
 551
 552                 opp00 {
 553                         opp-hz = /bits/ 64 <100000000>;
 554                         opp-microvolt = <760000>;
 555                 };
 556                 opp01 {
 557                         opp-hz = /bits/ 64 <250000000>;
 558                         opp-microvolt = <760000>;
 559                 };
 560                 opp02 {
 561                         opp-hz = /bits/ 64 <500000000>;
 562                         opp-microvolt = <760000>;
 563                 };
 564                 opp03 {
 565                         opp-hz = /bits/ 64 <667000000>;
 566                         opp-microvolt = <780000>;
 567                 };
 568                 opp04 {
 569                         opp-hz = /bits/ 64 <1000000000>;
 570                         opp-microvolt = <800000>;
 571                 };
 572                 opp05 {
 573                         opp-hz = /bits/ 64 <1200000000>;
 574                         opp-microvolt = <810000>;
 575                 };
 576                 opp06 {
 577                         opp-hz = /bits/ 64 <1404000000>;
 578                         opp-microvolt = <820000>;
 579                 };
 580                 opp07 {
 581                         opp-hz = /bits/ 64 <1500000000>;
 582                         opp-microvolt = <830000>;
 583                 };
 584                 opp08 {
 585                         opp-hz = /bits/ 64 <1608000000>;
 586                         opp-microvolt = <860000>;
 587                 };
 588                 opp09 {
 589                         opp-hz = /bits/ 64 <1704000000>;
 590                         opp-microvolt = <900000>;
 591                 };
 592                 opp10 {
 593                         opp-hz = /bits/ 64 <1800000000>;
 594                         opp-microvolt = <940000>;
 595                 };
 596                 opp11 {
 597                         opp-hz = /bits/ 64 <1908000000>;
 598                         opp-microvolt = <1000000>;
 599                 };
 600                 opp12 {
 601                         opp-hz = /bits/ 64 <2016000000>;
 602                         opp-microvolt = <1010000>;
 603                 };
 604                 opp13 {
 605                         opp-hz = /bits/ 64 <2100000000>;
 606                         opp-microvolt = <1030000>;
 607                 };
 608         };
 609
 610         cpufreq-meson {
 611                 compatible = "amlogic, cpufreq-meson";
 612                 pinctrl-names = "default";
 613                 pinctrl-0 = <&pwm_ao_d_pins3>;
 614                 status = "okay";
 615         };
 616
 617         remote {
 618                 status = "disabled";
 619         };
 620
 621         meson-ir {
 622                 compatible = "amlogic,meson6-ir";
 623                 /* Multi-format IR controller */
 624                 reg = <0x0 0xff808040 0x0 0x44>;
 625                 interrupts = <0 196 1>;
 626                 pinctrl-names = "default";
 627                 pinctrl-0 = <&remote_pins>;
 628                 pulse-inverted;
 629                 status = "ok";
 630         };
 631
 632         /* Audio Related start */
 633         dummy_codec:dummy{
 634                 #sound-dai-cells = <0>;
 635                 compatible = "amlogic, aml_dummy_codec";
 636                 status = "okay";
 637         };
 638         spdif_dit:spdif{
 639                 #sound-dai-cells = <0>;
 640                 compatible = "linux,spdif-dit";
 641                 status = "okay";
 642         };
 643         pcm5102a: pcm5102a {
 644                 compatible = "ti,pcm5102a";
 645                 #sound-dai-cells = <0>;
 646                 status = "disabled";
 647         };
 648         amlogic_codec:t9015{
 649                 #sound-dai-cells = <0>;
 650                 compatible = "amlogic, aml_codec_T9015";
 651                 reg = <0x0 0xFF632000 0x0 0x2000>;
 652                 is_auge_used = <1>; /* meson or auge chipset used */
 653                 tocodec_inout = <1>;
 654                 tdmout_index = <2>;
 655                 ch0_sel = <0>;
 656                 ch1_sel = <1>;
 657                 status = "disabled";
 658         };
 659         audio_effect:eqdrc{
 660                 /*eq_enable = <1>;*/
 661                 /*drc_enable = <1>;*/
 662                 /*
 663                  * 0:tdmout_a
 664                  * 1:tdmout_b
 665                  * 2:tdmout_c
 666                  * 3:spdifout
 667                  * 4:spdifout_b
 668                  */
 669                 eqdrc_module = <1>;
 670                 /* max 0xf, each bit for one lane, usually one lane */
 671                 lane_mask = <0x1>;
 672                 /* max 0xff, each bit for one channel */
 673                 channel_mask = <0x3>;
 674         };
 675         odroid_hdmi {
 676                 compatible = "amlogic, g12a-sound-card";
 677                 aml-audio-card,name = "ODROID-HDMI";
 678
 679                 /* ODROID-C4: spdif_out GPIOAO_10(J7.2), HDMI out*/
 680                 aml-audio-card,dai-link@0 {
 681                         mclk-fs = <128>;
 682                         continuous-clock;
 683                         cpu {
 684                                 sound-dai = <&spdifa>;
 685                                 system-clock-frequency = <6144000>;
 686                         };
 687                         codec {
 688                                 sound-dai = <&spdif_dit>;
 689                         };
 690                 };
 691         };
 692         odroid_lineout: odroid_lineout {
 693                 compatible = "amlogic, g12a-sound-card";
 694                 aml-audio-card,name = "ODROID-LINEOUT";
 695                 status = "disabled";
 696         };
 697         odroid_hifi: odroid_hifi {
 698                 compatible = "amlogic, g12a-sound-card";
 699                 aml-audio-card,name = "ODROID-HIFI";
 700                 status = "disabled";
 701         };
 702         odroid_hifi2: odroid_hifi2 {
 703                 compatible = "amlogic, g12a-sound-card";
 704                 aml-audio-card,name = "ODROID-HIFI2";
 705                 status = "disabled";
 706         };
 707
 708         audiolocker: locker {
 709                 compatible = "amlogic, audiolocker";
 710                 clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT
 711                                 &clkaudio CLKID_AUDIO_LOCKER_IN
 712                                 &clkaudio CLKID_AUDIO_MCLK_D
 713                                 &clkaudio CLKID_AUDIO_MCLK_E
 714                                 &clkc CLKID_MPLL1
 715                                 &clkc CLKID_MPLL2>;
 716                 clock-names = "lock_out", "lock_in", "out_src",
 717                                         "in_src", "out_calc", "in_ref";
 718                 interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>;
 719                 interrupt-names = "irq";
 720                 frequency = <49000000>; /* pll */
 721                 dividor = <49>; /* locker's parent */
 722                 status = "okay";
 723         };
 724         /* Audio Related end */
 725
 726         gpio_keypad{
 727                 compatible = "amlogic, gpio_keypad";
 728                 status = "okay";
 729                 scan_period = <20>;
 730                 key_num = <1>;
 731                 key_name = "power";
 732                 key_code = <116>;
 733                 reg = <0x0 0xFF800000 0x0 0x400>;
 734         };
 735
 736         hk-lirc-helper {
 737                 compatible = "hk-lirc-helper";
 738                 /* Multi-format IR controller */
 739                 reg = <0x0 0xff808040 0x0 0x44>;
 740                 status = "ok";
 741         };
 742
 743         gpio-reset {
 744                 /delete-node/ usb_hub_en;
 745         };
 746 }; /* end of / */
 747
 748 &audiobus {
 749         tdmb: tdm@1 {
 750                 compatible = "amlogic, sm1-snd-tdmb";
 751                 #sound-dai-cells = <0>;
 752                 dai-tdm-lane-slot-mask-in = <0 1 0 0>;
 753                 dai-tdm-lane-slot-mask-out = <1 0 0 0>;
 754                 dai-tdm-clk-sel = <1>;
 755                 clocks = <&clkaudio CLKID_AUDIO_MCLK_B
 756                                 &clkaudio CLKID_AUDIO_MCLK_PAD0
 757                                 &clkc CLKID_MPLL0>;
 758                 clock-names = "mclk", "mclk_pad", "clk_srcpll";
 759                 pinctrl-names = "tdm_pins";
 760                 pinctrl-0 = <&tdmb_mclk_ao &tdmout_b_ao>;
 761                 i2s2hdmi = <0>;
 762                 /*enable default mclk(12.288M), before extern codec start*/
 763                 start_clk_enable = <1>;
 764                 /*tdm clk tuning enable*/
 765                 clk_tuning_enable = <1>;
 766                 status = "disabled";
 767         };
 768
 769         tdmc: tdm@2 {
 770                 compatible = "amlogic, sm1-snd-tdmc";
 771                 #sound-dai-cells = <0>;
 772                 dai-tdm-lane-slot-mask-in = <0 1 0 0>;
 773                 dai-tdm-lane-slot-mask-out = <1 0 0 0>;
 774                 dai-tdm-clk-sel = <2>;
 775                 clocks = <&clkaudio CLKID_AUDIO_MCLK_C
 776                                 &clkc CLKID_MPLL2>;
 777                 clock-names = "mclk", "clk_srcpll";
 778                 i2s2hdmi = <0>;
 779                 status = "disabled";
 780         };
 781
 782         spdifa: spdif@0 {
 783                 compatible = "amlogic, sm1-snd-spdif-a";
 784                 #sound-dai-cells = <0>;
 785                 clocks = <&clkc CLKID_MPLL0
 786                                 &clkc CLKID_FCLK_DIV4
 787                                 &clkaudio CLKID_AUDIO_GATE_SPDIFIN
 788                                 &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
 789                                 &clkaudio CLKID_AUDIO_SPDIFIN
 790                                 &clkaudio CLKID_AUDIO_SPDIFOUT_A>;
 791                 clock-names = "sysclk", "fixed_clk", "gate_spdifin",
 792                                 "gate_spdifout", "clk_spdifin", "clk_spdifout";
 793                 interrupts =
 794                                 <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
 795
 796                 interrupt-names = "irq_spdifin";
 797                 pinctrl-names = "spdif_pins";
 798                 pinctrl-0 = <&spdifout>;
 799
 800                 status = "okay";
 801         };
 802 }; /* end of audiobus */
 803
 804 &gpio {
 805         gpio-line-names =
 806                 /* GPIOV */
 807                 "",
 808                 /* GPIOZ */
 809                 "", "", "", "", "", "", "", "",
 810                 "", "", "", "", "", "", "", "",
 811                 /* GPIOH */
 812                 "", "", "", "", "",
 813                 "PIN_36", /* GPIOH_5 */
 814                 "PIN_26", /* GPIOH_6 */
 815                 "PIN_32", /* GPIOH_7 */
 816                 "",
 817                 /* BOOT */
 818                 "", "", "", "", "", "", "", "",
 819                 "", "", "", "", "", "", "", "",
 820                 /* GPIOC */
 821                 "", "", "", "", "", "", "", "",
 822                 /* GPIOA */
 823                 "", "", "", "", "", "", "", "",
 824                 "", "", "", "", "", "",
 825                 "PIN_27", /* GPIOA_14 */
 826                 "PIN_28", /* GPIOA_15 */
 827                 /* GPIOX */
 828                 "PIN_16", /* GPIOX_0 */
 829                 "PIN_18", /* GPIOX_1 */
 830                 "PIN_22", /* GPIOX_2 */
 831                 "PIN_11", /* GPIOX_3 */
 832                 "PIN_13", /* GPIOX_4 */
 833                 "PIN_7",  /* GPIOX_5 */
 834                 "PIN_33", /* GPIOX_6 */
 835                 "PIN_15", /* GPIOX_7 */
 836                 "PIN_19", /* GPIOX_8 */
 837                 "PIN_21", /* GPIOX_9 */
 838                 "PIN_24", /* GPIOX_10 */
 839                 "PIN_23", /* GPIOX_11 */
 840                 "PIN_8",  /* GPIOX_12 */
 841                 "PIN_10", /* GPIOX_13 */
 842                 "PIN_29", /* GPIOX_14 */
 843                 "PIN_31", /* GPIOX_15 */
 844                 "PIN_12", /* GPIOX_16 */
 845                 "PIN_3",  /* GPIOX_17 */
 846                 "PIN_5",  /* GPIOX_18 */
 847                 "PIN_35"; /* GPIOX_19 */
 848 };
 849
 850 &gpio_ao {
 851         gpio-line-names =
 852                 /* GPIOAO */
 853                 "", "", "", "",
 854                 "PIN_47", /* GPIOAO_4 */
 855                 "", "",
 856                 "PIN_45", /* GPIOAO_7 */
 857                 "PIN_46", /* GPIOAO_8 */
 858                 "PIN_44", /* GPIOAO_9 */
 859                 "PIN_42", /* GPIOAO_10 */
 860                 "",
 861                 /* GPIOE */
 862                 "", "", "",
 863                 /* GPIO_TEST_N */
 864                 "";
 865 };
 866
 867 &uart_A {
 868         status = "disabled";
 869 };
 870
 871 &usb3_phy_v2 {
 872         status = "okay";
 873         portnum = <1>;
 874         otg = <1>;
 875         gpio-vbus-power = "GPIOAO_2";
 876         gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>;
 877 };
 878
 879 &reboot {
 880         sd_volsw_gpio = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
 881         sd_power_gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
 882         sd_vddio_gpio = <&gpio_ao GPIOE_2 GPIO_ACTIVE_HIGH>;
 883 };
 884
 885 &sd_emmc_b {
 886         status = "okay";
 887         sd-uhs-sdr25;
 888         sd-uhs-sdr50;
 889         sd-uhs-sdr104;
 890         max-frequency = <200000000>;
 891         sd {
 892                 caps = "MMC_CAP_4_BIT_DATA",
 893                         "MMC_CAP_UHS_SDR25",
 894                         "MMC_CAP_UHS_SDR50",
 895                         "MMC_CAP_UHS_SDR104",
 896                         "MMC_CAP_MMC_HIGHSPEED",
 897                         "MMC_CAP_SD_HIGHSPEED",
 898                         "MMC_CAP_ERASE",
 899                         "MMC_CAP_CMD23";
 900                 vol_switch = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>;
 901                 vol_switch_18 = <1>;
 902                 f_min = <400000>;
 903                 f_max = <200000000>;
 904         };
 905 };
 906
 907 &sd_emmc_a {
 908         status = "disabled";
 909         sdio {
 910                 caps = "MMC_CAP_4_BIT_DATA",
 911                          "MMC_CAP_MMC_HIGHSPEED",
 912                          "MMC_CAP_SD_HIGHSPEED",
 913                          "MMC_CAP_NONREMOVABLE",
 914                          "MMC_CAP_UHS_SDR12",
 915                          "MMC_CAP_UHS_SDR25",
 916                          "MMC_CAP_UHS_SDR50",
 917                          "MMC_CAP_UHS_SDR104",
 918                          "MMC_PM_KEEP_POWER",
 919                          "MMC_CAP_SDIO_IRQ";
 920                 f_min = <400000>;
 921                 f_max = <200000000>;
 922         };
 923 };
 924
 925 &pinctrl_periphs {
 926 };
 927
 928 &pinctrl_aobus {
 929         spdifout: spdifout {
 930                 mux {/* GPIOAO_10 */
 931                         groups = "spdif_out_ao";
 932                         function = "spdif_out_ao";
 933                 };
 934         };
 935         tdmb_mclk_ao: mclk0_ao {
 936                 mux { /* GPIOAO_9 */
 937                         groups = "mclk0_ao";
 938                         function = "mclk0_ao";
 939                         drive-strength = <2>;
 940                 };
 941         };
 942         tdmout_b_ao: tdmout_b {
 943                 mux { /* GPIOAO_8, GPIOAO_7, GPIOAO_4 */
 944                         groups = "tdmb_sclk_ao",
 945                                 "tdmb_fs_ao",
 946                                 "tdmb_dout0_ao";
 947                         function = "tdmb_out_ao";
 948                         drive-strength = <2>;
 949                 };
 950         };
 951 }; /* end of pinctrl_aobus */
 952
 953 &spicc0 {
 954         status = "disabled";
 955
 956         /*
 957          40 Pin Header : MOSI(GPIOX.8->19 Pin), MISO(GPIOX.9->21 Pin),
 958                          SPI0_CLK(GPIOX.11->23 Pin)
 959                          SPI_CE0(GPIOX.2->22 Pin), SPI_CE1(GPIOX.10->24 Pin)
 960         */
 961         pinctrl-names = "default","gpio_periphs";
 962         pinctrl-0 = <&spicc0_pins_x>;
 963         pinctrl-1 = <&spicc0_to_gpiox>;
 964         num_chipselect = <2>;
 965
 966         cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_LOW>,
 967                    <&gpio GPIOH_6 GPIO_ACTIVE_LOW>;
 968 };
 969
 970 &i2c2 {
 971         status = "disabled";
 972 };
 973
 974 &i2c3 {
 975         status = "disabled";
 976 };
 977
 978 &drm_vpu {
 979         status = "okay";
 980         logo_addr = "0x3f800000";
 981 };
 982
 983 &drm_amhdmitx {
 984         status = "okay";
 985         hdcp = "disabled";
 986 };
 987
 988 &drm_lcd {
 989         status = "disabled";
 990 };