1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
33 #include <linux/platform_data/s3c-hsotg.h>
37 #include <asm/mach/arch.h>
38 #include <asm/mach/map.h>
39 #include <asm/mach/irq.h>
41 #include <mach/hardware.h>
43 #include <mach/irqs.h>
47 #include <plat/devs.h>
50 #include <plat/ehci.h>
52 #include <plat/fb-s3c2410.h>
53 #include <plat/hwmon.h>
55 #include <plat/keypad.h>
57 #include <plat/nand.h>
58 #include <plat/sdhci.h>
61 #include <plat/usb-control.h>
62 #include <plat/usb-phy.h>
63 #include <plat/regs-iic.h>
64 #include <plat/regs-serial.h>
65 #include <plat/regs-spi.h>
66 #include <plat/s3c64xx-spi.h>
68 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
71 #ifdef CONFIG_CPU_S3C2440
72 static struct resource s3c_ac97_resource[] = {
73 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
74 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
75 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
76 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
77 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
80 struct platform_device s3c_device_ac97 = {
81 .name = "samsung-ac97",
83 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
84 .resource = s3c_ac97_resource,
86 .dma_mask = &samsung_device_dma_mask,
87 .coherent_dma_mask = DMA_BIT_MASK(32),
90 #endif /* CONFIG_CPU_S3C2440 */
94 #ifdef CONFIG_PLAT_S3C24XX
95 static struct resource s3c_adc_resource[] = {
96 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
97 [1] = DEFINE_RES_IRQ(IRQ_TC),
98 [2] = DEFINE_RES_IRQ(IRQ_ADC),
101 struct platform_device s3c_device_adc = {
102 .name = "s3c24xx-adc",
104 .num_resources = ARRAY_SIZE(s3c_adc_resource),
105 .resource = s3c_adc_resource,
107 #endif /* CONFIG_PLAT_S3C24XX */
109 #if defined(CONFIG_SAMSUNG_DEV_ADC)
110 static struct resource s3c_adc_resource[] = {
111 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
112 [1] = DEFINE_RES_IRQ(IRQ_TC),
113 [2] = DEFINE_RES_IRQ(IRQ_ADC),
116 struct platform_device s3c_device_adc = {
117 .name = "samsung-adc",
119 .num_resources = ARRAY_SIZE(s3c_adc_resource),
120 .resource = s3c_adc_resource,
122 #endif /* CONFIG_SAMSUNG_DEV_ADC */
124 /* Camif Controller */
126 #ifdef CONFIG_CPU_S3C2440
127 static struct resource s3c_camif_resource[] = {
128 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
129 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
130 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
133 struct platform_device s3c_device_camif = {
134 .name = "s3c2440-camif",
136 .num_resources = ARRAY_SIZE(s3c_camif_resource),
137 .resource = s3c_camif_resource,
139 .dma_mask = &samsung_device_dma_mask,
140 .coherent_dma_mask = DMA_BIT_MASK(32),
143 #endif /* CONFIG_CPU_S3C2440 */
147 struct platform_device samsung_asoc_dma = {
148 .name = "samsung-audio",
151 .dma_mask = &samsung_device_dma_mask,
152 .coherent_dma_mask = DMA_BIT_MASK(32),
156 struct platform_device samsung_asoc_idma = {
157 .name = "samsung-idma",
160 .dma_mask = &samsung_device_dma_mask,
161 .coherent_dma_mask = DMA_BIT_MASK(32),
167 #ifdef CONFIG_S3C_DEV_FB
168 static struct resource s3c_fb_resource[] = {
169 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
170 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
171 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
172 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
175 struct platform_device s3c_device_fb = {
178 .num_resources = ARRAY_SIZE(s3c_fb_resource),
179 .resource = s3c_fb_resource,
181 .dma_mask = &samsung_device_dma_mask,
182 .coherent_dma_mask = DMA_BIT_MASK(32),
186 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
188 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
191 #endif /* CONFIG_S3C_DEV_FB */
195 #ifdef CONFIG_S5P_DEV_FIMC0
196 static struct resource s5p_fimc0_resource[] = {
197 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
198 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
201 struct platform_device s5p_device_fimc0 = {
204 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
205 .resource = s5p_fimc0_resource,
207 .dma_mask = &samsung_device_dma_mask,
208 .coherent_dma_mask = DMA_BIT_MASK(32),
212 struct platform_device s5p_device_fimc_md = {
213 .name = "s5p-fimc-md",
216 #endif /* CONFIG_S5P_DEV_FIMC0 */
218 #ifdef CONFIG_S5P_DEV_FIMC1
219 static struct resource s5p_fimc1_resource[] = {
220 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
221 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
224 struct platform_device s5p_device_fimc1 = {
227 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
228 .resource = s5p_fimc1_resource,
230 .dma_mask = &samsung_device_dma_mask,
231 .coherent_dma_mask = DMA_BIT_MASK(32),
234 #endif /* CONFIG_S5P_DEV_FIMC1 */
236 #ifdef CONFIG_S5P_DEV_FIMC2
237 static struct resource s5p_fimc2_resource[] = {
238 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
239 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
242 struct platform_device s5p_device_fimc2 = {
245 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
246 .resource = s5p_fimc2_resource,
248 .dma_mask = &samsung_device_dma_mask,
249 .coherent_dma_mask = DMA_BIT_MASK(32),
252 #endif /* CONFIG_S5P_DEV_FIMC2 */
254 #ifdef CONFIG_S5P_DEV_FIMC3
255 static struct resource s5p_fimc3_resource[] = {
256 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
257 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
260 struct platform_device s5p_device_fimc3 = {
263 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
264 .resource = s5p_fimc3_resource,
266 .dma_mask = &samsung_device_dma_mask,
267 .coherent_dma_mask = DMA_BIT_MASK(32),
270 #endif /* CONFIG_S5P_DEV_FIMC3 */
274 #ifdef CONFIG_S5P_DEV_G2D
275 static struct resource s5p_g2d_resource[] = {
276 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
277 [1] = DEFINE_RES_IRQ(IRQ_2D),
280 struct platform_device s5p_device_g2d = {
283 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
284 .resource = s5p_g2d_resource,
286 .dma_mask = &samsung_device_dma_mask,
287 .coherent_dma_mask = DMA_BIT_MASK(32),
290 #endif /* CONFIG_S5P_DEV_G2D */
292 #ifdef CONFIG_S5P_DEV_JPEG
293 static struct resource s5p_jpeg_resource[] = {
294 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
295 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
298 struct platform_device s5p_device_jpeg = {
301 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
302 .resource = s5p_jpeg_resource,
304 .dma_mask = &samsung_device_dma_mask,
305 .coherent_dma_mask = DMA_BIT_MASK(32),
308 #endif /* CONFIG_S5P_DEV_JPEG */
312 #ifdef CONFIG_S5P_DEV_FIMD0
313 static struct resource s5p_fimd0_resource[] = {
314 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
315 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
316 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
317 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
320 struct platform_device s5p_device_fimd0 = {
323 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
324 .resource = s5p_fimd0_resource,
326 .dma_mask = &samsung_device_dma_mask,
327 .coherent_dma_mask = DMA_BIT_MASK(32),
331 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
333 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
336 #endif /* CONFIG_S5P_DEV_FIMD0 */
340 #ifdef CONFIG_S3C_DEV_HWMON
341 struct platform_device s3c_device_hwmon = {
344 .dev.parent = &s3c_device_adc.dev,
347 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
349 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
352 #endif /* CONFIG_S3C_DEV_HWMON */
356 #ifdef CONFIG_S3C_DEV_HSMMC
357 static struct resource s3c_hsmmc_resource[] = {
358 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
359 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
362 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
364 .host_caps = (MMC_CAP_4_BIT_DATA |
365 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
368 struct platform_device s3c_device_hsmmc0 = {
371 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
372 .resource = s3c_hsmmc_resource,
374 .dma_mask = &samsung_device_dma_mask,
375 .coherent_dma_mask = DMA_BIT_MASK(32),
376 .platform_data = &s3c_hsmmc0_def_platdata,
380 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
382 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
384 #endif /* CONFIG_S3C_DEV_HSMMC */
386 #ifdef CONFIG_S3C_DEV_HSMMC1
387 static struct resource s3c_hsmmc1_resource[] = {
388 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
389 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
392 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
394 .host_caps = (MMC_CAP_4_BIT_DATA |
395 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
398 struct platform_device s3c_device_hsmmc1 = {
401 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
402 .resource = s3c_hsmmc1_resource,
404 .dma_mask = &samsung_device_dma_mask,
405 .coherent_dma_mask = DMA_BIT_MASK(32),
406 .platform_data = &s3c_hsmmc1_def_platdata,
410 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
412 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
414 #endif /* CONFIG_S3C_DEV_HSMMC1 */
418 #ifdef CONFIG_S3C_DEV_HSMMC2
419 static struct resource s3c_hsmmc2_resource[] = {
420 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
421 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
424 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
426 .host_caps = (MMC_CAP_4_BIT_DATA |
427 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
430 struct platform_device s3c_device_hsmmc2 = {
433 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
434 .resource = s3c_hsmmc2_resource,
436 .dma_mask = &samsung_device_dma_mask,
437 .coherent_dma_mask = DMA_BIT_MASK(32),
438 .platform_data = &s3c_hsmmc2_def_platdata,
442 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
444 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
446 #endif /* CONFIG_S3C_DEV_HSMMC2 */
448 #ifdef CONFIG_S3C_DEV_HSMMC3
449 static struct resource s3c_hsmmc3_resource[] = {
450 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
451 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
454 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
456 .host_caps = (MMC_CAP_4_BIT_DATA |
457 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
460 struct platform_device s3c_device_hsmmc3 = {
463 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
464 .resource = s3c_hsmmc3_resource,
466 .dma_mask = &samsung_device_dma_mask,
467 .coherent_dma_mask = DMA_BIT_MASK(32),
468 .platform_data = &s3c_hsmmc3_def_platdata,
472 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
474 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
476 #endif /* CONFIG_S3C_DEV_HSMMC3 */
480 static struct resource s3c_i2c0_resource[] = {
481 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
482 [1] = DEFINE_RES_IRQ(IRQ_IIC),
485 struct platform_device s3c_device_i2c0 = {
486 .name = "s3c2410-i2c",
487 #ifdef CONFIG_S3C_DEV_I2C1
492 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
493 .resource = s3c_i2c0_resource,
496 struct s3c2410_platform_i2c default_i2c_data __initdata = {
499 .frequency = 100*1000,
503 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
505 struct s3c2410_platform_i2c *npd;
508 pd = &default_i2c_data;
512 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
516 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
519 #ifdef CONFIG_S3C_DEV_I2C1
520 static struct resource s3c_i2c1_resource[] = {
521 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
522 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
525 struct platform_device s3c_device_i2c1 = {
526 .name = "s3c2410-i2c",
528 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
529 .resource = s3c_i2c1_resource,
532 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
534 struct s3c2410_platform_i2c *npd;
537 pd = &default_i2c_data;
541 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
545 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
547 #endif /* CONFIG_S3C_DEV_I2C1 */
549 #ifdef CONFIG_S3C_DEV_I2C2
550 static struct resource s3c_i2c2_resource[] = {
551 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
552 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
555 struct platform_device s3c_device_i2c2 = {
556 .name = "s3c2410-i2c",
558 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
559 .resource = s3c_i2c2_resource,
562 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
564 struct s3c2410_platform_i2c *npd;
567 pd = &default_i2c_data;
571 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
575 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
577 #endif /* CONFIG_S3C_DEV_I2C2 */
579 #ifdef CONFIG_S3C_DEV_I2C3
580 static struct resource s3c_i2c3_resource[] = {
581 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
582 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
585 struct platform_device s3c_device_i2c3 = {
586 .name = "s3c2440-i2c",
588 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
589 .resource = s3c_i2c3_resource,
592 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
594 struct s3c2410_platform_i2c *npd;
597 pd = &default_i2c_data;
601 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
605 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
607 #endif /*CONFIG_S3C_DEV_I2C3 */
609 #ifdef CONFIG_S3C_DEV_I2C4
610 static struct resource s3c_i2c4_resource[] = {
611 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
612 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
615 struct platform_device s3c_device_i2c4 = {
616 .name = "s3c2440-i2c",
618 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
619 .resource = s3c_i2c4_resource,
622 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
624 struct s3c2410_platform_i2c *npd;
627 pd = &default_i2c_data;
631 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
635 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
637 #endif /*CONFIG_S3C_DEV_I2C4 */
639 #ifdef CONFIG_S3C_DEV_I2C5
640 static struct resource s3c_i2c5_resource[] = {
641 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
642 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
645 struct platform_device s3c_device_i2c5 = {
646 .name = "s3c2440-i2c",
648 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
649 .resource = s3c_i2c5_resource,
652 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
654 struct s3c2410_platform_i2c *npd;
657 pd = &default_i2c_data;
661 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
665 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
667 #endif /*CONFIG_S3C_DEV_I2C5 */
669 #ifdef CONFIG_S3C_DEV_I2C6
670 static struct resource s3c_i2c6_resource[] = {
671 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
672 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
675 struct platform_device s3c_device_i2c6 = {
676 .name = "s3c2440-i2c",
678 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
679 .resource = s3c_i2c6_resource,
682 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
684 struct s3c2410_platform_i2c *npd;
687 pd = &default_i2c_data;
691 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
695 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
697 #endif /* CONFIG_S3C_DEV_I2C6 */
699 #ifdef CONFIG_S3C_DEV_I2C7
700 static struct resource s3c_i2c7_resource[] = {
701 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
702 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
705 struct platform_device s3c_device_i2c7 = {
706 .name = "s3c2440-i2c",
708 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
709 .resource = s3c_i2c7_resource,
712 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
714 struct s3c2410_platform_i2c *npd;
717 pd = &default_i2c_data;
721 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
725 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
727 #endif /* CONFIG_S3C_DEV_I2C7 */
731 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
732 static struct resource s5p_i2c_resource[] = {
733 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
734 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
737 struct platform_device s5p_device_i2c_hdmiphy = {
738 .name = "s3c2440-hdmiphy-i2c",
740 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
741 .resource = s5p_i2c_resource,
744 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
746 struct s3c2410_platform_i2c *npd;
749 pd = &default_i2c_data;
751 if (soc_is_exynos4210())
753 else if (soc_is_s5pv210())
759 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
760 &s5p_device_i2c_hdmiphy);
762 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
766 #ifdef CONFIG_PLAT_S3C24XX
767 static struct resource s3c_iis_resource[] = {
768 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
771 struct platform_device s3c_device_iis = {
772 .name = "s3c24xx-iis",
774 .num_resources = ARRAY_SIZE(s3c_iis_resource),
775 .resource = s3c_iis_resource,
777 .dma_mask = &samsung_device_dma_mask,
778 .coherent_dma_mask = DMA_BIT_MASK(32),
781 #endif /* CONFIG_PLAT_S3C24XX */
785 #ifdef CONFIG_SAMSUNG_DEV_IDE
786 static struct resource s3c_cfcon_resource[] = {
787 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
788 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
791 struct platform_device s3c_device_cfcon = {
793 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
794 .resource = s3c_cfcon_resource,
797 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
799 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
802 #endif /* CONFIG_SAMSUNG_DEV_IDE */
806 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
807 static struct resource samsung_keypad_resources[] = {
808 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
809 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
812 struct platform_device samsung_device_keypad = {
813 .name = "samsung-keypad",
815 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
816 .resource = samsung_keypad_resources,
819 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
821 struct samsung_keypad_platdata *npd;
823 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
824 &samsung_device_keypad);
827 npd->cfg_gpio = samsung_keypad_cfg_gpio;
829 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
833 #ifdef CONFIG_PLAT_S3C24XX
834 static struct resource s3c_lcd_resource[] = {
835 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
836 [1] = DEFINE_RES_IRQ(IRQ_LCD),
839 struct platform_device s3c_device_lcd = {
840 .name = "s3c2410-lcd",
842 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
843 .resource = s3c_lcd_resource,
845 .dma_mask = &samsung_device_dma_mask,
846 .coherent_dma_mask = DMA_BIT_MASK(32),
850 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
852 struct s3c2410fb_mach_info *npd;
854 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
856 npd->displays = kmemdup(pd->displays,
857 sizeof(struct s3c2410fb_display) * npd->num_displays,
860 printk(KERN_ERR "no memory for LCD display data\n");
862 printk(KERN_ERR "no memory for LCD platform data\n");
865 #endif /* CONFIG_PLAT_S3C24XX */
869 #ifdef CONFIG_S5P_DEV_MFC
870 static struct resource s5p_mfc_resource[] = {
871 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
872 [1] = DEFINE_RES_IRQ(IRQ_MFC),
875 struct platform_device s5p_device_mfc = {
878 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
879 .resource = s5p_mfc_resource,
883 * MFC hardware has 2 memory interfaces which are modelled as two separate
884 * platform devices to let dma-mapping distinguish between them.
886 * MFC parent device (s5p_device_mfc) must be registered before memory
887 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
890 struct platform_device s5p_device_mfc_l = {
894 .parent = &s5p_device_mfc.dev,
895 .dma_mask = &samsung_device_dma_mask,
896 .coherent_dma_mask = DMA_BIT_MASK(32),
900 struct platform_device s5p_device_mfc_r = {
904 .parent = &s5p_device_mfc.dev,
905 .dma_mask = &samsung_device_dma_mask,
906 .coherent_dma_mask = DMA_BIT_MASK(32),
909 #endif /* CONFIG_S5P_DEV_MFC */
913 #ifdef CONFIG_S5P_DEV_CSIS0
914 static struct resource s5p_mipi_csis0_resource[] = {
915 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
916 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
919 struct platform_device s5p_device_mipi_csis0 = {
920 .name = "s5p-mipi-csis",
922 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
923 .resource = s5p_mipi_csis0_resource,
925 #endif /* CONFIG_S5P_DEV_CSIS0 */
927 #ifdef CONFIG_S5P_DEV_CSIS1
928 static struct resource s5p_mipi_csis1_resource[] = {
929 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
930 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
933 struct platform_device s5p_device_mipi_csis1 = {
934 .name = "s5p-mipi-csis",
936 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
937 .resource = s5p_mipi_csis1_resource,
943 #ifdef CONFIG_S3C_DEV_NAND
944 static struct resource s3c_nand_resource[] = {
945 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
948 struct platform_device s3c_device_nand = {
949 .name = "s3c2410-nand",
951 .num_resources = ARRAY_SIZE(s3c_nand_resource),
952 .resource = s3c_nand_resource,
956 * s3c_nand_copy_set() - copy nand set data
957 * @set: The new structure, directly copied from the old.
959 * Copy all the fields from the NAND set field from what is probably __initdata
960 * to new kernel memory. The code returns 0 if the copy happened correctly or
961 * an error code for the calling function to display.
963 * Note, we currently do not try and look to see if we've already copied the
964 * data in a previous set.
966 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
971 size = sizeof(struct mtd_partition) * set->nr_partitions;
973 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
974 set->partitions = ptr;
980 if (set->nr_map && set->nr_chips) {
981 size = sizeof(int) * set->nr_chips;
982 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
989 if (set->ecc_layout) {
990 ptr = kmemdup(set->ecc_layout,
991 sizeof(struct nand_ecclayout), GFP_KERNEL);
992 set->ecc_layout = ptr;
1001 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1003 struct s3c2410_platform_nand *npd;
1007 /* note, if we get a failure in allocation, we simply drop out of the
1008 * function. If there is so little memory available at initialisation
1009 * time then there is little chance the system is going to run.
1012 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1017 /* now see if we need to copy any of the nand set data */
1019 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1021 struct s3c2410_nand_set *from = npd->sets;
1022 struct s3c2410_nand_set *to;
1025 to = kmemdup(from, size, GFP_KERNEL);
1026 npd->sets = to; /* set, even if we failed */
1029 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1033 for (i = 0; i < npd->nr_sets; i++) {
1034 ret = s3c_nand_copy_set(to);
1036 printk(KERN_ERR "%s: failed to copy set %d\n",
1044 #endif /* CONFIG_S3C_DEV_NAND */
1048 #ifdef CONFIG_S3C_DEV_ONENAND
1049 static struct resource s3c_onenand_resources[] = {
1050 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1051 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1052 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1055 struct platform_device s3c_device_onenand = {
1056 .name = "samsung-onenand",
1058 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1059 .resource = s3c_onenand_resources,
1061 #endif /* CONFIG_S3C_DEV_ONENAND */
1063 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1064 static struct resource s3c64xx_onenand1_resources[] = {
1065 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1066 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1067 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1070 struct platform_device s3c64xx_device_onenand1 = {
1071 .name = "samsung-onenand",
1073 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1074 .resource = s3c64xx_onenand1_resources,
1077 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1079 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1080 &s3c64xx_device_onenand1);
1082 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1084 #ifdef CONFIG_S5P_DEV_ONENAND
1085 static struct resource s5p_onenand_resources[] = {
1086 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1087 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1088 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1091 struct platform_device s5p_device_onenand = {
1092 .name = "s5pc110-onenand",
1094 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1095 .resource = s5p_onenand_resources,
1097 #endif /* CONFIG_S5P_DEV_ONENAND */
1101 #ifdef CONFIG_PLAT_S5P
1102 static struct resource s5p_pmu_resource[] = {
1103 DEFINE_RES_IRQ(IRQ_PMU)
1106 static struct platform_device s5p_device_pmu = {
1108 .id = ARM_PMU_DEVICE_CPU,
1109 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1110 .resource = s5p_pmu_resource,
1113 static int __init s5p_pmu_init(void)
1115 platform_device_register(&s5p_device_pmu);
1118 arch_initcall(s5p_pmu_init);
1119 #endif /* CONFIG_PLAT_S5P */
1123 #ifdef CONFIG_SAMSUNG_DEV_PWM
1125 #define TIMER_RESOURCE_SIZE (1)
1127 #define TIMER_RESOURCE(_tmr, _irq) \
1128 (struct resource [TIMER_RESOURCE_SIZE]) { \
1132 .flags = IORESOURCE_IRQ \
1136 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1137 .name = "s3c24xx-pwm", \
1139 .num_resources = TIMER_RESOURCE_SIZE, \
1140 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1143 * since we already have an static mapping for the timer,
1144 * we do not bother setting any IO resource for the base.
1147 struct platform_device s3c_device_timer[] = {
1148 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1149 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1150 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1151 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1152 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1154 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1158 #ifdef CONFIG_PLAT_S3C24XX
1159 static struct resource s3c_rtc_resource[] = {
1160 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1161 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1162 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1165 struct platform_device s3c_device_rtc = {
1166 .name = "s3c2410-rtc",
1168 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1169 .resource = s3c_rtc_resource,
1171 #endif /* CONFIG_PLAT_S3C24XX */
1173 #ifdef CONFIG_S3C_DEV_RTC
1174 static struct resource s3c_rtc_resource[] = {
1175 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1176 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1177 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1180 struct platform_device s3c_device_rtc = {
1181 .name = "s3c64xx-rtc",
1183 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1184 .resource = s3c_rtc_resource,
1186 #endif /* CONFIG_S3C_DEV_RTC */
1190 #ifdef CONFIG_PLAT_S3C24XX
1191 static struct resource s3c_sdi_resource[] = {
1192 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1193 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1196 struct platform_device s3c_device_sdi = {
1197 .name = "s3c2410-sdi",
1199 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1200 .resource = s3c_sdi_resource,
1203 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1205 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1208 #endif /* CONFIG_PLAT_S3C24XX */
1212 #ifdef CONFIG_PLAT_S3C24XX
1213 static struct resource s3c_spi0_resource[] = {
1214 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1215 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1218 struct platform_device s3c_device_spi0 = {
1219 .name = "s3c2410-spi",
1221 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1222 .resource = s3c_spi0_resource,
1224 .dma_mask = &samsung_device_dma_mask,
1225 .coherent_dma_mask = DMA_BIT_MASK(32),
1229 static struct resource s3c_spi1_resource[] = {
1230 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1231 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1234 struct platform_device s3c_device_spi1 = {
1235 .name = "s3c2410-spi",
1237 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1238 .resource = s3c_spi1_resource,
1240 .dma_mask = &samsung_device_dma_mask,
1241 .coherent_dma_mask = DMA_BIT_MASK(32),
1244 #endif /* CONFIG_PLAT_S3C24XX */
1248 #ifdef CONFIG_PLAT_S3C24XX
1249 static struct resource s3c_ts_resource[] = {
1250 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1251 [1] = DEFINE_RES_IRQ(IRQ_TC),
1254 struct platform_device s3c_device_ts = {
1255 .name = "s3c2410-ts",
1257 .dev.parent = &s3c_device_adc.dev,
1258 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1259 .resource = s3c_ts_resource,
1262 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1264 s3c_set_platdata(hard_s3c2410ts_info,
1265 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1267 #endif /* CONFIG_PLAT_S3C24XX */
1269 #ifdef CONFIG_SAMSUNG_DEV_TS
1270 static struct resource s3c_ts_resource[] = {
1271 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1272 [1] = DEFINE_RES_IRQ(IRQ_TC),
1275 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1278 .oversampling_shift = 2,
1281 struct platform_device s3c_device_ts = {
1282 .name = "s3c64xx-ts",
1284 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1285 .resource = s3c_ts_resource,
1288 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1291 pd = &default_ts_data;
1293 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1296 #endif /* CONFIG_SAMSUNG_DEV_TS */
1300 #ifdef CONFIG_S5P_DEV_TV
1302 static struct resource s5p_hdmi_resources[] = {
1303 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1304 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1307 struct platform_device s5p_device_hdmi = {
1310 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1311 .resource = s5p_hdmi_resources,
1314 static struct resource s5p_sdo_resources[] = {
1315 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1316 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1319 struct platform_device s5p_device_sdo = {
1322 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1323 .resource = s5p_sdo_resources,
1326 static struct resource s5p_mixer_resources[] = {
1327 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1328 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1329 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1332 struct platform_device s5p_device_mixer = {
1333 .name = "s5p-mixer",
1335 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1336 .resource = s5p_mixer_resources,
1338 .dma_mask = &samsung_device_dma_mask,
1339 .coherent_dma_mask = DMA_BIT_MASK(32),
1342 #endif /* CONFIG_S5P_DEV_TV */
1346 #ifdef CONFIG_S3C_DEV_USB_HOST
1347 static struct resource s3c_usb_resource[] = {
1348 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1349 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1352 struct platform_device s3c_device_ohci = {
1353 .name = "s3c2410-ohci",
1355 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1356 .resource = s3c_usb_resource,
1358 .dma_mask = &samsung_device_dma_mask,
1359 .coherent_dma_mask = DMA_BIT_MASK(32),
1364 * s3c_ohci_set_platdata - initialise OHCI device platform data
1365 * @info: The platform data.
1367 * This call copies the @info passed in and sets the device .platform_data
1368 * field to that copy. The @info is copied so that the original can be marked
1372 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1374 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1377 #endif /* CONFIG_S3C_DEV_USB_HOST */
1379 /* USB Device (Gadget) */
1381 #ifdef CONFIG_PLAT_S3C24XX
1382 static struct resource s3c_usbgadget_resource[] = {
1383 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1384 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1387 struct platform_device s3c_device_usbgadget = {
1388 .name = "s3c2410-usbgadget",
1390 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1391 .resource = s3c_usbgadget_resource,
1394 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1396 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1398 #endif /* CONFIG_PLAT_S3C24XX */
1400 /* USB EHCI Host Controller */
1402 #ifdef CONFIG_S5P_DEV_USB_EHCI
1403 static struct resource s5p_ehci_resource[] = {
1404 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1405 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1408 struct platform_device s5p_device_ehci = {
1411 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1412 .resource = s5p_ehci_resource,
1414 .dma_mask = &samsung_device_dma_mask,
1415 .coherent_dma_mask = DMA_BIT_MASK(32),
1419 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1421 struct s5p_ehci_platdata *npd;
1423 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1427 npd->phy_init = s5p_usb_phy_init;
1429 npd->phy_exit = s5p_usb_phy_exit;
1431 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1435 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1436 static struct resource s3c_usb_hsotg_resources[] = {
1437 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1438 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1441 struct platform_device s3c_device_usb_hsotg = {
1442 .name = "s3c-hsotg",
1444 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1445 .resource = s3c_usb_hsotg_resources,
1447 .dma_mask = &samsung_device_dma_mask,
1448 .coherent_dma_mask = DMA_BIT_MASK(32),
1452 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1454 struct s3c_hsotg_plat *npd;
1456 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1457 &s3c_device_usb_hsotg);
1460 npd->phy_init = s5p_usb_phy_init;
1462 npd->phy_exit = s5p_usb_phy_exit;
1464 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1466 /* USB High Spped 2.0 Device (Gadget) */
1468 #ifdef CONFIG_PLAT_S3C24XX
1469 static struct resource s3c_hsudc_resource[] = {
1470 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1471 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1474 struct platform_device s3c_device_usb_hsudc = {
1475 .name = "s3c-hsudc",
1477 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1478 .resource = s3c_hsudc_resource,
1480 .dma_mask = &samsung_device_dma_mask,
1481 .coherent_dma_mask = DMA_BIT_MASK(32),
1485 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1487 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1489 #endif /* CONFIG_PLAT_S3C24XX */
1493 #ifdef CONFIG_S3C_DEV_WDT
1494 static struct resource s3c_wdt_resource[] = {
1495 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1496 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1499 struct platform_device s3c_device_wdt = {
1500 .name = "s3c2410-wdt",
1502 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1503 .resource = s3c_wdt_resource,
1505 #endif /* CONFIG_S3C_DEV_WDT */
1507 #ifdef CONFIG_S3C64XX_DEV_SPI0
1508 static struct resource s3c64xx_spi0_resource[] = {
1509 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1510 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1511 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1512 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1515 struct platform_device s3c64xx_device_spi0 = {
1516 .name = "s3c64xx-spi",
1518 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1519 .resource = s3c64xx_spi0_resource,
1521 .dma_mask = &samsung_device_dma_mask,
1522 .coherent_dma_mask = DMA_BIT_MASK(32),
1526 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1527 int src_clk_nr, int num_cs)
1530 pr_err("%s:Need to pass platform data\n", __func__);
1534 /* Reject invalid configuration */
1535 if (!num_cs || src_clk_nr < 0) {
1536 pr_err("%s: Invalid SPI configuration\n", __func__);
1540 pd->num_cs = num_cs;
1541 pd->src_clk_nr = src_clk_nr;
1543 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1545 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1547 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1549 #ifdef CONFIG_S3C64XX_DEV_SPI1
1550 static struct resource s3c64xx_spi1_resource[] = {
1551 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1552 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1553 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1554 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1557 struct platform_device s3c64xx_device_spi1 = {
1558 .name = "s3c64xx-spi",
1560 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1561 .resource = s3c64xx_spi1_resource,
1563 .dma_mask = &samsung_device_dma_mask,
1564 .coherent_dma_mask = DMA_BIT_MASK(32),
1568 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1569 int src_clk_nr, int num_cs)
1572 pr_err("%s:Need to pass platform data\n", __func__);
1576 /* Reject invalid configuration */
1577 if (!num_cs || src_clk_nr < 0) {
1578 pr_err("%s: Invalid SPI configuration\n", __func__);
1582 pd->num_cs = num_cs;
1583 pd->src_clk_nr = src_clk_nr;
1585 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1587 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1589 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1591 #ifdef CONFIG_S3C64XX_DEV_SPI2
1592 static struct resource s3c64xx_spi2_resource[] = {
1593 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1594 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1595 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1596 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1599 struct platform_device s3c64xx_device_spi2 = {
1600 .name = "s3c64xx-spi",
1602 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1603 .resource = s3c64xx_spi2_resource,
1605 .dma_mask = &samsung_device_dma_mask,
1606 .coherent_dma_mask = DMA_BIT_MASK(32),
1610 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1611 int src_clk_nr, int num_cs)
1614 pr_err("%s:Need to pass platform data\n", __func__);
1618 /* Reject invalid configuration */
1619 if (!num_cs || src_clk_nr < 0) {
1620 pr_err("%s: Invalid SPI configuration\n", __func__);
1624 pd->num_cs = num_cs;
1625 pd->src_clk_nr = src_clk_nr;
1627 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1629 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1631 #endif /* CONFIG_S3C64XX_DEV_SPI2 */