2 * Generic GPIO driver for logic cells found in the Nomadik SoC
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/device.h>
16 #include <linux/platform_device.h>
18 #include <linux/clk.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/spinlock.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/slab.h>
26 #include <plat/pincfg.h>
27 #include <mach/hardware.h>
28 #include <mach/gpio.h>
31 * The GPIO module in the Nomadik family of Systems-on-Chip is an
32 * AMBA device, managing 32 pins and alternate functions. The logic block
33 * is currently used in the Nomadik and ux500.
35 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
38 #define NMK_GPIO_PER_CHIP 32
40 struct nmk_gpio_chip {
41 struct gpio_chip chip;
45 unsigned int parent_irq;
46 int secondary_parent_irq;
47 u32 (*get_secondary_status)(unsigned int bank);
48 void (*set_ioforce)(bool enable);
50 /* Keep track of configured edges */
55 static struct nmk_gpio_chip *
56 nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
58 static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);
60 #define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)
62 static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
63 unsigned offset, int gpio_mode)
65 u32 bit = 1 << offset;
68 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
69 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
70 if (gpio_mode & NMK_GPIO_ALT_A)
72 if (gpio_mode & NMK_GPIO_ALT_B)
74 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
75 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
78 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
79 unsigned offset, enum nmk_gpio_slpm mode)
81 u32 bit = 1 << offset;
84 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
85 if (mode == NMK_GPIO_SLPM_NOCHANGE)
89 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
92 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
93 unsigned offset, enum nmk_gpio_pull pull)
95 u32 bit = 1 << offset;
98 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
99 if (pull == NMK_GPIO_PULL_NONE)
103 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
105 if (pull == NMK_GPIO_PULL_UP)
106 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
107 else if (pull == NMK_GPIO_PULL_DOWN)
108 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
111 static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
114 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
117 static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
118 unsigned offset, int val)
121 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
123 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
126 static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
127 unsigned offset, int val)
129 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
130 __nmk_gpio_set_output(nmk_chip, offset, val);
133 static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
134 unsigned offset, int gpio_mode,
140 if (glitch && nmk_chip->set_ioforce) {
141 u32 bit = BIT(offset);
143 rwimsc = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
144 fwimsc = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
146 /* Prevent spurious wakeups */
147 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
148 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
150 nmk_chip->set_ioforce(true);
153 __nmk_gpio_set_mode(nmk_chip, offset, gpio_mode);
155 if (glitch && nmk_chip->set_ioforce) {
156 nmk_chip->set_ioforce(false);
158 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
159 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
163 static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
164 pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
166 static const char *afnames[] = {
167 [NMK_GPIO_ALT_GPIO] = "GPIO",
168 [NMK_GPIO_ALT_A] = "A",
169 [NMK_GPIO_ALT_B] = "B",
170 [NMK_GPIO_ALT_C] = "C"
172 static const char *pullnames[] = {
173 [NMK_GPIO_PULL_NONE] = "none",
174 [NMK_GPIO_PULL_UP] = "up",
175 [NMK_GPIO_PULL_DOWN] = "down",
176 [3] /* illegal */ = "??"
178 static const char *slpmnames[] = {
179 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
180 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
183 int pin = PIN_NUM(cfg);
184 int pull = PIN_PULL(cfg);
185 int af = PIN_ALT(cfg);
186 int slpm = PIN_SLPM(cfg);
187 int output = PIN_DIR(cfg);
188 int val = PIN_VAL(cfg);
189 bool glitch = af == NMK_GPIO_ALT_C;
191 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
192 pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
193 output ? "output " : "input",
194 output ? (val ? "high" : "low") : "");
197 int slpm_pull = PIN_SLPM_PULL(cfg);
198 int slpm_output = PIN_SLPM_DIR(cfg);
199 int slpm_val = PIN_SLPM_VAL(cfg);
201 af = NMK_GPIO_ALT_GPIO;
204 * The SLPM_* values are normal values + 1 to allow zero to
205 * mean "same as normal".
208 pull = slpm_pull - 1;
210 output = slpm_output - 1;
214 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
216 slpm_pull ? pullnames[pull] : "same",
217 slpm_output ? (output ? "output" : "input") : "same",
218 slpm_val ? (val ? "high" : "low") : "same");
222 __nmk_gpio_make_output(nmk_chip, offset, val);
224 __nmk_gpio_make_input(nmk_chip, offset);
225 __nmk_gpio_set_pull(nmk_chip, offset, pull);
229 * If we've backed up the SLPM registers (glitch workaround), modify
230 * the backups since they will be restored.
233 if (slpm == NMK_GPIO_SLPM_NOCHANGE)
234 slpmregs[nmk_chip->bank] |= BIT(offset);
236 slpmregs[nmk_chip->bank] &= ~BIT(offset);
238 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
240 __nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
244 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
245 * - Save SLPM registers
246 * - Set SLPM=0 for the IOs you want to switch and others to 1
247 * - Configure the GPIO registers for the IOs that are being switched
249 * - Modify the AFLSA/B registers for the IOs that are being switched
251 * - Restore SLPM registers
252 * - Any spurious wake up event during switch sequence to be ignored and
255 static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
259 for (i = 0; i < NUM_BANKS; i++) {
260 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
261 unsigned int temp = slpm[i];
266 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
267 writel(temp, chip->addr + NMK_GPIO_SLPC);
271 static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
275 for (i = 0; i < NUM_BANKS; i++) {
276 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
281 writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
285 static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
287 static unsigned int slpm[NUM_BANKS];
293 for (i = 0; i < num; i++) {
294 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C) {
300 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
303 memset(slpm, 0xff, sizeof(slpm));
305 for (i = 0; i < num; i++) {
306 int pin = PIN_NUM(cfgs[i]);
307 int offset = pin % NMK_GPIO_PER_CHIP;
309 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C)
310 slpm[pin / NMK_GPIO_PER_CHIP] &= ~BIT(offset);
313 nmk_gpio_glitch_slpm_init(slpm);
316 for (i = 0; i < num; i++) {
317 struct nmk_gpio_chip *nmk_chip;
318 int pin = PIN_NUM(cfgs[i]);
320 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
326 spin_lock(&nmk_chip->lock);
327 __nmk_config_pin(nmk_chip, pin - nmk_chip->chip.base,
328 cfgs[i], sleep, glitch ? slpm : NULL);
329 spin_unlock(&nmk_chip->lock);
333 nmk_gpio_glitch_slpm_restore(slpm);
335 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
341 * nmk_config_pin - configure a pin's mux attributes
342 * @cfg: pin confguration
344 * Configures a pin's mode (alternate function or GPIO), its pull up status,
345 * and its sleep mode based on the specified configuration. The @cfg is
346 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
347 * are constructed using, and can be further enhanced with, the macros in
350 * If a pin's mode is set to GPIO, it is configured as an input to avoid
351 * side-effects. The gpio can be manipulated later using standard GPIO API
354 int nmk_config_pin(pin_cfg_t cfg, bool sleep)
356 return __nmk_config_pins(&cfg, 1, sleep);
358 EXPORT_SYMBOL(nmk_config_pin);
361 * nmk_config_pins - configure several pins at once
362 * @cfgs: array of pin configurations
363 * @num: number of elments in the array
365 * Configures several pins using nmk_config_pin(). Refer to that function for
366 * further information.
368 int nmk_config_pins(pin_cfg_t *cfgs, int num)
370 return __nmk_config_pins(cfgs, num, false);
372 EXPORT_SYMBOL(nmk_config_pins);
374 int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num)
376 return __nmk_config_pins(cfgs, num, true);
378 EXPORT_SYMBOL(nmk_config_pins_sleep);
381 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
383 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
385 * Sets the sleep mode of a pin. If @mode is NMK_GPIO_SLPM_INPUT, the pin is
386 * changed to an input (with pullup/down enabled) in sleep and deep sleep. If
387 * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
388 * configured even when in sleep and deep sleep.
390 * On DB8500v2 onwards, this setting loses the previous meaning and instead
391 * indicates if wakeup detection is enabled on the pin. Note that
392 * enable_irq_wake() will automatically enable wakeup detection.
394 int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
396 struct nmk_gpio_chip *nmk_chip;
399 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
403 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
404 spin_lock(&nmk_chip->lock);
406 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
408 spin_unlock(&nmk_chip->lock);
409 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
415 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
417 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
419 * Enables/disables pull up/down on a specified pin. This only takes effect if
420 * the pin is configured as an input (either explicitly or by the alternate
423 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
424 * configured as an input. Otherwise, due to the way the controller registers
425 * work, this function will change the value output on the pin.
427 int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
429 struct nmk_gpio_chip *nmk_chip;
432 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
436 spin_lock_irqsave(&nmk_chip->lock, flags);
437 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
438 spin_unlock_irqrestore(&nmk_chip->lock, flags);
445 * nmk_gpio_set_mode() - set the mux mode of a gpio pin
447 * @gpio_mode: one of NMK_GPIO_ALT_GPIO, NMK_GPIO_ALT_A,
448 * NMK_GPIO_ALT_B, and NMK_GPIO_ALT_C
450 * Sets the mode of the specified pin to one of the alternate functions or
453 int nmk_gpio_set_mode(int gpio, int gpio_mode)
455 struct nmk_gpio_chip *nmk_chip;
458 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
462 spin_lock_irqsave(&nmk_chip->lock, flags);
463 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
464 spin_unlock_irqrestore(&nmk_chip->lock, flags);
468 EXPORT_SYMBOL(nmk_gpio_set_mode);
470 int nmk_gpio_get_mode(int gpio)
472 struct nmk_gpio_chip *nmk_chip;
473 u32 afunc, bfunc, bit;
475 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
479 bit = 1 << (gpio - nmk_chip->chip.base);
481 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
482 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
484 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
486 EXPORT_SYMBOL(nmk_gpio_get_mode);
490 static inline int nmk_gpio_get_bitmask(int gpio)
492 return 1 << (gpio % 32);
495 static void nmk_gpio_irq_ack(struct irq_data *d)
498 struct nmk_gpio_chip *nmk_chip;
500 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
501 nmk_chip = irq_data_get_irq_chip_data(d);
504 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
507 enum nmk_gpio_irq_type {
512 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
513 int gpio, enum nmk_gpio_irq_type which,
516 u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
517 u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
518 u32 bitmask = nmk_gpio_get_bitmask(gpio);
521 /* we must individually set/clear the two edges */
522 if (nmk_chip->edge_rising & bitmask) {
523 reg = readl(nmk_chip->addr + rimsc);
528 writel(reg, nmk_chip->addr + rimsc);
530 if (nmk_chip->edge_falling & bitmask) {
531 reg = readl(nmk_chip->addr + fimsc);
536 writel(reg, nmk_chip->addr + fimsc);
540 static int nmk_gpio_irq_modify(struct irq_data *d, enum nmk_gpio_irq_type which,
544 struct nmk_gpio_chip *nmk_chip;
548 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
549 nmk_chip = irq_data_get_irq_chip_data(d);
550 bitmask = nmk_gpio_get_bitmask(gpio);
554 spin_lock_irqsave(&nmk_chip->lock, flags);
555 __nmk_gpio_irq_modify(nmk_chip, gpio, which, enable);
556 spin_unlock_irqrestore(&nmk_chip->lock, flags);
561 static void nmk_gpio_irq_mask(struct irq_data *d)
563 nmk_gpio_irq_modify(d, NORMAL, false);
566 static void nmk_gpio_irq_unmask(struct irq_data *d)
568 nmk_gpio_irq_modify(d, NORMAL, true);
571 static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
573 struct nmk_gpio_chip *nmk_chip;
577 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
578 nmk_chip = irq_data_get_irq_chip_data(d);
582 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
583 spin_lock(&nmk_chip->lock);
585 #ifdef CONFIG_ARCH_U8500
586 if (cpu_is_u8500v2()) {
587 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base,
588 on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
589 : NMK_GPIO_SLPM_WAKEUP_DISABLE);
592 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
594 spin_unlock(&nmk_chip->lock);
595 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
600 static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
602 struct irq_desc *desc = irq_to_desc(d->irq);
603 bool enabled = !(desc->status & IRQ_DISABLED);
604 bool wake = desc->wake_depth;
606 struct nmk_gpio_chip *nmk_chip;
610 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
611 nmk_chip = irq_data_get_irq_chip_data(d);
612 bitmask = nmk_gpio_get_bitmask(gpio);
616 if (type & IRQ_TYPE_LEVEL_HIGH)
618 if (type & IRQ_TYPE_LEVEL_LOW)
621 spin_lock_irqsave(&nmk_chip->lock, flags);
624 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
627 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
629 nmk_chip->edge_rising &= ~bitmask;
630 if (type & IRQ_TYPE_EDGE_RISING)
631 nmk_chip->edge_rising |= bitmask;
633 nmk_chip->edge_falling &= ~bitmask;
634 if (type & IRQ_TYPE_EDGE_FALLING)
635 nmk_chip->edge_falling |= bitmask;
638 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
641 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
643 spin_unlock_irqrestore(&nmk_chip->lock, flags);
648 static struct irq_chip nmk_gpio_irq_chip = {
649 .name = "Nomadik-GPIO",
650 .irq_ack = nmk_gpio_irq_ack,
651 .irq_mask = nmk_gpio_irq_mask,
652 .irq_unmask = nmk_gpio_irq_unmask,
653 .irq_set_type = nmk_gpio_irq_set_type,
654 .irq_set_wake = nmk_gpio_irq_set_wake,
657 static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
660 struct nmk_gpio_chip *nmk_chip;
661 struct irq_chip *host_chip = get_irq_chip(irq);
662 unsigned int first_irq;
664 if (host_chip->irq_mask_ack)
665 host_chip->irq_mask_ack(&desc->irq_data);
667 host_chip->irq_mask(&desc->irq_data);
668 if (host_chip->irq_ack)
669 host_chip->irq_ack(&desc->irq_data);
672 nmk_chip = get_irq_data(irq);
673 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
675 int bit = __ffs(status);
677 generic_handle_irq(first_irq + bit);
681 host_chip->irq_unmask(&desc->irq_data);
684 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
686 struct nmk_gpio_chip *nmk_chip = get_irq_data(irq);
687 u32 status = readl(nmk_chip->addr + NMK_GPIO_IS);
689 __nmk_gpio_irq_handler(irq, desc, status);
692 static void nmk_gpio_secondary_irq_handler(unsigned int irq,
693 struct irq_desc *desc)
695 struct nmk_gpio_chip *nmk_chip = get_irq_data(irq);
696 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
698 __nmk_gpio_irq_handler(irq, desc, status);
701 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
703 unsigned int first_irq;
706 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
707 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
708 set_irq_chip(i, &nmk_gpio_irq_chip);
709 set_irq_handler(i, handle_edge_irq);
710 set_irq_flags(i, IRQF_VALID);
711 set_irq_chip_data(i, nmk_chip);
712 set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
715 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
716 set_irq_data(nmk_chip->parent_irq, nmk_chip);
718 if (nmk_chip->secondary_parent_irq >= 0) {
719 set_irq_chained_handler(nmk_chip->secondary_parent_irq,
720 nmk_gpio_secondary_irq_handler);
721 set_irq_data(nmk_chip->secondary_parent_irq, nmk_chip);
728 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
730 struct nmk_gpio_chip *nmk_chip =
731 container_of(chip, struct nmk_gpio_chip, chip);
733 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
737 static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
739 struct nmk_gpio_chip *nmk_chip =
740 container_of(chip, struct nmk_gpio_chip, chip);
741 u32 bit = 1 << offset;
743 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
746 static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
749 struct nmk_gpio_chip *nmk_chip =
750 container_of(chip, struct nmk_gpio_chip, chip);
752 __nmk_gpio_set_output(nmk_chip, offset, val);
755 static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
758 struct nmk_gpio_chip *nmk_chip =
759 container_of(chip, struct nmk_gpio_chip, chip);
761 __nmk_gpio_make_output(nmk_chip, offset, val);
766 static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
768 struct nmk_gpio_chip *nmk_chip =
769 container_of(chip, struct nmk_gpio_chip, chip);
771 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
774 #ifdef CONFIG_DEBUG_FS
776 #include <linux/seq_file.h>
778 static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
782 unsigned gpio = chip->base;
784 struct nmk_gpio_chip *nmk_chip =
785 container_of(chip, struct nmk_gpio_chip, chip);
786 const char *modes[] = {
787 [NMK_GPIO_ALT_GPIO] = "gpio",
788 [NMK_GPIO_ALT_A] = "altA",
789 [NMK_GPIO_ALT_B] = "altB",
790 [NMK_GPIO_ALT_C] = "altC",
793 for (i = 0; i < chip->ngpio; i++, gpio++) {
794 const char *label = gpiochip_is_requested(chip, i);
801 is_out = readl(nmk_chip->addr + NMK_GPIO_DIR) & bit;
802 pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
803 mode = nmk_gpio_get_mode(gpio);
804 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
806 is_out ? "out" : "in ",
808 ? (chip->get(chip, i) ? "hi" : "lo")
810 (mode < 0) ? "unknown" : modes[mode],
811 pull ? "pull" : "none");
814 int irq = gpio_to_irq(gpio);
815 struct irq_desc *desc = irq_to_desc(irq);
817 /* This races with request_irq(), set_irq_type(),
818 * and set_irq_wake() ... but those are "rare".
820 * More significantly, trigger type flags aren't
821 * currently maintained by genirq.
823 if (irq >= 0 && desc->action) {
826 switch (desc->status & IRQ_TYPE_SENSE_MASK) {
828 trigger = "(default)";
830 case IRQ_TYPE_EDGE_FALLING:
831 trigger = "edge-falling";
833 case IRQ_TYPE_EDGE_RISING:
834 trigger = "edge-rising";
836 case IRQ_TYPE_EDGE_BOTH:
837 trigger = "edge-both";
839 case IRQ_TYPE_LEVEL_HIGH:
840 trigger = "level-high";
842 case IRQ_TYPE_LEVEL_LOW:
843 trigger = "level-low";
846 trigger = "?trigger?";
850 seq_printf(s, " irq-%d %s%s",
852 (desc->status & IRQ_WAKEUP)
862 #define nmk_gpio_dbg_show NULL
865 /* This structure is replicated for each GPIO block allocated at probe time */
866 static struct gpio_chip nmk_gpio_template = {
867 .direction_input = nmk_gpio_make_input,
868 .get = nmk_gpio_get_input,
869 .direction_output = nmk_gpio_make_output,
870 .set = nmk_gpio_set_output,
871 .to_irq = nmk_gpio_to_irq,
872 .dbg_show = nmk_gpio_dbg_show,
876 static int __devinit nmk_gpio_probe(struct platform_device *dev)
878 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
879 struct nmk_gpio_chip *nmk_chip;
880 struct gpio_chip *chip;
881 struct resource *res;
890 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
896 irq = platform_get_irq(dev, 0);
902 secondary_irq = platform_get_irq(dev, 1);
903 if (secondary_irq >= 0 && !pdata->get_secondary_status) {
908 if (request_mem_region(res->start, resource_size(res),
909 dev_name(&dev->dev)) == NULL) {
914 clk = clk_get(&dev->dev, NULL);
922 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
928 * The virt address in nmk_chip->addr is in the nomadik register space,
929 * so we can simply convert the resource address, without remapping
931 nmk_chip->bank = dev->id;
933 nmk_chip->addr = io_p2v(res->start);
934 nmk_chip->chip = nmk_gpio_template;
935 nmk_chip->parent_irq = irq;
936 nmk_chip->secondary_parent_irq = secondary_irq;
937 nmk_chip->get_secondary_status = pdata->get_secondary_status;
938 nmk_chip->set_ioforce = pdata->set_ioforce;
939 spin_lock_init(&nmk_chip->lock);
941 chip = &nmk_chip->chip;
942 chip->base = pdata->first_gpio;
943 chip->ngpio = pdata->num_gpio;
944 chip->label = pdata->name ?: dev_name(&dev->dev);
945 chip->dev = &dev->dev;
946 chip->owner = THIS_MODULE;
948 ret = gpiochip_add(&nmk_chip->chip);
952 BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
954 nmk_gpio_chips[nmk_chip->bank] = nmk_chip;
955 platform_set_drvdata(dev, nmk_chip);
957 nmk_gpio_init_irq(nmk_chip);
959 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
960 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
969 release_mem_region(res->start, resource_size(res));
971 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
972 pdata->first_gpio, pdata->first_gpio+31);
976 static struct platform_driver nmk_gpio_driver = {
978 .owner = THIS_MODULE,
981 .probe = nmk_gpio_probe,
984 static int __init nmk_gpio_init(void)
986 return platform_driver_register(&nmk_gpio_driver);
989 core_initcall(nmk_gpio_init);
991 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
992 MODULE_DESCRIPTION("Nomadik GPIO Driver");
993 MODULE_LICENSE("GPL");