2 * Generic GPIO driver for logic cells found in the Nomadik SoC
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/device.h>
16 #include <linux/platform_device.h>
18 #include <linux/clk.h>
19 #include <linux/err.h>
20 #include <linux/gpio.h>
21 #include <linux/spinlock.h>
22 #include <linux/interrupt.h>
23 #include <linux/irq.h>
24 #include <linux/slab.h>
26 #include <plat/pincfg.h>
27 #include <mach/hardware.h>
28 #include <mach/gpio.h>
31 * The GPIO module in the Nomadik family of Systems-on-Chip is an
32 * AMBA device, managing 32 pins and alternate functions. The logic block
33 * is currently used in the Nomadik and ux500.
35 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
38 static const u32 backup_regs[] = {
50 #define NMK_GPIO_PER_CHIP 32
52 struct nmk_gpio_chip {
53 struct gpio_chip chip;
57 unsigned int parent_irq;
58 int secondary_parent_irq;
59 u32 (*get_secondary_status)(unsigned int bank);
60 void (*set_ioforce)(bool enable);
62 /* Keep track of configured edges */
65 u32 backup[ARRAY_SIZE(backup_regs)];
66 /* Bitmap, 1 = pull up, 0 = pull down */
70 static struct nmk_gpio_chip *
71 nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
73 static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);
75 #define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)
77 static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
78 unsigned offset, int gpio_mode)
80 u32 bit = 1 << offset;
83 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
84 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
85 if (gpio_mode & NMK_GPIO_ALT_A)
87 if (gpio_mode & NMK_GPIO_ALT_B)
89 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
90 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
93 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
94 unsigned offset, enum nmk_gpio_slpm mode)
96 u32 bit = 1 << offset;
99 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
100 if (mode == NMK_GPIO_SLPM_NOCHANGE)
104 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
107 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
108 unsigned offset, enum nmk_gpio_pull pull)
110 u32 bit = 1 << offset;
113 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
114 if (pull == NMK_GPIO_PULL_NONE)
118 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
120 if (pull == NMK_GPIO_PULL_UP) {
121 nmk_chip->pull |= bit;
122 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
123 } else if (pull == NMK_GPIO_PULL_DOWN) {
124 nmk_chip->pull &= ~bit;
125 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
129 static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
132 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
135 static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
136 unsigned offset, int val)
139 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
141 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
144 static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
145 unsigned offset, int val)
147 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
148 __nmk_gpio_set_output(nmk_chip, offset, val);
151 static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
152 unsigned offset, int gpio_mode,
158 if (glitch && nmk_chip->set_ioforce) {
159 u32 bit = BIT(offset);
161 rwimsc = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
162 fwimsc = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
164 /* Prevent spurious wakeups */
165 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
166 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
168 nmk_chip->set_ioforce(true);
171 __nmk_gpio_set_mode(nmk_chip, offset, gpio_mode);
173 if (glitch && nmk_chip->set_ioforce) {
174 nmk_chip->set_ioforce(false);
176 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
177 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
181 static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
182 pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
184 static const char *afnames[] = {
185 [NMK_GPIO_ALT_GPIO] = "GPIO",
186 [NMK_GPIO_ALT_A] = "A",
187 [NMK_GPIO_ALT_B] = "B",
188 [NMK_GPIO_ALT_C] = "C"
190 static const char *pullnames[] = {
191 [NMK_GPIO_PULL_NONE] = "none",
192 [NMK_GPIO_PULL_UP] = "up",
193 [NMK_GPIO_PULL_DOWN] = "down",
194 [3] /* illegal */ = "??"
196 static const char *slpmnames[] = {
197 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
198 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
201 int pin = PIN_NUM(cfg);
202 int pull = PIN_PULL(cfg);
203 int af = PIN_ALT(cfg);
204 int slpm = PIN_SLPM(cfg);
205 int output = PIN_DIR(cfg);
206 int val = PIN_VAL(cfg);
207 bool glitch = af == NMK_GPIO_ALT_C;
209 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
210 pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
211 output ? "output " : "input",
212 output ? (val ? "high" : "low") : "");
215 int slpm_pull = PIN_SLPM_PULL(cfg);
216 int slpm_output = PIN_SLPM_DIR(cfg);
217 int slpm_val = PIN_SLPM_VAL(cfg);
219 af = NMK_GPIO_ALT_GPIO;
222 * The SLPM_* values are normal values + 1 to allow zero to
223 * mean "same as normal".
226 pull = slpm_pull - 1;
228 output = slpm_output - 1;
232 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
234 slpm_pull ? pullnames[pull] : "same",
235 slpm_output ? (output ? "output" : "input") : "same",
236 slpm_val ? (val ? "high" : "low") : "same");
240 __nmk_gpio_make_output(nmk_chip, offset, val);
242 __nmk_gpio_make_input(nmk_chip, offset);
243 __nmk_gpio_set_pull(nmk_chip, offset, pull);
247 * If we've backed up the SLPM registers (glitch workaround), modify
248 * the backups since they will be restored.
251 if (slpm == NMK_GPIO_SLPM_NOCHANGE)
252 slpmregs[nmk_chip->bank] |= BIT(offset);
254 slpmregs[nmk_chip->bank] &= ~BIT(offset);
256 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
258 __nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
262 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
263 * - Save SLPM registers
264 * - Set SLPM=0 for the IOs you want to switch and others to 1
265 * - Configure the GPIO registers for the IOs that are being switched
267 * - Modify the AFLSA/B registers for the IOs that are being switched
269 * - Restore SLPM registers
270 * - Any spurious wake up event during switch sequence to be ignored and
273 static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
277 for (i = 0; i < NUM_BANKS; i++) {
278 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
279 unsigned int temp = slpm[i];
284 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
285 writel(temp, chip->addr + NMK_GPIO_SLPC);
289 static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
293 for (i = 0; i < NUM_BANKS; i++) {
294 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
299 writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
303 static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
305 static unsigned int slpm[NUM_BANKS];
311 for (i = 0; i < num; i++) {
312 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C) {
318 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
321 memset(slpm, 0xff, sizeof(slpm));
323 for (i = 0; i < num; i++) {
324 int pin = PIN_NUM(cfgs[i]);
325 int offset = pin % NMK_GPIO_PER_CHIP;
327 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C)
328 slpm[pin / NMK_GPIO_PER_CHIP] &= ~BIT(offset);
331 nmk_gpio_glitch_slpm_init(slpm);
334 for (i = 0; i < num; i++) {
335 struct nmk_gpio_chip *nmk_chip;
336 int pin = PIN_NUM(cfgs[i]);
338 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(pin));
344 spin_lock(&nmk_chip->lock);
345 __nmk_config_pin(nmk_chip, pin - nmk_chip->chip.base,
346 cfgs[i], sleep, glitch ? slpm : NULL);
347 spin_unlock(&nmk_chip->lock);
351 nmk_gpio_glitch_slpm_restore(slpm);
353 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
359 * nmk_config_pin - configure a pin's mux attributes
360 * @cfg: pin confguration
362 * Configures a pin's mode (alternate function or GPIO), its pull up status,
363 * and its sleep mode based on the specified configuration. The @cfg is
364 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
365 * are constructed using, and can be further enhanced with, the macros in
368 * If a pin's mode is set to GPIO, it is configured as an input to avoid
369 * side-effects. The gpio can be manipulated later using standard GPIO API
372 int nmk_config_pin(pin_cfg_t cfg, bool sleep)
374 return __nmk_config_pins(&cfg, 1, sleep);
376 EXPORT_SYMBOL(nmk_config_pin);
379 * nmk_config_pins - configure several pins at once
380 * @cfgs: array of pin configurations
381 * @num: number of elments in the array
383 * Configures several pins using nmk_config_pin(). Refer to that function for
384 * further information.
386 int nmk_config_pins(pin_cfg_t *cfgs, int num)
388 return __nmk_config_pins(cfgs, num, false);
390 EXPORT_SYMBOL(nmk_config_pins);
392 int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num)
394 return __nmk_config_pins(cfgs, num, true);
396 EXPORT_SYMBOL(nmk_config_pins_sleep);
399 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
401 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
403 * Sets the sleep mode of a pin. If @mode is NMK_GPIO_SLPM_INPUT, the pin is
404 * changed to an input (with pullup/down enabled) in sleep and deep sleep. If
405 * @mode is NMK_GPIO_SLPM_NOCHANGE, the pin remains in the state it was
406 * configured even when in sleep and deep sleep.
408 * On DB8500v2 onwards, this setting loses the previous meaning and instead
409 * indicates if wakeup detection is enabled on the pin. Note that
410 * enable_irq_wake() will automatically enable wakeup detection.
412 int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
414 struct nmk_gpio_chip *nmk_chip;
417 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
421 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
422 spin_lock(&nmk_chip->lock);
424 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, mode);
426 spin_unlock(&nmk_chip->lock);
427 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
433 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
435 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
437 * Enables/disables pull up/down on a specified pin. This only takes effect if
438 * the pin is configured as an input (either explicitly or by the alternate
441 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
442 * configured as an input. Otherwise, due to the way the controller registers
443 * work, this function will change the value output on the pin.
445 int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
447 struct nmk_gpio_chip *nmk_chip;
450 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
454 spin_lock_irqsave(&nmk_chip->lock, flags);
455 __nmk_gpio_set_pull(nmk_chip, gpio - nmk_chip->chip.base, pull);
456 spin_unlock_irqrestore(&nmk_chip->lock, flags);
463 * nmk_gpio_set_mode() - set the mux mode of a gpio pin
465 * @gpio_mode: one of NMK_GPIO_ALT_GPIO, NMK_GPIO_ALT_A,
466 * NMK_GPIO_ALT_B, and NMK_GPIO_ALT_C
468 * Sets the mode of the specified pin to one of the alternate functions or
471 int nmk_gpio_set_mode(int gpio, int gpio_mode)
473 struct nmk_gpio_chip *nmk_chip;
476 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
480 spin_lock_irqsave(&nmk_chip->lock, flags);
481 __nmk_gpio_set_mode(nmk_chip, gpio - nmk_chip->chip.base, gpio_mode);
482 spin_unlock_irqrestore(&nmk_chip->lock, flags);
486 EXPORT_SYMBOL(nmk_gpio_set_mode);
488 int nmk_gpio_get_mode(int gpio)
490 struct nmk_gpio_chip *nmk_chip;
491 u32 afunc, bfunc, bit;
493 nmk_chip = get_irq_chip_data(NOMADIK_GPIO_TO_IRQ(gpio));
497 bit = 1 << (gpio - nmk_chip->chip.base);
499 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
500 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
502 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
504 EXPORT_SYMBOL(nmk_gpio_get_mode);
508 static inline int nmk_gpio_get_bitmask(int gpio)
510 return 1 << (gpio % 32);
513 static void nmk_gpio_irq_ack(struct irq_data *d)
516 struct nmk_gpio_chip *nmk_chip;
518 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
519 nmk_chip = irq_data_get_irq_chip_data(d);
522 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
525 enum nmk_gpio_irq_type {
530 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
531 int gpio, enum nmk_gpio_irq_type which,
534 u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
535 u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
536 u32 bitmask = nmk_gpio_get_bitmask(gpio);
539 /* we must individually set/clear the two edges */
540 if (nmk_chip->edge_rising & bitmask) {
541 reg = readl(nmk_chip->addr + rimsc);
546 writel(reg, nmk_chip->addr + rimsc);
548 if (nmk_chip->edge_falling & bitmask) {
549 reg = readl(nmk_chip->addr + fimsc);
554 writel(reg, nmk_chip->addr + fimsc);
558 static int nmk_gpio_irq_modify(struct irq_data *d, enum nmk_gpio_irq_type which,
562 struct nmk_gpio_chip *nmk_chip;
566 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
567 nmk_chip = irq_data_get_irq_chip_data(d);
568 bitmask = nmk_gpio_get_bitmask(gpio);
572 spin_lock_irqsave(&nmk_chip->lock, flags);
573 __nmk_gpio_irq_modify(nmk_chip, gpio, which, enable);
574 spin_unlock_irqrestore(&nmk_chip->lock, flags);
579 static void nmk_gpio_irq_mask(struct irq_data *d)
581 nmk_gpio_irq_modify(d, NORMAL, false);
584 static void nmk_gpio_irq_unmask(struct irq_data *d)
586 nmk_gpio_irq_modify(d, NORMAL, true);
589 static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
591 struct nmk_gpio_chip *nmk_chip;
595 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
596 nmk_chip = irq_data_get_irq_chip_data(d);
600 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
601 spin_lock(&nmk_chip->lock);
603 #ifdef CONFIG_ARCH_U8500
604 if (cpu_is_u8500v2()) {
605 __nmk_gpio_set_slpm(nmk_chip, gpio,
606 on ? NMK_GPIO_SLPM_WAKEUP_ENABLE
607 : NMK_GPIO_SLPM_WAKEUP_DISABLE);
610 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
612 spin_unlock(&nmk_chip->lock);
613 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
618 static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
620 struct irq_desc *desc = irq_to_desc(d->irq);
621 bool enabled = !(desc->status & IRQ_DISABLED);
622 bool wake = desc->wake_depth;
624 struct nmk_gpio_chip *nmk_chip;
628 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
629 nmk_chip = irq_data_get_irq_chip_data(d);
630 bitmask = nmk_gpio_get_bitmask(gpio);
634 if (type & IRQ_TYPE_LEVEL_HIGH)
636 if (type & IRQ_TYPE_LEVEL_LOW)
639 spin_lock_irqsave(&nmk_chip->lock, flags);
642 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
645 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
647 nmk_chip->edge_rising &= ~bitmask;
648 if (type & IRQ_TYPE_EDGE_RISING)
649 nmk_chip->edge_rising |= bitmask;
651 nmk_chip->edge_falling &= ~bitmask;
652 if (type & IRQ_TYPE_EDGE_FALLING)
653 nmk_chip->edge_falling |= bitmask;
656 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
659 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
661 spin_unlock_irqrestore(&nmk_chip->lock, flags);
666 static struct irq_chip nmk_gpio_irq_chip = {
667 .name = "Nomadik-GPIO",
668 .irq_ack = nmk_gpio_irq_ack,
669 .irq_mask = nmk_gpio_irq_mask,
670 .irq_unmask = nmk_gpio_irq_unmask,
671 .irq_set_type = nmk_gpio_irq_set_type,
672 .irq_set_wake = nmk_gpio_irq_set_wake,
675 static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
678 struct nmk_gpio_chip *nmk_chip;
679 struct irq_chip *host_chip = get_irq_chip(irq);
680 unsigned int first_irq;
682 if (host_chip->irq_mask_ack)
683 host_chip->irq_mask_ack(&desc->irq_data);
685 host_chip->irq_mask(&desc->irq_data);
686 if (host_chip->irq_ack)
687 host_chip->irq_ack(&desc->irq_data);
690 nmk_chip = get_irq_data(irq);
691 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
693 int bit = __ffs(status);
695 generic_handle_irq(first_irq + bit);
699 host_chip->irq_unmask(&desc->irq_data);
702 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
704 struct nmk_gpio_chip *nmk_chip = get_irq_data(irq);
705 u32 status = readl(nmk_chip->addr + NMK_GPIO_IS);
707 __nmk_gpio_irq_handler(irq, desc, status);
710 static void nmk_gpio_secondary_irq_handler(unsigned int irq,
711 struct irq_desc *desc)
713 struct nmk_gpio_chip *nmk_chip = get_irq_data(irq);
714 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
716 __nmk_gpio_irq_handler(irq, desc, status);
719 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
721 unsigned int first_irq;
724 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
725 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
726 set_irq_chip(i, &nmk_gpio_irq_chip);
727 set_irq_handler(i, handle_edge_irq);
728 set_irq_flags(i, IRQF_VALID);
729 set_irq_chip_data(i, nmk_chip);
730 set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
733 set_irq_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
734 set_irq_data(nmk_chip->parent_irq, nmk_chip);
736 if (nmk_chip->secondary_parent_irq >= 0) {
737 set_irq_chained_handler(nmk_chip->secondary_parent_irq,
738 nmk_gpio_secondary_irq_handler);
739 set_irq_data(nmk_chip->secondary_parent_irq, nmk_chip);
746 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
748 struct nmk_gpio_chip *nmk_chip =
749 container_of(chip, struct nmk_gpio_chip, chip);
751 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
755 static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
757 struct nmk_gpio_chip *nmk_chip =
758 container_of(chip, struct nmk_gpio_chip, chip);
759 u32 bit = 1 << offset;
761 return (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
764 static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
767 struct nmk_gpio_chip *nmk_chip =
768 container_of(chip, struct nmk_gpio_chip, chip);
770 __nmk_gpio_set_output(nmk_chip, offset, val);
773 static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
776 struct nmk_gpio_chip *nmk_chip =
777 container_of(chip, struct nmk_gpio_chip, chip);
779 __nmk_gpio_make_output(nmk_chip, offset, val);
784 static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
786 struct nmk_gpio_chip *nmk_chip =
787 container_of(chip, struct nmk_gpio_chip, chip);
789 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
792 #ifdef CONFIG_DEBUG_FS
794 #include <linux/seq_file.h>
796 static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
800 unsigned gpio = chip->base;
802 struct nmk_gpio_chip *nmk_chip =
803 container_of(chip, struct nmk_gpio_chip, chip);
804 const char *modes[] = {
805 [NMK_GPIO_ALT_GPIO] = "gpio",
806 [NMK_GPIO_ALT_A] = "altA",
807 [NMK_GPIO_ALT_B] = "altB",
808 [NMK_GPIO_ALT_C] = "altC",
811 for (i = 0; i < chip->ngpio; i++, gpio++) {
812 const char *label = gpiochip_is_requested(chip, i);
819 is_out = readl(nmk_chip->addr + NMK_GPIO_DIR) & bit;
820 pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
821 mode = nmk_gpio_get_mode(gpio);
822 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
824 is_out ? "out" : "in ",
826 ? (chip->get(chip, i) ? "hi" : "lo")
828 (mode < 0) ? "unknown" : modes[mode],
829 pull ? "pull" : "none");
832 int irq = gpio_to_irq(gpio);
833 struct irq_desc *desc = irq_to_desc(irq);
835 /* This races with request_irq(), set_irq_type(),
836 * and set_irq_wake() ... but those are "rare".
838 * More significantly, trigger type flags aren't
839 * currently maintained by genirq.
841 if (irq >= 0 && desc->action) {
844 switch (desc->status & IRQ_TYPE_SENSE_MASK) {
846 trigger = "(default)";
848 case IRQ_TYPE_EDGE_FALLING:
849 trigger = "edge-falling";
851 case IRQ_TYPE_EDGE_RISING:
852 trigger = "edge-rising";
854 case IRQ_TYPE_EDGE_BOTH:
855 trigger = "edge-both";
857 case IRQ_TYPE_LEVEL_HIGH:
858 trigger = "level-high";
860 case IRQ_TYPE_LEVEL_LOW:
861 trigger = "level-low";
864 trigger = "?trigger?";
868 seq_printf(s, " irq-%d %s%s",
870 (desc->status & IRQ_WAKEUP)
880 #define nmk_gpio_dbg_show NULL
883 /* This structure is replicated for each GPIO block allocated at probe time */
884 static struct gpio_chip nmk_gpio_template = {
885 .direction_input = nmk_gpio_make_input,
886 .get = nmk_gpio_get_input,
887 .direction_output = nmk_gpio_make_output,
888 .set = nmk_gpio_set_output,
889 .to_irq = nmk_gpio_to_irq,
890 .dbg_show = nmk_gpio_dbg_show,
894 static int __devinit nmk_gpio_probe(struct platform_device *dev)
896 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
897 struct nmk_gpio_chip *nmk_chip;
898 struct gpio_chip *chip;
899 struct resource *res;
908 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
914 irq = platform_get_irq(dev, 0);
920 secondary_irq = platform_get_irq(dev, 1);
921 if (secondary_irq >= 0 && !pdata->get_secondary_status) {
926 if (request_mem_region(res->start, resource_size(res),
927 dev_name(&dev->dev)) == NULL) {
932 clk = clk_get(&dev->dev, NULL);
940 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
946 * The virt address in nmk_chip->addr is in the nomadik register space,
947 * so we can simply convert the resource address, without remapping
949 nmk_chip->bank = dev->id;
951 nmk_chip->addr = io_p2v(res->start);
952 nmk_chip->chip = nmk_gpio_template;
953 nmk_chip->parent_irq = irq;
954 nmk_chip->secondary_parent_irq = secondary_irq;
955 nmk_chip->get_secondary_status = pdata->get_secondary_status;
956 nmk_chip->set_ioforce = pdata->set_ioforce;
957 spin_lock_init(&nmk_chip->lock);
959 chip = &nmk_chip->chip;
960 chip->base = pdata->first_gpio;
961 chip->ngpio = pdata->num_gpio;
962 chip->label = pdata->name ?: dev_name(&dev->dev);
963 chip->dev = &dev->dev;
964 chip->owner = THIS_MODULE;
966 ret = gpiochip_add(&nmk_chip->chip);
970 BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
972 nmk_gpio_chips[nmk_chip->bank] = nmk_chip;
973 platform_set_drvdata(dev, nmk_chip);
975 nmk_gpio_init_irq(nmk_chip);
977 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
978 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
987 release_mem_region(res->start, resource_size(res));
989 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
990 pdata->first_gpio, pdata->first_gpio+31);
994 #ifdef CONFIG_NOMADIK_GPIO_PM
995 static int nmk_gpio_pm(struct platform_device *dev, bool suspend)
997 struct nmk_gpio_chip *nmk_chip = platform_get_drvdata(dev);
1002 for (i = 0; i < ARRAY_SIZE(backup_regs); i++) {
1004 nmk_chip->backup[i] = readl(nmk_chip->addr +
1007 writel(nmk_chip->backup[i],
1008 nmk_chip->addr + backup_regs[i]);
1013 * Restore pull-up and pull-down on inputs and
1016 dir = readl(nmk_chip->addr + NMK_GPIO_DIR);
1017 dat = readl(nmk_chip->addr + NMK_GPIO_DAT);
1019 writel((nmk_chip->pull & ~dir) |
1021 nmk_chip->addr + NMK_GPIO_DATS);
1023 writel((~nmk_chip->pull & ~dir) |
1025 nmk_chip->addr + NMK_GPIO_DATC);
1030 static int nmk_gpio_suspend(struct platform_device *dev, pm_message_t state)
1032 return nmk_gpio_pm(dev, true);
1035 static int nmk_gpio_resume(struct platform_device *dev)
1037 return nmk_gpio_pm(dev, false);
1040 #define nmk_gpio_suspend NULL
1041 #define nmk_gpio_resume NULL
1044 static struct platform_driver nmk_gpio_driver = {
1046 .owner = THIS_MODULE,
1049 .probe = nmk_gpio_probe,
1050 .suspend = nmk_gpio_suspend,
1051 .resume = nmk_gpio_resume,
1054 static int __init nmk_gpio_init(void)
1056 return platform_driver_register(&nmk_gpio_driver);
1059 core_initcall(nmk_gpio_init);
1061 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
1062 MODULE_DESCRIPTION("Nomadik GPIO Driver");
1063 MODULE_LICENSE("GPL");