1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/flush.c
5 * Copyright (C) 1995-2002 Russell King
7 #include <linux/module.h>
9 #include <linux/pagemap.h>
10 #include <linux/highmem.h>
12 #include <asm/cacheflush.h>
13 #include <asm/cachetype.h>
14 #include <asm/highmem.h>
15 #include <asm/smp_plat.h>
16 #include <asm/tlbflush.h>
17 #include <linux/hugetlb.h>
21 #ifdef CONFIG_ARM_HEAVY_MB
24 void arm_heavy_mb(void)
26 #ifdef CONFIG_OUTER_CACHE_SYNC
33 EXPORT_SYMBOL(arm_heavy_mb);
36 #ifdef CONFIG_CPU_CACHE_VIPT
38 static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
40 unsigned long to = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
43 set_top_pte(to, pfn_pte(pfn, PAGE_KERNEL));
45 asm( "mcrr p15, 0, %1, %0, c14\n"
46 " mcr p15, 0, %2, c7, c10, 4"
48 : "r" (to), "r" (to + PAGE_SIZE - 1), "r" (zero)
52 static void flush_icache_alias(unsigned long pfn, unsigned long vaddr, unsigned long len)
54 unsigned long va = FLUSH_ALIAS_START + (CACHE_COLOUR(vaddr) << PAGE_SHIFT);
55 unsigned long offset = vaddr & (PAGE_SIZE - 1);
58 set_top_pte(va, pfn_pte(pfn, PAGE_KERNEL));
60 flush_icache_range(to, to + len);
63 void flush_cache_mm(struct mm_struct *mm)
65 if (cache_is_vivt()) {
66 vivt_flush_cache_mm(mm);
70 if (cache_is_vipt_aliasing()) {
71 asm( "mcr p15, 0, %0, c7, c14, 0\n"
72 " mcr p15, 0, %0, c7, c10, 4"
79 void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
81 if (cache_is_vivt()) {
82 vivt_flush_cache_range(vma, start, end);
86 if (cache_is_vipt_aliasing()) {
87 asm( "mcr p15, 0, %0, c7, c14, 0\n"
88 " mcr p15, 0, %0, c7, c10, 4"
94 if (vma->vm_flags & VM_EXEC)
98 void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
100 if (cache_is_vivt()) {
101 vivt_flush_cache_page(vma, user_addr, pfn);
105 if (cache_is_vipt_aliasing()) {
106 flush_pfn_alias(pfn, user_addr);
107 __flush_icache_all();
110 if (vma->vm_flags & VM_EXEC && icache_is_vivt_asid_tagged())
111 __flush_icache_all();
115 #define flush_pfn_alias(pfn,vaddr) do { } while (0)
116 #define flush_icache_alias(pfn,vaddr,len) do { } while (0)
119 #define FLAG_PA_IS_EXEC 1
120 #define FLAG_PA_CORE_IN_MM 2
122 static void flush_ptrace_access_other(void *args)
124 __flush_icache_all();
128 void __flush_ptrace_access(struct page *page, unsigned long uaddr, void *kaddr,
129 unsigned long len, unsigned int flags)
131 if (cache_is_vivt()) {
132 if (flags & FLAG_PA_CORE_IN_MM) {
133 unsigned long addr = (unsigned long)kaddr;
134 __cpuc_coherent_kern_range(addr, addr + len);
139 if (cache_is_vipt_aliasing()) {
140 flush_pfn_alias(page_to_pfn(page), uaddr);
141 __flush_icache_all();
145 /* VIPT non-aliasing D-cache */
146 if (flags & FLAG_PA_IS_EXEC) {
147 unsigned long addr = (unsigned long)kaddr;
148 if (icache_is_vipt_aliasing())
149 flush_icache_alias(page_to_pfn(page), uaddr, len);
151 __cpuc_coherent_kern_range(addr, addr + len);
152 if (cache_ops_need_broadcast())
153 smp_call_function(flush_ptrace_access_other,
159 void flush_ptrace_access(struct vm_area_struct *vma, struct page *page,
160 unsigned long uaddr, void *kaddr, unsigned long len)
162 unsigned int flags = 0;
163 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm)))
164 flags |= FLAG_PA_CORE_IN_MM;
165 if (vma->vm_flags & VM_EXEC)
166 flags |= FLAG_PA_IS_EXEC;
167 __flush_ptrace_access(page, uaddr, kaddr, len, flags);
170 void flush_uprobe_xol_access(struct page *page, unsigned long uaddr,
171 void *kaddr, unsigned long len)
173 unsigned int flags = FLAG_PA_CORE_IN_MM|FLAG_PA_IS_EXEC;
175 __flush_ptrace_access(page, uaddr, kaddr, len, flags);
179 * Copy user data from/to a page which is mapped into a different
180 * processes address space. Really, we want to allow our "user
181 * space" model to handle this.
183 * Note that this code needs to run on the current CPU.
185 void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
186 unsigned long uaddr, void *dst, const void *src,
192 memcpy(dst, src, len);
193 flush_ptrace_access(vma, page, uaddr, dst, len);
199 void __flush_dcache_page(struct address_space *mapping, struct page *page)
202 * Writeback any data associated with the kernel mapping of this
203 * page. This ensures that data in the physical page is mutually
204 * coherent with the kernels mapping.
206 if (!PageHighMem(page)) {
207 __cpuc_flush_dcache_area(page_address(page), page_size(page));
210 if (cache_is_vipt_nonaliasing()) {
211 for (i = 0; i < compound_nr(page); i++) {
212 void *addr = kmap_atomic(page + i);
213 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
217 for (i = 0; i < compound_nr(page); i++) {
218 void *addr = kmap_high_get(page + i);
220 __cpuc_flush_dcache_area(addr, PAGE_SIZE);
221 kunmap_high(page + i);
228 * If this is a page cache page, and we have an aliasing VIPT cache,
229 * we only need to do one flush - which would be at the relevant
230 * userspace colour, which is congruent with page->index.
232 if (mapping && cache_is_vipt_aliasing())
233 flush_pfn_alias(page_to_pfn(page),
234 page->index << PAGE_SHIFT);
237 static void __flush_dcache_aliases(struct address_space *mapping, struct page *page)
239 struct mm_struct *mm = current->active_mm;
240 struct vm_area_struct *mpnt;
244 * There are possible user space mappings of this page:
245 * - VIVT cache: we need to also write back and invalidate all user
246 * data in the current VM view associated with this page.
247 * - aliasing VIPT: we only need to find one mapping of this page.
251 flush_dcache_mmap_lock(mapping);
252 vma_interval_tree_foreach(mpnt, &mapping->i_mmap, pgoff, pgoff) {
253 unsigned long offset;
256 * If this VMA is not in our MM, we can ignore it.
258 if (mpnt->vm_mm != mm)
260 if (!(mpnt->vm_flags & VM_MAYSHARE))
262 offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
263 flush_cache_page(mpnt, mpnt->vm_start + offset, page_to_pfn(page));
265 flush_dcache_mmap_unlock(mapping);
268 #if __LINUX_ARM_ARCH__ >= 6
269 void __sync_icache_dcache(pte_t pteval)
273 struct address_space *mapping;
275 if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
276 /* only flush non-aliasing VIPT caches for exec mappings */
278 pfn = pte_pfn(pteval);
282 page = pfn_to_page(pfn);
283 if (cache_is_vipt_aliasing())
284 mapping = page_mapping_file(page);
288 if (!test_and_set_bit(PG_dcache_clean, &page->flags))
289 __flush_dcache_page(mapping, page);
291 if (pte_exec(pteval))
292 __flush_icache_all();
297 * Ensure cache coherency between kernel mapping and userspace mapping
300 * We have three cases to consider:
301 * - VIPT non-aliasing cache: fully coherent so nothing required.
302 * - VIVT: fully aliasing, so we need to handle every alias in our
304 * - VIPT aliasing: need to handle one alias in our current VM view.
306 * If we need to handle aliasing:
307 * If the page only exists in the page cache and there are no user
308 * space mappings, we can be lazy and remember that we may have dirty
309 * kernel cache lines for later. Otherwise, we assume we have
312 * Note that we disable the lazy flush for SMP configurations where
313 * the cache maintenance operations are not automatically broadcasted.
315 void flush_dcache_page(struct page *page)
317 struct address_space *mapping;
320 * The zero page is never written to, so never has any dirty
321 * cache lines, and therefore never needs to be flushed.
323 if (page == ZERO_PAGE(0))
326 if (!cache_ops_need_broadcast() && cache_is_vipt_nonaliasing()) {
327 if (test_bit(PG_dcache_clean, &page->flags))
328 clear_bit(PG_dcache_clean, &page->flags);
332 mapping = page_mapping_file(page);
334 if (!cache_ops_need_broadcast() &&
335 mapping && !page_mapcount(page))
336 clear_bit(PG_dcache_clean, &page->flags);
338 __flush_dcache_page(mapping, page);
339 if (mapping && cache_is_vivt())
340 __flush_dcache_aliases(mapping, page);
342 __flush_icache_all();
343 set_bit(PG_dcache_clean, &page->flags);
346 EXPORT_SYMBOL(flush_dcache_page);
349 * Flush an anonymous page so that users of get_user_pages()
350 * can safely access the data. The expected sequence is:
354 * memcpy() to/from page
355 * if written to page, flush_dcache_page()
357 void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr);
358 void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vmaddr)
362 /* VIPT non-aliasing caches need do nothing */
363 if (cache_is_vipt_nonaliasing())
367 * Write back and invalidate userspace mapping.
369 pfn = page_to_pfn(page);
370 if (cache_is_vivt()) {
371 flush_cache_page(vma, vmaddr, pfn);
374 * For aliasing VIPT, we can flush an alias of the
375 * userspace address only.
377 flush_pfn_alias(pfn, vmaddr);
378 __flush_icache_all();
382 * Invalidate kernel mapping. No data should be contained
383 * in this mapping of the page. FIXME: this is overkill
384 * since we actually ask for a write-back and invalidate.
386 __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);