2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/highmem.h>
21 #include <linux/slab.h>
23 #include <asm/memory.h>
24 #include <asm/highmem.h>
25 #include <asm/cacheflush.h>
26 #include <asm/tlbflush.h>
27 #include <asm/sizes.h>
28 #include <asm/mach/arch.h>
33 * The DMA API is built upon the notion of "buffer ownership". A buffer
34 * is either exclusively owned by the CPU (and therefore may be accessed
35 * by it) or exclusively owned by the DMA device. These helper functions
36 * represent the transitions between these two ownership states.
38 * Note, however, that on later ARMs, this notion does not work due to
39 * speculative prefetches. We model our approach on the assumption that
40 * the CPU does do speculative prefetches, which means we clean caches
41 * before transfers and delay cache invalidation until transfer completion.
44 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
45 size_t, enum dma_data_direction);
46 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
47 size_t, enum dma_data_direction);
50 * arm_dma_map_page - map a portion of a page for streaming DMA
51 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
52 * @page: page that buffer resides in
53 * @offset: offset into page for start of buffer
54 * @size: size of buffer to map
55 * @dir: DMA transfer direction
57 * Ensure that any data held in the cache is appropriately discarded
60 * The device owns this memory once this call has completed. The CPU
61 * can regain ownership by calling dma_unmap_page().
63 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
64 unsigned long offset, size_t size, enum dma_data_direction dir,
65 struct dma_attrs *attrs)
67 if (!arch_is_coherent())
68 __dma_page_cpu_to_dev(page, offset, size, dir);
69 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
73 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
74 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
75 * @handle: DMA address of buffer
76 * @size: size of buffer (same as passed to dma_map_page)
77 * @dir: DMA transfer direction (same as passed to dma_map_page)
79 * Unmap a page streaming mode DMA translation. The handle and size
80 * must match what was provided in the previous dma_map_page() call.
81 * All other usages are undefined.
83 * After this call, reads by the CPU to the buffer are guaranteed to see
84 * whatever the device wrote there.
86 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
87 size_t size, enum dma_data_direction dir,
88 struct dma_attrs *attrs)
90 if (!arch_is_coherent())
91 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
92 handle & ~PAGE_MASK, size, dir);
95 static void arm_dma_sync_single_for_cpu(struct device *dev,
96 dma_addr_t handle, size_t size, enum dma_data_direction dir)
98 unsigned int offset = handle & (PAGE_SIZE - 1);
99 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
100 if (!arch_is_coherent())
101 __dma_page_dev_to_cpu(page, offset, size, dir);
104 static void arm_dma_sync_single_for_device(struct device *dev,
105 dma_addr_t handle, size_t size, enum dma_data_direction dir)
107 unsigned int offset = handle & (PAGE_SIZE - 1);
108 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
109 if (!arch_is_coherent())
110 __dma_page_cpu_to_dev(page, offset, size, dir);
113 static int arm_dma_set_mask(struct device *dev, u64 dma_mask);
115 struct dma_map_ops arm_dma_ops = {
116 .map_page = arm_dma_map_page,
117 .unmap_page = arm_dma_unmap_page,
118 .map_sg = arm_dma_map_sg,
119 .unmap_sg = arm_dma_unmap_sg,
120 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
121 .sync_single_for_device = arm_dma_sync_single_for_device,
122 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
123 .sync_sg_for_device = arm_dma_sync_sg_for_device,
124 .set_dma_mask = arm_dma_set_mask,
126 EXPORT_SYMBOL(arm_dma_ops);
128 static u64 get_coherent_dma_mask(struct device *dev)
130 u64 mask = (u64)arm_dma_limit;
133 mask = dev->coherent_dma_mask;
136 * Sanity check the DMA mask - it must be non-zero, and
137 * must be able to be satisfied by a DMA allocation.
140 dev_warn(dev, "coherent DMA mask is unset\n");
144 if ((~mask) & (u64)arm_dma_limit) {
145 dev_warn(dev, "coherent DMA mask %#llx is smaller "
146 "than system GFP_DMA mask %#llx\n",
147 mask, (u64)arm_dma_limit);
156 * Allocate a DMA buffer for 'dev' of size 'size' using the
157 * specified gfp mask. Note that 'size' must be page aligned.
159 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
161 unsigned long order = get_order(size);
162 struct page *page, *p, *e;
164 u64 mask = get_coherent_dma_mask(dev);
166 #ifdef CONFIG_DMA_API_DEBUG
167 u64 limit = (mask + 1) & ~mask;
168 if (limit && size >= limit) {
169 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
178 if (mask < 0xffffffffULL)
181 page = alloc_pages(gfp, order);
186 * Now split the huge page and free the excess pages
188 split_page(page, order);
189 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
193 * Ensure that the allocated pages are zeroed, and that any data
194 * lurking in the kernel direct-mapped region is invalidated.
196 ptr = page_address(page);
197 memset(ptr, 0, size);
198 dmac_flush_range(ptr, ptr + size);
199 outer_flush_range(__pa(ptr), __pa(ptr) + size);
205 * Free a DMA buffer. 'size' must be page aligned.
207 static void __dma_free_buffer(struct page *page, size_t size)
209 struct page *e = page + (size >> PAGE_SHIFT);
219 #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT)
220 #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT)
223 * These are the page tables (2MB each) covering uncached, DMA consistent allocations
225 static pte_t **consistent_pte;
227 #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
229 unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
231 void __init init_consistent_dma_size(unsigned long size)
233 unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M);
235 BUG_ON(consistent_pte); /* Check we're called before DMA region init */
236 BUG_ON(base < VMALLOC_END);
238 /* Grow region to accommodate specified size */
239 if (base < consistent_base)
240 consistent_base = base;
243 #include "vmregion.h"
245 static struct arm_vmregion_head consistent_head = {
246 .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
247 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
248 .vm_end = CONSISTENT_END,
251 #ifdef CONFIG_HUGETLB_PAGE
252 #error ARM Coherent DMA allocator does not (yet) support huge TLB
256 * Initialise the consistent memory allocation.
258 static int __init consistent_init(void)
266 unsigned long base = consistent_base;
267 unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
269 consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
270 if (!consistent_pte) {
271 pr_err("%s: no memory\n", __func__);
275 pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END);
276 consistent_head.vm_start = base;
279 pgd = pgd_offset(&init_mm, base);
281 pud = pud_alloc(&init_mm, pgd, base);
283 pr_err("%s: no pud tables\n", __func__);
288 pmd = pmd_alloc(&init_mm, pud, base);
290 pr_err("%s: no pmd tables\n", __func__);
294 WARN_ON(!pmd_none(*pmd));
296 pte = pte_alloc_kernel(pmd, base);
298 pr_err("%s: no pte tables\n", __func__);
303 consistent_pte[i++] = pte;
305 } while (base < CONSISTENT_END);
310 core_initcall(consistent_init);
313 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
316 struct arm_vmregion *c;
320 if (!consistent_pte) {
321 pr_err("%s: not initialised\n", __func__);
327 * Align the virtual region allocation - maximum alignment is
328 * a section size, minimum is a page size. This helps reduce
329 * fragmentation of the DMA space, and also prevents allocations
330 * smaller than a section from crossing a section boundary.
333 if (bit > SECTION_SHIFT)
338 * Allocate a virtual address in the consistent mapping region.
340 c = arm_vmregion_alloc(&consistent_head, align, size,
341 gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller);
344 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
345 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
347 pte = consistent_pte[idx] + off;
351 BUG_ON(!pte_none(*pte));
353 set_pte_ext(pte, mk_pte(page, prot), 0);
357 if (off >= PTRS_PER_PTE) {
359 pte = consistent_pte[++idx];
361 } while (size -= PAGE_SIZE);
365 return (void *)c->vm_start;
370 static void __dma_free_remap(void *cpu_addr, size_t size)
372 struct arm_vmregion *c;
378 c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
380 pr_err("%s: trying to free invalid coherent area: %p\n",
386 if ((c->vm_end - c->vm_start) != size) {
387 pr_err("%s: freeing wrong coherent size (%ld != %d)\n",
388 __func__, c->vm_end - c->vm_start, size);
390 size = c->vm_end - c->vm_start;
393 idx = CONSISTENT_PTE_INDEX(c->vm_start);
394 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
395 ptep = consistent_pte[idx] + off;
398 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
403 if (off >= PTRS_PER_PTE) {
405 ptep = consistent_pte[++idx];
408 if (pte_none(pte) || !pte_present(pte))
409 pr_crit("%s: bad page in kernel page table\n",
411 } while (size -= PAGE_SIZE);
413 flush_tlb_kernel_range(c->vm_start, c->vm_end);
415 arm_vmregion_free(&consistent_head, c);
418 #else /* !CONFIG_MMU */
420 #define __dma_alloc_remap(page, size, gfp, prot, c) page_address(page)
421 #define __dma_free_remap(addr, size) do { } while (0)
423 #endif /* CONFIG_MMU */
426 __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
427 pgprot_t prot, const void *caller)
433 * Following is a work-around (a.k.a. hack) to prevent pages
434 * with __GFP_COMP being passed to split_page() which cannot
435 * handle them. The real problem is that this flag probably
436 * should be 0 on ARM as it is not supported on this
437 * platform; see CONFIG_HUGETLBFS.
439 gfp &= ~(__GFP_COMP);
441 *handle = DMA_ERROR_CODE;
442 size = PAGE_ALIGN(size);
444 page = __dma_alloc_buffer(dev, size, gfp);
448 if (!arch_is_coherent())
449 addr = __dma_alloc_remap(page, size, gfp, prot, caller);
451 addr = page_address(page);
454 *handle = pfn_to_dma(dev, page_to_pfn(page));
456 __dma_free_buffer(page, size);
462 * Allocate DMA-coherent memory space and return both the kernel remapped
463 * virtual and bus address for that space.
466 dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
470 if (dma_alloc_from_coherent(dev, size, handle, &memory))
473 return __dma_alloc(dev, size, handle, gfp,
474 pgprot_dmacoherent(pgprot_kernel),
475 __builtin_return_address(0));
477 EXPORT_SYMBOL(dma_alloc_coherent);
480 * Allocate a writecombining region, in much the same way as
481 * dma_alloc_coherent above.
484 dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
486 return __dma_alloc(dev, size, handle, gfp,
487 pgprot_writecombine(pgprot_kernel),
488 __builtin_return_address(0));
490 EXPORT_SYMBOL(dma_alloc_writecombine);
492 static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
493 void *cpu_addr, dma_addr_t dma_addr, size_t size)
497 unsigned long user_size, kern_size;
498 struct arm_vmregion *c;
500 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
503 user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
505 c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
507 unsigned long off = vma->vm_pgoff;
509 kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
511 if (off < kern_size &&
512 user_size <= (kern_size - off)) {
513 ret = remap_pfn_range(vma, vma->vm_start,
514 page_to_pfn(c->vm_pages) + off,
515 user_size << PAGE_SHIFT,
519 #endif /* CONFIG_MMU */
524 int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
525 void *cpu_addr, dma_addr_t dma_addr, size_t size)
527 vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
528 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
530 EXPORT_SYMBOL(dma_mmap_coherent);
532 int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
533 void *cpu_addr, dma_addr_t dma_addr, size_t size)
535 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
536 return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
538 EXPORT_SYMBOL(dma_mmap_writecombine);
541 * free a page as defined by the above mapping.
542 * Must not be called with IRQs disabled.
544 void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
546 WARN_ON(irqs_disabled());
548 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
551 size = PAGE_ALIGN(size);
553 if (!arch_is_coherent())
554 __dma_free_remap(cpu_addr, size);
556 __dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size);
558 EXPORT_SYMBOL(dma_free_coherent);
560 static void dma_cache_maint_page(struct page *page, unsigned long offset,
561 size_t size, enum dma_data_direction dir,
562 void (*op)(const void *, size_t, int))
565 * A single sg entry may refer to multiple physically contiguous
566 * pages. But we still need to process highmem pages individually.
567 * If highmem is not configured then the bulk of this loop gets
575 if (PageHighMem(page)) {
576 if (len + offset > PAGE_SIZE) {
577 if (offset >= PAGE_SIZE) {
578 page += offset / PAGE_SIZE;
581 len = PAGE_SIZE - offset;
583 vaddr = kmap_high_get(page);
588 } else if (cache_is_vipt()) {
589 /* unmapped pages might still be cached */
590 vaddr = kmap_atomic(page);
591 op(vaddr + offset, len, dir);
592 kunmap_atomic(vaddr);
595 vaddr = page_address(page) + offset;
605 * Make an area consistent for devices.
606 * Note: Drivers should NOT use this function directly, as it will break
607 * platforms with CONFIG_DMABOUNCE.
608 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
610 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
611 size_t size, enum dma_data_direction dir)
615 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
617 paddr = page_to_phys(page) + off;
618 if (dir == DMA_FROM_DEVICE) {
619 outer_inv_range(paddr, paddr + size);
621 outer_clean_range(paddr, paddr + size);
623 /* FIXME: non-speculating: flush on bidirectional mappings? */
626 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
627 size_t size, enum dma_data_direction dir)
629 unsigned long paddr = page_to_phys(page) + off;
631 /* FIXME: non-speculating: not required */
632 /* don't bother invalidating if DMA to device */
633 if (dir != DMA_TO_DEVICE)
634 outer_inv_range(paddr, paddr + size);
636 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
639 * Mark the D-cache clean for this page to avoid extra flushing.
641 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
642 set_bit(PG_dcache_clean, &page->flags);
646 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
647 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
648 * @sg: list of buffers
649 * @nents: number of buffers to map
650 * @dir: DMA transfer direction
652 * Map a set of buffers described by scatterlist in streaming mode for DMA.
653 * This is the scatter-gather version of the dma_map_single interface.
654 * Here the scatter gather list elements are each tagged with the
655 * appropriate dma address and length. They are obtained via
656 * sg_dma_{address,length}.
658 * Device ownership issues as mentioned for dma_map_single are the same
661 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
662 enum dma_data_direction dir, struct dma_attrs *attrs)
664 struct dma_map_ops *ops = get_dma_ops(dev);
665 struct scatterlist *s;
668 for_each_sg(sg, s, nents, i) {
669 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
670 s->length, dir, attrs);
671 if (dma_mapping_error(dev, s->dma_address))
677 for_each_sg(sg, s, i, j)
678 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
683 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
684 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
685 * @sg: list of buffers
686 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
687 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
689 * Unmap a set of streaming mode DMA translations. Again, CPU access
690 * rules concerning calls here are the same as for dma_unmap_single().
692 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
693 enum dma_data_direction dir, struct dma_attrs *attrs)
695 struct dma_map_ops *ops = get_dma_ops(dev);
696 struct scatterlist *s;
700 for_each_sg(sg, s, nents, i)
701 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
705 * arm_dma_sync_sg_for_cpu
706 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
707 * @sg: list of buffers
708 * @nents: number of buffers to map (returned from dma_map_sg)
709 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
711 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
712 int nents, enum dma_data_direction dir)
714 struct dma_map_ops *ops = get_dma_ops(dev);
715 struct scatterlist *s;
718 for_each_sg(sg, s, nents, i)
719 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
724 * arm_dma_sync_sg_for_device
725 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
726 * @sg: list of buffers
727 * @nents: number of buffers to map (returned from dma_map_sg)
728 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
730 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
731 int nents, enum dma_data_direction dir)
733 struct dma_map_ops *ops = get_dma_ops(dev);
734 struct scatterlist *s;
737 for_each_sg(sg, s, nents, i)
738 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
743 * Return whether the given device DMA address mask can be supported
744 * properly. For example, if your device can only drive the low 24-bits
745 * during bus mastering, then you would pass 0x00ffffff as the mask
748 int dma_supported(struct device *dev, u64 mask)
750 if (mask < (u64)arm_dma_limit)
754 EXPORT_SYMBOL(dma_supported);
756 static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
758 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
761 *dev->dma_mask = dma_mask;
766 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
768 static int __init dma_debug_do_init(void)
771 arm_vmregion_create_proc("dma-mappings", &consistent_head);
773 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
776 fs_initcall(dma_debug_do_init);