1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mm/dma-mapping.c
5 * Copyright (C) 2000-2004 Russell King
7 * DMA uncached mapping support.
9 #include <linux/module.h>
11 #include <linux/genalloc.h>
12 #include <linux/gfp.h>
13 #include <linux/errno.h>
14 #include <linux/list.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/dma-direct.h>
18 #include <linux/dma-map-ops.h>
19 #include <linux/highmem.h>
20 #include <linux/memblock.h>
21 #include <linux/slab.h>
22 #include <linux/iommu.h>
24 #include <linux/vmalloc.h>
25 #include <linux/sizes.h>
26 #include <linux/cma.h>
28 #include <asm/memory.h>
29 #include <asm/highmem.h>
30 #include <asm/cacheflush.h>
31 #include <asm/tlbflush.h>
32 #include <asm/mach/arch.h>
33 #include <asm/dma-iommu.h>
34 #include <asm/mach/map.h>
35 #include <asm/system_info.h>
36 #include <asm/xen/xen-ops.h>
41 struct arm_dma_alloc_args {
51 struct arm_dma_free_args {
62 struct arm_dma_allocator {
63 void *(*alloc)(struct arm_dma_alloc_args *args,
64 struct page **ret_page);
65 void (*free)(struct arm_dma_free_args *args);
68 struct arm_dma_buffer {
69 struct list_head list;
71 struct arm_dma_allocator *allocator;
74 static LIST_HEAD(arm_dma_bufs);
75 static DEFINE_SPINLOCK(arm_dma_bufs_lock);
77 static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
79 struct arm_dma_buffer *buf, *found = NULL;
82 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
83 list_for_each_entry(buf, &arm_dma_bufs, list) {
84 if (buf->virt == virt) {
90 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
95 * The DMA API is built upon the notion of "buffer ownership". A buffer
96 * is either exclusively owned by the CPU (and therefore may be accessed
97 * by it) or exclusively owned by the DMA device. These helper functions
98 * represent the transitions between these two ownership states.
100 * Note, however, that on later ARMs, this notion does not work due to
101 * speculative prefetches. We model our approach on the assumption that
102 * the CPU does do speculative prefetches, which means we clean caches
103 * before transfers and delay cache invalidation until transfer completion.
107 static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
110 * Ensure that the allocated pages are zeroed, and that any data
111 * lurking in the kernel direct-mapped region is invalidated.
113 if (PageHighMem(page)) {
114 phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
115 phys_addr_t end = base + size;
117 void *ptr = kmap_atomic(page);
118 memset(ptr, 0, PAGE_SIZE);
119 if (coherent_flag != COHERENT)
120 dmac_flush_range(ptr, ptr + PAGE_SIZE);
125 if (coherent_flag != COHERENT)
126 outer_flush_range(base, end);
128 void *ptr = page_address(page);
129 memset(ptr, 0, size);
130 if (coherent_flag != COHERENT) {
131 dmac_flush_range(ptr, ptr + size);
132 outer_flush_range(__pa(ptr), __pa(ptr) + size);
138 * Allocate a DMA buffer for 'dev' of size 'size' using the
139 * specified gfp mask. Note that 'size' must be page aligned.
141 static struct page *__dma_alloc_buffer(struct device *dev, size_t size,
142 gfp_t gfp, int coherent_flag)
144 unsigned long order = get_order(size);
145 struct page *page, *p, *e;
147 page = alloc_pages(gfp, order);
152 * Now split the huge page and free the excess pages
154 split_page(page, order);
155 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
158 __dma_clear_buffer(page, size, coherent_flag);
164 * Free a DMA buffer. 'size' must be page aligned.
166 static void __dma_free_buffer(struct page *page, size_t size)
168 struct page *e = page + (size >> PAGE_SHIFT);
176 static void *__alloc_from_contiguous(struct device *dev, size_t size,
177 pgprot_t prot, struct page **ret_page,
178 const void *caller, bool want_vaddr,
179 int coherent_flag, gfp_t gfp);
181 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
182 pgprot_t prot, struct page **ret_page,
183 const void *caller, bool want_vaddr);
185 #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
186 static struct gen_pool *atomic_pool __ro_after_init;
188 static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
190 static int __init early_coherent_pool(char *p)
192 atomic_pool_size = memparse(p, &p);
195 early_param("coherent_pool", early_coherent_pool);
198 * Initialise the coherent pool for atomic allocations.
200 static int __init atomic_pool_init(void)
202 pgprot_t prot = pgprot_dmacoherent(PAGE_KERNEL);
203 gfp_t gfp = GFP_KERNEL | GFP_DMA;
207 atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
211 * The atomic pool is only used for non-coherent allocations
212 * so we must pass NORMAL for coherent_flag.
214 if (dev_get_cma_area(NULL))
215 ptr = __alloc_from_contiguous(NULL, atomic_pool_size, prot,
216 &page, atomic_pool_init, true, NORMAL,
219 ptr = __alloc_remap_buffer(NULL, atomic_pool_size, gfp, prot,
220 &page, atomic_pool_init, true);
224 ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr,
226 atomic_pool_size, -1);
228 goto destroy_genpool;
230 gen_pool_set_algo(atomic_pool,
231 gen_pool_first_fit_order_align,
233 pr_info("DMA: preallocated %zu KiB pool for atomic coherent allocations\n",
234 atomic_pool_size / 1024);
239 gen_pool_destroy(atomic_pool);
242 pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
243 atomic_pool_size / 1024);
247 * CMA is activated by core_initcall, so we must be called after it.
249 postcore_initcall(atomic_pool_init);
251 #ifdef CONFIG_CMA_AREAS
252 struct dma_contig_early_reserve {
257 static struct dma_contig_early_reserve dma_mmu_remap[MAX_CMA_AREAS] __initdata;
259 static int dma_mmu_remap_num __initdata;
261 #ifdef CONFIG_DMA_CMA
262 void __init dma_contiguous_early_fixup(phys_addr_t base, unsigned long size)
264 dma_mmu_remap[dma_mmu_remap_num].base = base;
265 dma_mmu_remap[dma_mmu_remap_num].size = size;
270 void __init dma_contiguous_remap(void)
273 for (i = 0; i < dma_mmu_remap_num; i++) {
274 phys_addr_t start = dma_mmu_remap[i].base;
275 phys_addr_t end = start + dma_mmu_remap[i].size;
279 if (end > arm_lowmem_limit)
280 end = arm_lowmem_limit;
284 map.pfn = __phys_to_pfn(start);
285 map.virtual = __phys_to_virt(start);
286 map.length = end - start;
287 map.type = MT_MEMORY_DMA_READY;
290 * Clear previous low-memory mapping to ensure that the
291 * TLB does not see any conflicting entries, then flush
292 * the TLB of the old entries before creating new mappings.
294 * This ensures that any speculatively loaded TLB entries
295 * (even though they may be rare) can not cause any problems,
296 * and ensures that this code is architecturally compliant.
298 for (addr = __phys_to_virt(start); addr < __phys_to_virt(end);
300 pmd_clear(pmd_off_k(addr));
302 flush_tlb_kernel_range(__phys_to_virt(start),
303 __phys_to_virt(end));
305 iotable_init(&map, 1);
310 static int __dma_update_pte(pte_t *pte, unsigned long addr, void *data)
312 struct page *page = virt_to_page((void *)addr);
313 pgprot_t prot = *(pgprot_t *)data;
315 set_pte_ext(pte, mk_pte(page, prot), 0);
319 static void __dma_remap(struct page *page, size_t size, pgprot_t prot)
321 unsigned long start = (unsigned long) page_address(page);
322 unsigned end = start + size;
324 apply_to_page_range(&init_mm, start, size, __dma_update_pte, &prot);
325 flush_tlb_kernel_range(start, end);
328 static void *__alloc_remap_buffer(struct device *dev, size_t size, gfp_t gfp,
329 pgprot_t prot, struct page **ret_page,
330 const void *caller, bool want_vaddr)
335 * __alloc_remap_buffer is only called when the device is
338 page = __dma_alloc_buffer(dev, size, gfp, NORMAL);
344 ptr = dma_common_contiguous_remap(page, size, prot, caller);
346 __dma_free_buffer(page, size);
355 static void *__alloc_from_pool(size_t size, struct page **ret_page)
361 WARN(1, "coherent pool not initialised!\n");
365 val = gen_pool_alloc(atomic_pool, size);
367 phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
369 *ret_page = phys_to_page(phys);
376 static bool __in_atomic_pool(void *start, size_t size)
378 return gen_pool_has_addr(atomic_pool, (unsigned long)start, size);
381 static int __free_from_pool(void *start, size_t size)
383 if (!__in_atomic_pool(start, size))
386 gen_pool_free(atomic_pool, (unsigned long)start, size);
391 static void *__alloc_from_contiguous(struct device *dev, size_t size,
392 pgprot_t prot, struct page **ret_page,
393 const void *caller, bool want_vaddr,
394 int coherent_flag, gfp_t gfp)
396 unsigned long order = get_order(size);
397 size_t count = size >> PAGE_SHIFT;
401 page = dma_alloc_from_contiguous(dev, count, order, gfp & __GFP_NOWARN);
405 __dma_clear_buffer(page, size, coherent_flag);
410 if (PageHighMem(page)) {
411 ptr = dma_common_contiguous_remap(page, size, prot, caller);
413 dma_release_from_contiguous(dev, page, count);
417 __dma_remap(page, size, prot);
418 ptr = page_address(page);
426 static void __free_from_contiguous(struct device *dev, struct page *page,
427 void *cpu_addr, size_t size, bool want_vaddr)
430 if (PageHighMem(page))
431 dma_common_free_remap(cpu_addr, size);
433 __dma_remap(page, size, PAGE_KERNEL);
435 dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT);
438 static inline pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot)
440 prot = (attrs & DMA_ATTR_WRITE_COMBINE) ?
441 pgprot_writecombine(prot) :
442 pgprot_dmacoherent(prot);
446 static void *__alloc_simple_buffer(struct device *dev, size_t size, gfp_t gfp,
447 struct page **ret_page)
450 /* __alloc_simple_buffer is only called when the device is coherent */
451 page = __dma_alloc_buffer(dev, size, gfp, COHERENT);
456 return page_address(page);
459 static void *simple_allocator_alloc(struct arm_dma_alloc_args *args,
460 struct page **ret_page)
462 return __alloc_simple_buffer(args->dev, args->size, args->gfp,
466 static void simple_allocator_free(struct arm_dma_free_args *args)
468 __dma_free_buffer(args->page, args->size);
471 static struct arm_dma_allocator simple_allocator = {
472 .alloc = simple_allocator_alloc,
473 .free = simple_allocator_free,
476 static void *cma_allocator_alloc(struct arm_dma_alloc_args *args,
477 struct page **ret_page)
479 return __alloc_from_contiguous(args->dev, args->size, args->prot,
480 ret_page, args->caller,
481 args->want_vaddr, args->coherent_flag,
485 static void cma_allocator_free(struct arm_dma_free_args *args)
487 __free_from_contiguous(args->dev, args->page, args->cpu_addr,
488 args->size, args->want_vaddr);
491 static struct arm_dma_allocator cma_allocator = {
492 .alloc = cma_allocator_alloc,
493 .free = cma_allocator_free,
496 static void *pool_allocator_alloc(struct arm_dma_alloc_args *args,
497 struct page **ret_page)
499 return __alloc_from_pool(args->size, ret_page);
502 static void pool_allocator_free(struct arm_dma_free_args *args)
504 __free_from_pool(args->cpu_addr, args->size);
507 static struct arm_dma_allocator pool_allocator = {
508 .alloc = pool_allocator_alloc,
509 .free = pool_allocator_free,
512 static void *remap_allocator_alloc(struct arm_dma_alloc_args *args,
513 struct page **ret_page)
515 return __alloc_remap_buffer(args->dev, args->size, args->gfp,
516 args->prot, ret_page, args->caller,
520 static void remap_allocator_free(struct arm_dma_free_args *args)
522 if (args->want_vaddr)
523 dma_common_free_remap(args->cpu_addr, args->size);
525 __dma_free_buffer(args->page, args->size);
528 static struct arm_dma_allocator remap_allocator = {
529 .alloc = remap_allocator_alloc,
530 .free = remap_allocator_free,
533 static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
534 gfp_t gfp, pgprot_t prot, bool is_coherent,
535 unsigned long attrs, const void *caller)
537 u64 mask = min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
538 struct page *page = NULL;
540 bool allowblock, cma;
541 struct arm_dma_buffer *buf;
542 struct arm_dma_alloc_args args = {
544 .size = PAGE_ALIGN(size),
548 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
549 .coherent_flag = is_coherent ? COHERENT : NORMAL,
552 #ifdef CONFIG_DMA_API_DEBUG
553 u64 limit = (mask + 1) & ~mask;
554 if (limit && size >= limit) {
555 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
561 buf = kzalloc(sizeof(*buf),
562 gfp & ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM));
566 if (mask < 0xffffffffULL)
571 *handle = DMA_MAPPING_ERROR;
572 allowblock = gfpflags_allow_blocking(gfp);
573 cma = allowblock ? dev_get_cma_area(dev) : NULL;
576 buf->allocator = &cma_allocator;
577 else if (is_coherent)
578 buf->allocator = &simple_allocator;
580 buf->allocator = &remap_allocator;
582 buf->allocator = &pool_allocator;
584 addr = buf->allocator->alloc(&args, &page);
589 *handle = phys_to_dma(dev, page_to_phys(page));
590 buf->virt = args.want_vaddr ? addr : page;
592 spin_lock_irqsave(&arm_dma_bufs_lock, flags);
593 list_add(&buf->list, &arm_dma_bufs);
594 spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
599 return args.want_vaddr ? addr : page;
603 * Free a buffer as defined by the above mapping.
605 static void __arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
606 dma_addr_t handle, unsigned long attrs,
609 struct page *page = phys_to_page(dma_to_phys(dev, handle));
610 struct arm_dma_buffer *buf;
611 struct arm_dma_free_args args = {
613 .size = PAGE_ALIGN(size),
614 .cpu_addr = cpu_addr,
616 .want_vaddr = ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0),
619 buf = arm_dma_buffer_find(cpu_addr);
620 if (WARN(!buf, "Freeing invalid buffer %p\n", cpu_addr))
623 buf->allocator->free(&args);
627 static void dma_cache_maint_page(struct page *page, unsigned long offset,
628 size_t size, enum dma_data_direction dir,
629 void (*op)(const void *, size_t, int))
634 pfn = page_to_pfn(page) + offset / PAGE_SIZE;
638 * A single sg entry may refer to multiple physically contiguous
639 * pages. But we still need to process highmem pages individually.
640 * If highmem is not configured then the bulk of this loop gets
647 page = pfn_to_page(pfn);
649 if (PageHighMem(page)) {
650 if (len + offset > PAGE_SIZE)
651 len = PAGE_SIZE - offset;
653 if (cache_is_vipt_nonaliasing()) {
654 vaddr = kmap_atomic(page);
655 op(vaddr + offset, len, dir);
656 kunmap_atomic(vaddr);
658 vaddr = kmap_high_get(page);
660 op(vaddr + offset, len, dir);
665 vaddr = page_address(page) + offset;
675 * Make an area consistent for devices.
676 * Note: Drivers should NOT use this function directly.
677 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
679 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
680 size_t size, enum dma_data_direction dir)
684 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
686 paddr = page_to_phys(page) + off;
687 if (dir == DMA_FROM_DEVICE) {
688 outer_inv_range(paddr, paddr + size);
690 outer_clean_range(paddr, paddr + size);
692 /* FIXME: non-speculating: flush on bidirectional mappings? */
695 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
696 size_t size, enum dma_data_direction dir)
698 phys_addr_t paddr = page_to_phys(page) + off;
700 /* FIXME: non-speculating: not required */
701 /* in any case, don't bother invalidating if DMA to device */
702 if (dir != DMA_TO_DEVICE) {
703 outer_inv_range(paddr, paddr + size);
705 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
709 * Mark the D-cache clean for these pages to avoid extra flushing.
711 if (dir != DMA_TO_DEVICE && size >= PAGE_SIZE) {
715 pfn = page_to_pfn(page) + off / PAGE_SIZE;
719 left -= PAGE_SIZE - off;
721 while (left >= PAGE_SIZE) {
722 page = pfn_to_page(pfn++);
723 set_bit(PG_dcache_clean, &page->flags);
729 #ifdef CONFIG_ARM_DMA_USE_IOMMU
731 static int __dma_info_to_prot(enum dma_data_direction dir, unsigned long attrs)
735 if (attrs & DMA_ATTR_PRIVILEGED)
739 case DMA_BIDIRECTIONAL:
740 return prot | IOMMU_READ | IOMMU_WRITE;
742 return prot | IOMMU_READ;
743 case DMA_FROM_DEVICE:
744 return prot | IOMMU_WRITE;
752 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping);
754 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
757 unsigned int order = get_order(size);
758 unsigned int align = 0;
759 unsigned int count, start;
760 size_t mapping_size = mapping->bits << PAGE_SHIFT;
765 if (order > CONFIG_ARM_DMA_IOMMU_ALIGNMENT)
766 order = CONFIG_ARM_DMA_IOMMU_ALIGNMENT;
768 count = PAGE_ALIGN(size) >> PAGE_SHIFT;
769 align = (1 << order) - 1;
771 spin_lock_irqsave(&mapping->lock, flags);
772 for (i = 0; i < mapping->nr_bitmaps; i++) {
773 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
774 mapping->bits, 0, count, align);
776 if (start > mapping->bits)
779 bitmap_set(mapping->bitmaps[i], start, count);
784 * No unused range found. Try to extend the existing mapping
785 * and perform a second attempt to reserve an IO virtual
786 * address range of size bytes.
788 if (i == mapping->nr_bitmaps) {
789 if (extend_iommu_mapping(mapping)) {
790 spin_unlock_irqrestore(&mapping->lock, flags);
791 return DMA_MAPPING_ERROR;
794 start = bitmap_find_next_zero_area(mapping->bitmaps[i],
795 mapping->bits, 0, count, align);
797 if (start > mapping->bits) {
798 spin_unlock_irqrestore(&mapping->lock, flags);
799 return DMA_MAPPING_ERROR;
802 bitmap_set(mapping->bitmaps[i], start, count);
804 spin_unlock_irqrestore(&mapping->lock, flags);
806 iova = mapping->base + (mapping_size * i);
807 iova += start << PAGE_SHIFT;
812 static inline void __free_iova(struct dma_iommu_mapping *mapping,
813 dma_addr_t addr, size_t size)
815 unsigned int start, count;
816 size_t mapping_size = mapping->bits << PAGE_SHIFT;
818 dma_addr_t bitmap_base;
824 bitmap_index = (u32) (addr - mapping->base) / (u32) mapping_size;
825 BUG_ON(addr < mapping->base || bitmap_index > mapping->extensions);
827 bitmap_base = mapping->base + mapping_size * bitmap_index;
829 start = (addr - bitmap_base) >> PAGE_SHIFT;
831 if (addr + size > bitmap_base + mapping_size) {
833 * The address range to be freed reaches into the iova
834 * range of the next bitmap. This should not happen as
835 * we don't allow this in __alloc_iova (at the
840 count = size >> PAGE_SHIFT;
842 spin_lock_irqsave(&mapping->lock, flags);
843 bitmap_clear(mapping->bitmaps[bitmap_index], start, count);
844 spin_unlock_irqrestore(&mapping->lock, flags);
847 /* We'll try 2M, 1M, 64K, and finally 4K; array must end with 0! */
848 static const int iommu_order_array[] = { 9, 8, 4, 0 };
850 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
851 gfp_t gfp, unsigned long attrs,
855 int count = size >> PAGE_SHIFT;
856 int array_size = count * sizeof(struct page *);
860 if (array_size <= PAGE_SIZE)
861 pages = kzalloc(array_size, GFP_KERNEL);
863 pages = vzalloc(array_size);
867 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS)
869 unsigned long order = get_order(size);
872 page = dma_alloc_from_contiguous(dev, count, order,
877 __dma_clear_buffer(page, size, coherent_flag);
879 for (i = 0; i < count; i++)
885 /* Go straight to 4K chunks if caller says it's OK. */
886 if (attrs & DMA_ATTR_ALLOC_SINGLE_PAGES)
887 order_idx = ARRAY_SIZE(iommu_order_array) - 1;
890 * IOMMU can map any pages, so himem can also be used here
892 gfp |= __GFP_NOWARN | __GFP_HIGHMEM;
897 order = iommu_order_array[order_idx];
899 /* Drop down when we get small */
900 if (__fls(count) < order) {
906 /* See if it's easy to allocate a high-order chunk */
907 pages[i] = alloc_pages(gfp | __GFP_NORETRY, order);
909 /* Go down a notch at first sign of pressure */
915 pages[i] = alloc_pages(gfp, 0);
921 split_page(pages[i], order);
924 pages[i + j] = pages[i] + j;
927 __dma_clear_buffer(pages[i], PAGE_SIZE << order, coherent_flag);
936 __free_pages(pages[i], 0);
941 static int __iommu_free_buffer(struct device *dev, struct page **pages,
942 size_t size, unsigned long attrs)
944 int count = size >> PAGE_SHIFT;
947 if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
948 dma_release_from_contiguous(dev, pages[0], count);
950 for (i = 0; i < count; i++)
952 __free_pages(pages[i], 0);
960 * Create a mapping in device IO address space for specified pages
963 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size,
966 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
967 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
968 dma_addr_t dma_addr, iova;
971 dma_addr = __alloc_iova(mapping, size);
972 if (dma_addr == DMA_MAPPING_ERROR)
976 for (i = 0; i < count; ) {
979 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
980 phys_addr_t phys = page_to_phys(pages[i]);
983 for (j = i + 1; j < count; j++, next_pfn++)
984 if (page_to_pfn(pages[j]) != next_pfn)
987 len = (j - i) << PAGE_SHIFT;
988 ret = iommu_map(mapping->domain, iova, phys, len,
989 __dma_info_to_prot(DMA_BIDIRECTIONAL, attrs),
998 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
999 __free_iova(mapping, dma_addr, size);
1000 return DMA_MAPPING_ERROR;
1003 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
1005 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1008 * add optional in-page offset from iova to size and align
1009 * result to page size
1011 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
1014 iommu_unmap(mapping->domain, iova, size);
1015 __free_iova(mapping, iova, size);
1019 static struct page **__atomic_get_pages(void *addr)
1024 phys = gen_pool_virt_to_phys(atomic_pool, (unsigned long)addr);
1025 page = phys_to_page(phys);
1027 return (struct page **)page;
1030 static struct page **__iommu_get_pages(void *cpu_addr, unsigned long attrs)
1032 if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
1033 return __atomic_get_pages(cpu_addr);
1035 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1038 return dma_common_find_pages(cpu_addr);
1041 static void *__iommu_alloc_simple(struct device *dev, size_t size, gfp_t gfp,
1042 dma_addr_t *handle, int coherent_flag,
1043 unsigned long attrs)
1048 if (coherent_flag == COHERENT)
1049 addr = __alloc_simple_buffer(dev, size, gfp, &page);
1051 addr = __alloc_from_pool(size, &page);
1055 *handle = __iommu_create_mapping(dev, &page, size, attrs);
1056 if (*handle == DMA_MAPPING_ERROR)
1062 __free_from_pool(addr, size);
1066 static void __iommu_free_atomic(struct device *dev, void *cpu_addr,
1067 dma_addr_t handle, size_t size, int coherent_flag)
1069 __iommu_remove_mapping(dev, handle, size);
1070 if (coherent_flag == COHERENT)
1071 __dma_free_buffer(virt_to_page(cpu_addr), size);
1073 __free_from_pool(cpu_addr, size);
1076 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1077 dma_addr_t *handle, gfp_t gfp, unsigned long attrs)
1079 pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL);
1080 struct page **pages;
1082 int coherent_flag = dev->dma_coherent ? COHERENT : NORMAL;
1084 *handle = DMA_MAPPING_ERROR;
1085 size = PAGE_ALIGN(size);
1087 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp))
1088 return __iommu_alloc_simple(dev, size, gfp, handle,
1089 coherent_flag, attrs);
1091 pages = __iommu_alloc_buffer(dev, size, gfp, attrs, coherent_flag);
1095 *handle = __iommu_create_mapping(dev, pages, size, attrs);
1096 if (*handle == DMA_MAPPING_ERROR)
1099 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING)
1102 addr = dma_common_pages_remap(pages, size, prot,
1103 __builtin_return_address(0));
1110 __iommu_remove_mapping(dev, *handle, size);
1112 __iommu_free_buffer(dev, pages, size, attrs);
1116 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1117 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1118 unsigned long attrs)
1120 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1121 unsigned long nr_pages = PAGE_ALIGN(size) >> PAGE_SHIFT;
1127 if (vma->vm_pgoff >= nr_pages)
1130 if (!dev->dma_coherent)
1131 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1133 err = vm_map_pages(vma, pages, nr_pages);
1135 pr_err("Remapping memory failed: %d\n", err);
1141 * free a page as defined by the above mapping.
1142 * Must not be called with IRQs disabled.
1144 static void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1145 dma_addr_t handle, unsigned long attrs)
1147 int coherent_flag = dev->dma_coherent ? COHERENT : NORMAL;
1148 struct page **pages;
1149 size = PAGE_ALIGN(size);
1151 if (coherent_flag == COHERENT || __in_atomic_pool(cpu_addr, size)) {
1152 __iommu_free_atomic(dev, cpu_addr, handle, size, coherent_flag);
1156 pages = __iommu_get_pages(cpu_addr, attrs);
1158 WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr);
1162 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) == 0)
1163 dma_common_free_remap(cpu_addr, size);
1165 __iommu_remove_mapping(dev, handle, size);
1166 __iommu_free_buffer(dev, pages, size, attrs);
1169 static int arm_iommu_get_sgtable(struct device *dev, struct sg_table *sgt,
1170 void *cpu_addr, dma_addr_t dma_addr,
1171 size_t size, unsigned long attrs)
1173 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
1174 struct page **pages = __iommu_get_pages(cpu_addr, attrs);
1179 return sg_alloc_table_from_pages(sgt, pages, count, 0, size,
1184 * Map a part of the scatter-gather list into contiguous io address space
1186 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1187 size_t size, dma_addr_t *handle,
1188 enum dma_data_direction dir, unsigned long attrs)
1190 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1191 dma_addr_t iova, iova_base;
1194 struct scatterlist *s;
1197 size = PAGE_ALIGN(size);
1198 *handle = DMA_MAPPING_ERROR;
1200 iova_base = iova = __alloc_iova(mapping, size);
1201 if (iova == DMA_MAPPING_ERROR)
1204 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1205 phys_addr_t phys = page_to_phys(sg_page(s));
1206 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1208 if (!dev->dma_coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
1209 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1211 prot = __dma_info_to_prot(dir, attrs);
1213 ret = iommu_map(mapping->domain, iova, phys, len, prot,
1217 count += len >> PAGE_SHIFT;
1220 *handle = iova_base;
1224 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1225 __free_iova(mapping, iova_base, size);
1230 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1231 * @dev: valid struct device pointer
1232 * @sg: list of buffers
1233 * @nents: number of buffers to map
1234 * @dir: DMA transfer direction
1236 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1237 * The scatter gather list elements are merged together (if possible) and
1238 * tagged with the appropriate dma address and length. They are obtained via
1239 * sg_dma_{address,length}.
1241 static int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg,
1242 int nents, enum dma_data_direction dir, unsigned long attrs)
1244 struct scatterlist *s = sg, *dma = sg, *start = sg;
1245 int i, count = 0, ret;
1246 unsigned int offset = s->offset;
1247 unsigned int size = s->offset + s->length;
1248 unsigned int max = dma_get_max_seg_size(dev);
1250 for (i = 1; i < nents; i++) {
1255 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1256 ret = __map_sg_chunk(dev, start, size,
1257 &dma->dma_address, dir, attrs);
1261 dma->dma_address += offset;
1262 dma->dma_length = size - offset;
1264 size = offset = s->offset;
1271 ret = __map_sg_chunk(dev, start, size, &dma->dma_address, dir, attrs);
1275 dma->dma_address += offset;
1276 dma->dma_length = size - offset;
1281 for_each_sg(sg, s, count, i)
1282 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1289 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1290 * @dev: valid struct device pointer
1291 * @sg: list of buffers
1292 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1293 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1295 * Unmap a set of streaming mode DMA translations. Again, CPU access
1296 * rules concerning calls here are the same as for dma_unmap_single().
1298 static void arm_iommu_unmap_sg(struct device *dev,
1299 struct scatterlist *sg, int nents,
1300 enum dma_data_direction dir,
1301 unsigned long attrs)
1303 struct scatterlist *s;
1306 for_each_sg(sg, s, nents, i) {
1308 __iommu_remove_mapping(dev, sg_dma_address(s),
1310 if (!dev->dma_coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
1311 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1317 * arm_iommu_sync_sg_for_cpu
1318 * @dev: valid struct device pointer
1319 * @sg: list of buffers
1320 * @nents: number of buffers to map (returned from dma_map_sg)
1321 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1323 static void arm_iommu_sync_sg_for_cpu(struct device *dev,
1324 struct scatterlist *sg,
1325 int nents, enum dma_data_direction dir)
1327 struct scatterlist *s;
1330 if (dev->dma_coherent)
1333 for_each_sg(sg, s, nents, i)
1334 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1339 * arm_iommu_sync_sg_for_device
1340 * @dev: valid struct device pointer
1341 * @sg: list of buffers
1342 * @nents: number of buffers to map (returned from dma_map_sg)
1343 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1345 static void arm_iommu_sync_sg_for_device(struct device *dev,
1346 struct scatterlist *sg,
1347 int nents, enum dma_data_direction dir)
1349 struct scatterlist *s;
1352 if (dev->dma_coherent)
1355 for_each_sg(sg, s, nents, i)
1356 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1360 * arm_iommu_map_page
1361 * @dev: valid struct device pointer
1362 * @page: page that buffer resides in
1363 * @offset: offset into page for start of buffer
1364 * @size: size of buffer to map
1365 * @dir: DMA transfer direction
1367 * IOMMU aware version of arm_dma_map_page()
1369 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1370 unsigned long offset, size_t size, enum dma_data_direction dir,
1371 unsigned long attrs)
1373 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1374 dma_addr_t dma_addr;
1375 int ret, prot, len = PAGE_ALIGN(size + offset);
1377 if (!dev->dma_coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
1378 __dma_page_cpu_to_dev(page, offset, size, dir);
1380 dma_addr = __alloc_iova(mapping, len);
1381 if (dma_addr == DMA_MAPPING_ERROR)
1384 prot = __dma_info_to_prot(dir, attrs);
1386 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len,
1391 return dma_addr + offset;
1393 __free_iova(mapping, dma_addr, len);
1394 return DMA_MAPPING_ERROR;
1398 * arm_iommu_unmap_page
1399 * @dev: valid struct device pointer
1400 * @handle: DMA address of buffer
1401 * @size: size of buffer (same as passed to dma_map_page)
1402 * @dir: DMA transfer direction (same as passed to dma_map_page)
1404 * IOMMU aware version of arm_dma_unmap_page()
1406 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1407 size_t size, enum dma_data_direction dir, unsigned long attrs)
1409 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1410 dma_addr_t iova = handle & PAGE_MASK;
1412 int offset = handle & ~PAGE_MASK;
1413 int len = PAGE_ALIGN(size + offset);
1418 if (!dev->dma_coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) {
1419 page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1420 __dma_page_dev_to_cpu(page, offset, size, dir);
1423 iommu_unmap(mapping->domain, iova, len);
1424 __free_iova(mapping, iova, len);
1428 * arm_iommu_map_resource - map a device resource for DMA
1429 * @dev: valid struct device pointer
1430 * @phys_addr: physical address of resource
1431 * @size: size of resource to map
1432 * @dir: DMA transfer direction
1434 static dma_addr_t arm_iommu_map_resource(struct device *dev,
1435 phys_addr_t phys_addr, size_t size,
1436 enum dma_data_direction dir, unsigned long attrs)
1438 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1439 dma_addr_t dma_addr;
1441 phys_addr_t addr = phys_addr & PAGE_MASK;
1442 unsigned int offset = phys_addr & ~PAGE_MASK;
1443 size_t len = PAGE_ALIGN(size + offset);
1445 dma_addr = __alloc_iova(mapping, len);
1446 if (dma_addr == DMA_MAPPING_ERROR)
1449 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO;
1451 ret = iommu_map(mapping->domain, dma_addr, addr, len, prot, GFP_KERNEL);
1455 return dma_addr + offset;
1457 __free_iova(mapping, dma_addr, len);
1458 return DMA_MAPPING_ERROR;
1462 * arm_iommu_unmap_resource - unmap a device DMA resource
1463 * @dev: valid struct device pointer
1464 * @dma_handle: DMA address to resource
1465 * @size: size of resource to map
1466 * @dir: DMA transfer direction
1468 static void arm_iommu_unmap_resource(struct device *dev, dma_addr_t dma_handle,
1469 size_t size, enum dma_data_direction dir,
1470 unsigned long attrs)
1472 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1473 dma_addr_t iova = dma_handle & PAGE_MASK;
1474 unsigned int offset = dma_handle & ~PAGE_MASK;
1475 size_t len = PAGE_ALIGN(size + offset);
1480 iommu_unmap(mapping->domain, iova, len);
1481 __free_iova(mapping, iova, len);
1484 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1485 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1487 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1488 dma_addr_t iova = handle & PAGE_MASK;
1490 unsigned int offset = handle & ~PAGE_MASK;
1492 if (dev->dma_coherent || !iova)
1495 page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1496 __dma_page_dev_to_cpu(page, offset, size, dir);
1499 static void arm_iommu_sync_single_for_device(struct device *dev,
1500 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1502 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1503 dma_addr_t iova = handle & PAGE_MASK;
1505 unsigned int offset = handle & ~PAGE_MASK;
1507 if (dev->dma_coherent || !iova)
1510 page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1511 __dma_page_cpu_to_dev(page, offset, size, dir);
1514 static const struct dma_map_ops iommu_ops = {
1515 .alloc = arm_iommu_alloc_attrs,
1516 .free = arm_iommu_free_attrs,
1517 .mmap = arm_iommu_mmap_attrs,
1518 .get_sgtable = arm_iommu_get_sgtable,
1520 .map_page = arm_iommu_map_page,
1521 .unmap_page = arm_iommu_unmap_page,
1522 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1523 .sync_single_for_device = arm_iommu_sync_single_for_device,
1525 .map_sg = arm_iommu_map_sg,
1526 .unmap_sg = arm_iommu_unmap_sg,
1527 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1528 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1530 .map_resource = arm_iommu_map_resource,
1531 .unmap_resource = arm_iommu_unmap_resource,
1535 * arm_iommu_create_mapping
1536 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1537 * @base: start address of the valid IO address space
1538 * @size: maximum size of the valid IO address space
1540 * Creates a mapping structure which holds information about used/unused
1541 * IO address ranges, which is required to perform memory allocation and
1542 * mapping with IOMMU aware functions.
1544 * The client device need to be attached to the mapping with
1545 * arm_iommu_attach_device function.
1547 struct dma_iommu_mapping *
1548 arm_iommu_create_mapping(const struct bus_type *bus, dma_addr_t base, u64 size)
1550 unsigned int bits = size >> PAGE_SHIFT;
1551 unsigned int bitmap_size = BITS_TO_LONGS(bits) * sizeof(long);
1552 struct dma_iommu_mapping *mapping;
1556 /* currently only 32-bit DMA address space is supported */
1557 if (size > DMA_BIT_MASK(32) + 1)
1558 return ERR_PTR(-ERANGE);
1561 return ERR_PTR(-EINVAL);
1563 if (bitmap_size > PAGE_SIZE) {
1564 extensions = bitmap_size / PAGE_SIZE;
1565 bitmap_size = PAGE_SIZE;
1568 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1572 mapping->bitmap_size = bitmap_size;
1573 mapping->bitmaps = kcalloc(extensions, sizeof(unsigned long *),
1575 if (!mapping->bitmaps)
1578 mapping->bitmaps[0] = kzalloc(bitmap_size, GFP_KERNEL);
1579 if (!mapping->bitmaps[0])
1582 mapping->nr_bitmaps = 1;
1583 mapping->extensions = extensions;
1584 mapping->base = base;
1585 mapping->bits = BITS_PER_BYTE * bitmap_size;
1587 spin_lock_init(&mapping->lock);
1589 mapping->domain = iommu_domain_alloc(bus);
1590 if (!mapping->domain)
1593 kref_init(&mapping->kref);
1596 kfree(mapping->bitmaps[0]);
1598 kfree(mapping->bitmaps);
1602 return ERR_PTR(err);
1604 EXPORT_SYMBOL_GPL(arm_iommu_create_mapping);
1606 static void release_iommu_mapping(struct kref *kref)
1609 struct dma_iommu_mapping *mapping =
1610 container_of(kref, struct dma_iommu_mapping, kref);
1612 iommu_domain_free(mapping->domain);
1613 for (i = 0; i < mapping->nr_bitmaps; i++)
1614 kfree(mapping->bitmaps[i]);
1615 kfree(mapping->bitmaps);
1619 static int extend_iommu_mapping(struct dma_iommu_mapping *mapping)
1623 if (mapping->nr_bitmaps >= mapping->extensions)
1626 next_bitmap = mapping->nr_bitmaps;
1627 mapping->bitmaps[next_bitmap] = kzalloc(mapping->bitmap_size,
1629 if (!mapping->bitmaps[next_bitmap])
1632 mapping->nr_bitmaps++;
1637 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1640 kref_put(&mapping->kref, release_iommu_mapping);
1642 EXPORT_SYMBOL_GPL(arm_iommu_release_mapping);
1644 static int __arm_iommu_attach_device(struct device *dev,
1645 struct dma_iommu_mapping *mapping)
1649 err = iommu_attach_device(mapping->domain, dev);
1653 kref_get(&mapping->kref);
1654 to_dma_iommu_mapping(dev) = mapping;
1656 pr_debug("Attached IOMMU controller to %s device.\n", dev_name(dev));
1661 * arm_iommu_attach_device
1662 * @dev: valid struct device pointer
1663 * @mapping: io address space mapping structure (returned from
1664 * arm_iommu_create_mapping)
1666 * Attaches specified io address space mapping to the provided device.
1667 * This replaces the dma operations (dma_map_ops pointer) with the
1668 * IOMMU aware version.
1670 * More than one client might be attached to the same io address space
1673 int arm_iommu_attach_device(struct device *dev,
1674 struct dma_iommu_mapping *mapping)
1678 err = __arm_iommu_attach_device(dev, mapping);
1682 set_dma_ops(dev, &iommu_ops);
1685 EXPORT_SYMBOL_GPL(arm_iommu_attach_device);
1688 * arm_iommu_detach_device
1689 * @dev: valid struct device pointer
1691 * Detaches the provided device from a previously attached map.
1692 * This overwrites the dma_ops pointer with appropriate non-IOMMU ops.
1694 void arm_iommu_detach_device(struct device *dev)
1696 struct dma_iommu_mapping *mapping;
1698 mapping = to_dma_iommu_mapping(dev);
1700 dev_warn(dev, "Not attached\n");
1704 iommu_detach_device(mapping->domain, dev);
1705 kref_put(&mapping->kref, release_iommu_mapping);
1706 to_dma_iommu_mapping(dev) = NULL;
1707 set_dma_ops(dev, NULL);
1709 pr_debug("Detached IOMMU controller from %s device.\n", dev_name(dev));
1711 EXPORT_SYMBOL_GPL(arm_iommu_detach_device);
1713 static void arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
1714 const struct iommu_ops *iommu, bool coherent)
1716 struct dma_iommu_mapping *mapping;
1718 mapping = arm_iommu_create_mapping(dev->bus, dma_base, size);
1719 if (IS_ERR(mapping)) {
1720 pr_warn("Failed to create %llu-byte IOMMU mapping for device %s\n",
1721 size, dev_name(dev));
1725 if (__arm_iommu_attach_device(dev, mapping)) {
1726 pr_warn("Failed to attached device %s to IOMMU_mapping\n",
1728 arm_iommu_release_mapping(mapping);
1732 set_dma_ops(dev, &iommu_ops);
1735 static void arm_teardown_iommu_dma_ops(struct device *dev)
1737 struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
1742 arm_iommu_detach_device(dev);
1743 arm_iommu_release_mapping(mapping);
1748 static void arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size,
1749 const struct iommu_ops *iommu, bool coherent)
1753 static void arm_teardown_iommu_dma_ops(struct device *dev) { }
1755 #endif /* CONFIG_ARM_DMA_USE_IOMMU */
1757 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
1758 const struct iommu_ops *iommu, bool coherent)
1761 * Due to legacy code that sets the ->dma_coherent flag from a bus
1762 * notifier we can't just assign coherent to the ->dma_coherent flag
1763 * here, but instead have to make sure we only set but never clear it
1767 dev->dma_coherent = true;
1770 * Don't override the dma_ops if they have already been set. Ideally
1771 * this should be the only location where dma_ops are set, remove this
1772 * check when all other callers of set_dma_ops will have disappeared.
1778 arm_setup_iommu_dma_ops(dev, dma_base, size, iommu, coherent);
1780 xen_setup_dma_ops(dev);
1781 dev->archdata.dma_ops_setup = true;
1784 void arch_teardown_dma_ops(struct device *dev)
1786 if (!dev->archdata.dma_ops_setup)
1789 arm_teardown_iommu_dma_ops(dev);
1790 /* Let arch_setup_dma_ops() start again from scratch upon re-probe */
1791 set_dma_ops(dev, NULL);
1794 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
1795 enum dma_data_direction dir)
1797 __dma_page_cpu_to_dev(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
1801 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
1802 enum dma_data_direction dir)
1804 __dma_page_dev_to_cpu(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
1808 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
1809 gfp_t gfp, unsigned long attrs)
1811 return __dma_alloc(dev, size, dma_handle, gfp,
1812 __get_dma_pgprot(attrs, PAGE_KERNEL), false,
1813 attrs, __builtin_return_address(0));
1816 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
1817 dma_addr_t dma_handle, unsigned long attrs)
1819 __arm_dma_free(dev, size, cpu_addr, dma_handle, attrs, false);