2 * linux/arch/arm/mm/dma-mapping.c
4 * Copyright (C) 2000-2004 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * DMA uncached mapping support.
12 #include <linux/module.h>
14 #include <linux/gfp.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/init.h>
18 #include <linux/device.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/highmem.h>
21 #include <linux/slab.h>
22 #include <linux/iommu.h>
23 #include <linux/vmalloc.h>
25 #include <asm/memory.h>
26 #include <asm/highmem.h>
27 #include <asm/cacheflush.h>
28 #include <asm/tlbflush.h>
29 #include <asm/sizes.h>
30 #include <asm/mach/arch.h>
31 #include <asm/dma-iommu.h>
36 * The DMA API is built upon the notion of "buffer ownership". A buffer
37 * is either exclusively owned by the CPU (and therefore may be accessed
38 * by it) or exclusively owned by the DMA device. These helper functions
39 * represent the transitions between these two ownership states.
41 * Note, however, that on later ARMs, this notion does not work due to
42 * speculative prefetches. We model our approach on the assumption that
43 * the CPU does do speculative prefetches, which means we clean caches
44 * before transfers and delay cache invalidation until transfer completion.
47 static void __dma_page_cpu_to_dev(struct page *, unsigned long,
48 size_t, enum dma_data_direction);
49 static void __dma_page_dev_to_cpu(struct page *, unsigned long,
50 size_t, enum dma_data_direction);
53 * arm_dma_map_page - map a portion of a page for streaming DMA
54 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
55 * @page: page that buffer resides in
56 * @offset: offset into page for start of buffer
57 * @size: size of buffer to map
58 * @dir: DMA transfer direction
60 * Ensure that any data held in the cache is appropriately discarded
63 * The device owns this memory once this call has completed. The CPU
64 * can regain ownership by calling dma_unmap_page().
66 static dma_addr_t arm_dma_map_page(struct device *dev, struct page *page,
67 unsigned long offset, size_t size, enum dma_data_direction dir,
68 struct dma_attrs *attrs)
70 if (!arch_is_coherent())
71 __dma_page_cpu_to_dev(page, offset, size, dir);
72 return pfn_to_dma(dev, page_to_pfn(page)) + offset;
76 * arm_dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
77 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
78 * @handle: DMA address of buffer
79 * @size: size of buffer (same as passed to dma_map_page)
80 * @dir: DMA transfer direction (same as passed to dma_map_page)
82 * Unmap a page streaming mode DMA translation. The handle and size
83 * must match what was provided in the previous dma_map_page() call.
84 * All other usages are undefined.
86 * After this call, reads by the CPU to the buffer are guaranteed to see
87 * whatever the device wrote there.
89 static void arm_dma_unmap_page(struct device *dev, dma_addr_t handle,
90 size_t size, enum dma_data_direction dir,
91 struct dma_attrs *attrs)
93 if (!arch_is_coherent())
94 __dma_page_dev_to_cpu(pfn_to_page(dma_to_pfn(dev, handle)),
95 handle & ~PAGE_MASK, size, dir);
98 static void arm_dma_sync_single_for_cpu(struct device *dev,
99 dma_addr_t handle, size_t size, enum dma_data_direction dir)
101 unsigned int offset = handle & (PAGE_SIZE - 1);
102 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
103 if (!arch_is_coherent())
104 __dma_page_dev_to_cpu(page, offset, size, dir);
107 static void arm_dma_sync_single_for_device(struct device *dev,
108 dma_addr_t handle, size_t size, enum dma_data_direction dir)
110 unsigned int offset = handle & (PAGE_SIZE - 1);
111 struct page *page = pfn_to_page(dma_to_pfn(dev, handle-offset));
112 if (!arch_is_coherent())
113 __dma_page_cpu_to_dev(page, offset, size, dir);
116 static int arm_dma_set_mask(struct device *dev, u64 dma_mask);
118 struct dma_map_ops arm_dma_ops = {
119 .alloc = arm_dma_alloc,
120 .free = arm_dma_free,
121 .mmap = arm_dma_mmap,
122 .map_page = arm_dma_map_page,
123 .unmap_page = arm_dma_unmap_page,
124 .map_sg = arm_dma_map_sg,
125 .unmap_sg = arm_dma_unmap_sg,
126 .sync_single_for_cpu = arm_dma_sync_single_for_cpu,
127 .sync_single_for_device = arm_dma_sync_single_for_device,
128 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu,
129 .sync_sg_for_device = arm_dma_sync_sg_for_device,
130 .set_dma_mask = arm_dma_set_mask,
132 EXPORT_SYMBOL(arm_dma_ops);
134 static u64 get_coherent_dma_mask(struct device *dev)
136 u64 mask = (u64)arm_dma_limit;
139 mask = dev->coherent_dma_mask;
142 * Sanity check the DMA mask - it must be non-zero, and
143 * must be able to be satisfied by a DMA allocation.
146 dev_warn(dev, "coherent DMA mask is unset\n");
150 if ((~mask) & (u64)arm_dma_limit) {
151 dev_warn(dev, "coherent DMA mask %#llx is smaller "
152 "than system GFP_DMA mask %#llx\n",
153 mask, (u64)arm_dma_limit);
161 static void __dma_clear_buffer(struct page *page, size_t size)
165 * Ensure that the allocated pages are zeroed, and that any data
166 * lurking in the kernel direct-mapped region is invalidated.
168 ptr = page_address(page);
170 memset(ptr, 0, size);
171 dmac_flush_range(ptr, ptr + size);
172 outer_flush_range(__pa(ptr), __pa(ptr) + size);
177 * Allocate a DMA buffer for 'dev' of size 'size' using the
178 * specified gfp mask. Note that 'size' must be page aligned.
180 static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
182 unsigned long order = get_order(size);
183 struct page *page, *p, *e;
184 u64 mask = get_coherent_dma_mask(dev);
186 #ifdef CONFIG_DMA_API_DEBUG
187 u64 limit = (mask + 1) & ~mask;
188 if (limit && size >= limit) {
189 dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
198 if (mask < 0xffffffffULL)
201 page = alloc_pages(gfp, order);
206 * Now split the huge page and free the excess pages
208 split_page(page, order);
209 for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
212 __dma_clear_buffer(page, size);
218 * Free a DMA buffer. 'size' must be page aligned.
220 static void __dma_free_buffer(struct page *page, size_t size)
222 struct page *e = page + (size >> PAGE_SHIFT);
232 #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT)
233 #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT)
236 * These are the page tables (2MB each) covering uncached, DMA consistent allocations
238 static pte_t **consistent_pte;
240 #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
242 unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
244 void __init init_consistent_dma_size(unsigned long size)
246 unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M);
248 BUG_ON(consistent_pte); /* Check we're called before DMA region init */
249 BUG_ON(base < VMALLOC_END);
251 /* Grow region to accommodate specified size */
252 if (base < consistent_base)
253 consistent_base = base;
256 #include "vmregion.h"
258 static struct arm_vmregion_head consistent_head = {
259 .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
260 .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
261 .vm_end = CONSISTENT_END,
264 #ifdef CONFIG_HUGETLB_PAGE
265 #error ARM Coherent DMA allocator does not (yet) support huge TLB
269 * Initialise the consistent memory allocation.
271 static int __init consistent_init(void)
279 unsigned long base = consistent_base;
280 unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
282 consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
283 if (!consistent_pte) {
284 pr_err("%s: no memory\n", __func__);
288 pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END);
289 consistent_head.vm_start = base;
292 pgd = pgd_offset(&init_mm, base);
294 pud = pud_alloc(&init_mm, pgd, base);
296 pr_err("%s: no pud tables\n", __func__);
301 pmd = pmd_alloc(&init_mm, pud, base);
303 pr_err("%s: no pmd tables\n", __func__);
307 WARN_ON(!pmd_none(*pmd));
309 pte = pte_alloc_kernel(pmd, base);
311 pr_err("%s: no pte tables\n", __func__);
316 consistent_pte[i++] = pte;
318 } while (base < CONSISTENT_END);
323 core_initcall(consistent_init);
326 __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
329 struct arm_vmregion *c;
333 if (!consistent_pte) {
334 pr_err("%s: not initialised\n", __func__);
340 * Align the virtual region allocation - maximum alignment is
341 * a section size, minimum is a page size. This helps reduce
342 * fragmentation of the DMA space, and also prevents allocations
343 * smaller than a section from crossing a section boundary.
346 if (bit > SECTION_SHIFT)
351 * Allocate a virtual address in the consistent mapping region.
353 c = arm_vmregion_alloc(&consistent_head, align, size,
354 gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller);
357 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
358 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
360 pte = consistent_pte[idx] + off;
364 BUG_ON(!pte_none(*pte));
366 set_pte_ext(pte, mk_pte(page, prot), 0);
370 if (off >= PTRS_PER_PTE) {
372 pte = consistent_pte[++idx];
374 } while (size -= PAGE_SIZE);
378 return (void *)c->vm_start;
383 static void __dma_free_remap(void *cpu_addr, size_t size)
385 struct arm_vmregion *c;
391 c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
393 pr_err("%s: trying to free invalid coherent area: %p\n",
399 if ((c->vm_end - c->vm_start) != size) {
400 pr_err("%s: freeing wrong coherent size (%ld != %d)\n",
401 __func__, c->vm_end - c->vm_start, size);
403 size = c->vm_end - c->vm_start;
406 idx = CONSISTENT_PTE_INDEX(c->vm_start);
407 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
408 ptep = consistent_pte[idx] + off;
411 pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
416 if (off >= PTRS_PER_PTE) {
418 ptep = consistent_pte[++idx];
421 if (pte_none(pte) || !pte_present(pte))
422 pr_crit("%s: bad page in kernel page table\n",
424 } while (size -= PAGE_SIZE);
426 flush_tlb_kernel_range(c->vm_start, c->vm_end);
428 arm_vmregion_free(&consistent_head, c);
431 static inline pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot)
433 prot = dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs) ?
434 pgprot_writecombine(prot) :
435 pgprot_dmacoherent(prot);
439 #else /* !CONFIG_MMU */
441 #define __dma_alloc_remap(page, size, gfp, prot, c) page_address(page)
442 #define __dma_free_remap(addr, size) do { } while (0)
443 #define __get_dma_pgprot(attrs, prot) __pgprot(0)
445 #endif /* CONFIG_MMU */
448 __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
449 pgprot_t prot, const void *caller)
455 * Following is a work-around (a.k.a. hack) to prevent pages
456 * with __GFP_COMP being passed to split_page() which cannot
457 * handle them. The real problem is that this flag probably
458 * should be 0 on ARM as it is not supported on this
459 * platform; see CONFIG_HUGETLBFS.
461 gfp &= ~(__GFP_COMP);
463 *handle = DMA_ERROR_CODE;
464 size = PAGE_ALIGN(size);
466 page = __dma_alloc_buffer(dev, size, gfp);
470 if (!arch_is_coherent())
471 addr = __dma_alloc_remap(page, size, gfp, prot, caller);
473 addr = page_address(page);
476 *handle = pfn_to_dma(dev, page_to_pfn(page));
478 __dma_free_buffer(page, size);
484 * Allocate DMA-coherent memory space and return both the kernel remapped
485 * virtual and bus address for that space.
487 void *arm_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
488 gfp_t gfp, struct dma_attrs *attrs)
490 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
493 if (dma_alloc_from_coherent(dev, size, handle, &memory))
496 return __dma_alloc(dev, size, handle, gfp, prot,
497 __builtin_return_address(0));
501 * Create userspace mapping for the DMA-coherent memory.
503 int arm_dma_mmap(struct device *dev, struct vm_area_struct *vma,
504 void *cpu_addr, dma_addr_t dma_addr, size_t size,
505 struct dma_attrs *attrs)
509 unsigned long user_size, kern_size;
510 struct arm_vmregion *c;
512 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
514 if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
517 user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
519 c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
521 unsigned long off = vma->vm_pgoff;
522 struct page *pages = c->priv;
524 kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
526 if (off < kern_size &&
527 user_size <= (kern_size - off)) {
528 ret = remap_pfn_range(vma, vma->vm_start,
529 page_to_pfn(pages) + off,
530 user_size << PAGE_SHIFT,
534 #endif /* CONFIG_MMU */
540 * free a page as defined by the above mapping.
541 * Must not be called with IRQs disabled.
543 void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
544 dma_addr_t handle, struct dma_attrs *attrs)
546 WARN_ON(irqs_disabled());
548 if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
551 size = PAGE_ALIGN(size);
553 if (!arch_is_coherent())
554 __dma_free_remap(cpu_addr, size);
556 __dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size);
559 static void dma_cache_maint_page(struct page *page, unsigned long offset,
560 size_t size, enum dma_data_direction dir,
561 void (*op)(const void *, size_t, int))
564 * A single sg entry may refer to multiple physically contiguous
565 * pages. But we still need to process highmem pages individually.
566 * If highmem is not configured then the bulk of this loop gets
574 if (PageHighMem(page)) {
575 if (len + offset > PAGE_SIZE) {
576 if (offset >= PAGE_SIZE) {
577 page += offset / PAGE_SIZE;
580 len = PAGE_SIZE - offset;
582 vaddr = kmap_high_get(page);
587 } else if (cache_is_vipt()) {
588 /* unmapped pages might still be cached */
589 vaddr = kmap_atomic(page);
590 op(vaddr + offset, len, dir);
591 kunmap_atomic(vaddr);
594 vaddr = page_address(page) + offset;
604 * Make an area consistent for devices.
605 * Note: Drivers should NOT use this function directly, as it will break
606 * platforms with CONFIG_DMABOUNCE.
607 * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
609 static void __dma_page_cpu_to_dev(struct page *page, unsigned long off,
610 size_t size, enum dma_data_direction dir)
614 dma_cache_maint_page(page, off, size, dir, dmac_map_area);
616 paddr = page_to_phys(page) + off;
617 if (dir == DMA_FROM_DEVICE) {
618 outer_inv_range(paddr, paddr + size);
620 outer_clean_range(paddr, paddr + size);
622 /* FIXME: non-speculating: flush on bidirectional mappings? */
625 static void __dma_page_dev_to_cpu(struct page *page, unsigned long off,
626 size_t size, enum dma_data_direction dir)
628 unsigned long paddr = page_to_phys(page) + off;
630 /* FIXME: non-speculating: not required */
631 /* don't bother invalidating if DMA to device */
632 if (dir != DMA_TO_DEVICE)
633 outer_inv_range(paddr, paddr + size);
635 dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
638 * Mark the D-cache clean for this page to avoid extra flushing.
640 if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
641 set_bit(PG_dcache_clean, &page->flags);
645 * arm_dma_map_sg - map a set of SG buffers for streaming mode DMA
646 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
647 * @sg: list of buffers
648 * @nents: number of buffers to map
649 * @dir: DMA transfer direction
651 * Map a set of buffers described by scatterlist in streaming mode for DMA.
652 * This is the scatter-gather version of the dma_map_single interface.
653 * Here the scatter gather list elements are each tagged with the
654 * appropriate dma address and length. They are obtained via
655 * sg_dma_{address,length}.
657 * Device ownership issues as mentioned for dma_map_single are the same
660 int arm_dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
661 enum dma_data_direction dir, struct dma_attrs *attrs)
663 struct dma_map_ops *ops = get_dma_ops(dev);
664 struct scatterlist *s;
667 for_each_sg(sg, s, nents, i) {
668 #ifdef CONFIG_NEED_SG_DMA_LENGTH
669 s->dma_length = s->length;
671 s->dma_address = ops->map_page(dev, sg_page(s), s->offset,
672 s->length, dir, attrs);
673 if (dma_mapping_error(dev, s->dma_address))
679 for_each_sg(sg, s, i, j)
680 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
685 * arm_dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
686 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
687 * @sg: list of buffers
688 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
689 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
691 * Unmap a set of streaming mode DMA translations. Again, CPU access
692 * rules concerning calls here are the same as for dma_unmap_single().
694 void arm_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
695 enum dma_data_direction dir, struct dma_attrs *attrs)
697 struct dma_map_ops *ops = get_dma_ops(dev);
698 struct scatterlist *s;
702 for_each_sg(sg, s, nents, i)
703 ops->unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir, attrs);
707 * arm_dma_sync_sg_for_cpu
708 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
709 * @sg: list of buffers
710 * @nents: number of buffers to map (returned from dma_map_sg)
711 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
713 void arm_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
714 int nents, enum dma_data_direction dir)
716 struct dma_map_ops *ops = get_dma_ops(dev);
717 struct scatterlist *s;
720 for_each_sg(sg, s, nents, i)
721 ops->sync_single_for_cpu(dev, sg_dma_address(s), s->length,
726 * arm_dma_sync_sg_for_device
727 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
728 * @sg: list of buffers
729 * @nents: number of buffers to map (returned from dma_map_sg)
730 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
732 void arm_dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
733 int nents, enum dma_data_direction dir)
735 struct dma_map_ops *ops = get_dma_ops(dev);
736 struct scatterlist *s;
739 for_each_sg(sg, s, nents, i)
740 ops->sync_single_for_device(dev, sg_dma_address(s), s->length,
745 * Return whether the given device DMA address mask can be supported
746 * properly. For example, if your device can only drive the low 24-bits
747 * during bus mastering, then you would pass 0x00ffffff as the mask
750 int dma_supported(struct device *dev, u64 mask)
752 if (mask < (u64)arm_dma_limit)
756 EXPORT_SYMBOL(dma_supported);
758 static int arm_dma_set_mask(struct device *dev, u64 dma_mask)
760 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
763 *dev->dma_mask = dma_mask;
768 #define PREALLOC_DMA_DEBUG_ENTRIES 4096
770 static int __init dma_debug_do_init(void)
773 arm_vmregion_create_proc("dma-mappings", &consistent_head);
775 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
778 fs_initcall(dma_debug_do_init);
780 #ifdef CONFIG_ARM_DMA_USE_IOMMU
784 static inline dma_addr_t __alloc_iova(struct dma_iommu_mapping *mapping,
787 unsigned int order = get_order(size);
788 unsigned int align = 0;
789 unsigned int count, start;
792 count = ((PAGE_ALIGN(size) >> PAGE_SHIFT) +
793 (1 << mapping->order) - 1) >> mapping->order;
795 if (order > mapping->order)
796 align = (1 << (order - mapping->order)) - 1;
798 spin_lock_irqsave(&mapping->lock, flags);
799 start = bitmap_find_next_zero_area(mapping->bitmap, mapping->bits, 0,
801 if (start > mapping->bits) {
802 spin_unlock_irqrestore(&mapping->lock, flags);
803 return DMA_ERROR_CODE;
806 bitmap_set(mapping->bitmap, start, count);
807 spin_unlock_irqrestore(&mapping->lock, flags);
809 return mapping->base + (start << (mapping->order + PAGE_SHIFT));
812 static inline void __free_iova(struct dma_iommu_mapping *mapping,
813 dma_addr_t addr, size_t size)
815 unsigned int start = (addr - mapping->base) >>
816 (mapping->order + PAGE_SHIFT);
817 unsigned int count = ((size >> PAGE_SHIFT) +
818 (1 << mapping->order) - 1) >> mapping->order;
821 spin_lock_irqsave(&mapping->lock, flags);
822 bitmap_clear(mapping->bitmap, start, count);
823 spin_unlock_irqrestore(&mapping->lock, flags);
826 static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
829 int count = size >> PAGE_SHIFT;
830 int array_size = count * sizeof(struct page *);
833 if (array_size <= PAGE_SIZE)
834 pages = kzalloc(array_size, gfp);
836 pages = vzalloc(array_size);
841 int j, order = __ffs(count);
843 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
844 while (!pages[i] && order)
845 pages[i] = alloc_pages(gfp | __GFP_NOWARN, --order);
850 split_page(pages[i], order);
853 pages[i + j] = pages[i] + j;
855 __dma_clear_buffer(pages[i], PAGE_SIZE << order);
864 __free_pages(pages[i], 0);
865 if (array_size < PAGE_SIZE)
872 static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t size)
874 int count = size >> PAGE_SHIFT;
875 int array_size = count * sizeof(struct page *);
877 for (i = 0; i < count; i++)
879 __free_pages(pages[i], 0);
880 if (array_size < PAGE_SIZE)
888 * Create a CPU mapping for a specified pages
891 __iommu_alloc_remap(struct page **pages, size_t size, gfp_t gfp, pgprot_t prot)
893 struct arm_vmregion *c;
895 size_t count = size >> PAGE_SHIFT;
898 if (!consistent_pte[0]) {
899 pr_err("%s: not initialised\n", __func__);
905 * Align the virtual region allocation - maximum alignment is
906 * a section size, minimum is a page size. This helps reduce
907 * fragmentation of the DMA space, and also prevents allocations
908 * smaller than a section from crossing a section boundary.
911 if (bit > SECTION_SHIFT)
916 * Allocate a virtual address in the consistent mapping region.
918 c = arm_vmregion_alloc(&consistent_head, align, size,
919 gfp & ~(__GFP_DMA | __GFP_HIGHMEM), NULL);
922 int idx = CONSISTENT_PTE_INDEX(c->vm_start);
924 u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
926 pte = consistent_pte[idx] + off;
930 BUG_ON(!pte_none(*pte));
932 set_pte_ext(pte, mk_pte(pages[i], prot), 0);
936 if (off >= PTRS_PER_PTE) {
938 pte = consistent_pte[++idx];
944 return (void *)c->vm_start;
950 * Create a mapping in device IO address space for specified pages
953 __iommu_create_mapping(struct device *dev, struct page **pages, size_t size)
955 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
956 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
957 dma_addr_t dma_addr, iova;
958 int i, ret = DMA_ERROR_CODE;
960 dma_addr = __alloc_iova(mapping, size);
961 if (dma_addr == DMA_ERROR_CODE)
965 for (i = 0; i < count; ) {
966 unsigned int next_pfn = page_to_pfn(pages[i]) + 1;
967 phys_addr_t phys = page_to_phys(pages[i]);
970 for (j = i + 1; j < count; j++, next_pfn++)
971 if (page_to_pfn(pages[j]) != next_pfn)
974 len = (j - i) << PAGE_SHIFT;
975 ret = iommu_map(mapping->domain, iova, phys, len, 0);
983 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr);
984 __free_iova(mapping, dma_addr, size);
985 return DMA_ERROR_CODE;
988 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size)
990 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
993 * add optional in-page offset from iova to size and align
994 * result to page size
996 size = PAGE_ALIGN((iova & ~PAGE_MASK) + size);
999 iommu_unmap(mapping->domain, iova, size);
1000 __free_iova(mapping, iova, size);
1004 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
1005 dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
1007 pgprot_t prot = __get_dma_pgprot(attrs, pgprot_kernel);
1008 struct page **pages;
1011 *handle = DMA_ERROR_CODE;
1012 size = PAGE_ALIGN(size);
1014 pages = __iommu_alloc_buffer(dev, size, gfp);
1018 *handle = __iommu_create_mapping(dev, pages, size);
1019 if (*handle == DMA_ERROR_CODE)
1022 addr = __iommu_alloc_remap(pages, size, gfp, prot);
1029 __iommu_remove_mapping(dev, *handle, size);
1031 __iommu_free_buffer(dev, pages, size);
1035 static int arm_iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
1036 void *cpu_addr, dma_addr_t dma_addr, size_t size,
1037 struct dma_attrs *attrs)
1039 struct arm_vmregion *c;
1041 vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot);
1042 c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
1045 struct page **pages = c->priv;
1047 unsigned long uaddr = vma->vm_start;
1048 unsigned long usize = vma->vm_end - vma->vm_start;
1054 ret = vm_insert_page(vma, uaddr, pages[i++]);
1056 pr_err("Remapping memory, error: %d\n", ret);
1062 } while (usize > 0);
1068 * free a page as defined by the above mapping.
1069 * Must not be called with IRQs disabled.
1071 void arm_iommu_free_attrs(struct device *dev, size_t size, void *cpu_addr,
1072 dma_addr_t handle, struct dma_attrs *attrs)
1074 struct arm_vmregion *c;
1075 size = PAGE_ALIGN(size);
1077 c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
1079 struct page **pages = c->priv;
1080 __dma_free_remap(cpu_addr, size);
1081 __iommu_remove_mapping(dev, handle, size);
1082 __iommu_free_buffer(dev, pages, size);
1087 * Map a part of the scatter-gather list into contiguous io address space
1089 static int __map_sg_chunk(struct device *dev, struct scatterlist *sg,
1090 size_t size, dma_addr_t *handle,
1091 enum dma_data_direction dir)
1093 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1094 dma_addr_t iova, iova_base;
1097 struct scatterlist *s;
1099 size = PAGE_ALIGN(size);
1100 *handle = DMA_ERROR_CODE;
1102 iova_base = iova = __alloc_iova(mapping, size);
1103 if (iova == DMA_ERROR_CODE)
1106 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) {
1107 phys_addr_t phys = page_to_phys(sg_page(s));
1108 unsigned int len = PAGE_ALIGN(s->offset + s->length);
1110 if (!arch_is_coherent())
1111 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1113 ret = iommu_map(mapping->domain, iova, phys, len, 0);
1116 count += len >> PAGE_SHIFT;
1119 *handle = iova_base;
1123 iommu_unmap(mapping->domain, iova_base, count * PAGE_SIZE);
1124 __free_iova(mapping, iova_base, size);
1129 * arm_iommu_map_sg - map a set of SG buffers for streaming mode DMA
1130 * @dev: valid struct device pointer
1131 * @sg: list of buffers
1132 * @nents: number of buffers to map
1133 * @dir: DMA transfer direction
1135 * Map a set of buffers described by scatterlist in streaming mode for DMA.
1136 * The scatter gather list elements are merged together (if possible) and
1137 * tagged with the appropriate dma address and length. They are obtained via
1138 * sg_dma_{address,length}.
1140 int arm_iommu_map_sg(struct device *dev, struct scatterlist *sg, int nents,
1141 enum dma_data_direction dir, struct dma_attrs *attrs)
1143 struct scatterlist *s = sg, *dma = sg, *start = sg;
1145 unsigned int offset = s->offset;
1146 unsigned int size = s->offset + s->length;
1147 unsigned int max = dma_get_max_seg_size(dev);
1149 for (i = 1; i < nents; i++) {
1152 s->dma_address = DMA_ERROR_CODE;
1155 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) {
1156 if (__map_sg_chunk(dev, start, size, &dma->dma_address,
1160 dma->dma_address += offset;
1161 dma->dma_length = size - offset;
1163 size = offset = s->offset;
1170 if (__map_sg_chunk(dev, start, size, &dma->dma_address, dir) < 0)
1173 dma->dma_address += offset;
1174 dma->dma_length = size - offset;
1179 for_each_sg(sg, s, count, i)
1180 __iommu_remove_mapping(dev, sg_dma_address(s), sg_dma_len(s));
1185 * arm_iommu_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
1186 * @dev: valid struct device pointer
1187 * @sg: list of buffers
1188 * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
1189 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1191 * Unmap a set of streaming mode DMA translations. Again, CPU access
1192 * rules concerning calls here are the same as for dma_unmap_single().
1194 void arm_iommu_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
1195 enum dma_data_direction dir, struct dma_attrs *attrs)
1197 struct scatterlist *s;
1200 for_each_sg(sg, s, nents, i) {
1202 __iommu_remove_mapping(dev, sg_dma_address(s),
1204 if (!arch_is_coherent())
1205 __dma_page_dev_to_cpu(sg_page(s), s->offset,
1211 * arm_iommu_sync_sg_for_cpu
1212 * @dev: valid struct device pointer
1213 * @sg: list of buffers
1214 * @nents: number of buffers to map (returned from dma_map_sg)
1215 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1217 void arm_iommu_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
1218 int nents, enum dma_data_direction dir)
1220 struct scatterlist *s;
1223 for_each_sg(sg, s, nents, i)
1224 if (!arch_is_coherent())
1225 __dma_page_dev_to_cpu(sg_page(s), s->offset, s->length, dir);
1230 * arm_iommu_sync_sg_for_device
1231 * @dev: valid struct device pointer
1232 * @sg: list of buffers
1233 * @nents: number of buffers to map (returned from dma_map_sg)
1234 * @dir: DMA transfer direction (same as was passed to dma_map_sg)
1236 void arm_iommu_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
1237 int nents, enum dma_data_direction dir)
1239 struct scatterlist *s;
1242 for_each_sg(sg, s, nents, i)
1243 if (!arch_is_coherent())
1244 __dma_page_cpu_to_dev(sg_page(s), s->offset, s->length, dir);
1249 * arm_iommu_map_page
1250 * @dev: valid struct device pointer
1251 * @page: page that buffer resides in
1252 * @offset: offset into page for start of buffer
1253 * @size: size of buffer to map
1254 * @dir: DMA transfer direction
1256 * IOMMU aware version of arm_dma_map_page()
1258 static dma_addr_t arm_iommu_map_page(struct device *dev, struct page *page,
1259 unsigned long offset, size_t size, enum dma_data_direction dir,
1260 struct dma_attrs *attrs)
1262 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1263 dma_addr_t dma_addr;
1264 int ret, len = PAGE_ALIGN(size + offset);
1266 if (!arch_is_coherent())
1267 __dma_page_cpu_to_dev(page, offset, size, dir);
1269 dma_addr = __alloc_iova(mapping, len);
1270 if (dma_addr == DMA_ERROR_CODE)
1273 ret = iommu_map(mapping->domain, dma_addr, page_to_phys(page), len, 0);
1277 return dma_addr + offset;
1279 __free_iova(mapping, dma_addr, len);
1280 return DMA_ERROR_CODE;
1284 * arm_iommu_unmap_page
1285 * @dev: valid struct device pointer
1286 * @handle: DMA address of buffer
1287 * @size: size of buffer (same as passed to dma_map_page)
1288 * @dir: DMA transfer direction (same as passed to dma_map_page)
1290 * IOMMU aware version of arm_dma_unmap_page()
1292 static void arm_iommu_unmap_page(struct device *dev, dma_addr_t handle,
1293 size_t size, enum dma_data_direction dir,
1294 struct dma_attrs *attrs)
1296 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1297 dma_addr_t iova = handle & PAGE_MASK;
1298 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1299 int offset = handle & ~PAGE_MASK;
1300 int len = PAGE_ALIGN(size + offset);
1305 if (!arch_is_coherent())
1306 __dma_page_dev_to_cpu(page, offset, size, dir);
1308 iommu_unmap(mapping->domain, iova, len);
1309 __free_iova(mapping, iova, len);
1312 static void arm_iommu_sync_single_for_cpu(struct device *dev,
1313 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1315 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1316 dma_addr_t iova = handle & PAGE_MASK;
1317 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1318 unsigned int offset = handle & ~PAGE_MASK;
1323 if (!arch_is_coherent())
1324 __dma_page_dev_to_cpu(page, offset, size, dir);
1327 static void arm_iommu_sync_single_for_device(struct device *dev,
1328 dma_addr_t handle, size_t size, enum dma_data_direction dir)
1330 struct dma_iommu_mapping *mapping = dev->archdata.mapping;
1331 dma_addr_t iova = handle & PAGE_MASK;
1332 struct page *page = phys_to_page(iommu_iova_to_phys(mapping->domain, iova));
1333 unsigned int offset = handle & ~PAGE_MASK;
1338 __dma_page_cpu_to_dev(page, offset, size, dir);
1341 struct dma_map_ops iommu_ops = {
1342 .alloc = arm_iommu_alloc_attrs,
1343 .free = arm_iommu_free_attrs,
1344 .mmap = arm_iommu_mmap_attrs,
1346 .map_page = arm_iommu_map_page,
1347 .unmap_page = arm_iommu_unmap_page,
1348 .sync_single_for_cpu = arm_iommu_sync_single_for_cpu,
1349 .sync_single_for_device = arm_iommu_sync_single_for_device,
1351 .map_sg = arm_iommu_map_sg,
1352 .unmap_sg = arm_iommu_unmap_sg,
1353 .sync_sg_for_cpu = arm_iommu_sync_sg_for_cpu,
1354 .sync_sg_for_device = arm_iommu_sync_sg_for_device,
1358 * arm_iommu_create_mapping
1359 * @bus: pointer to the bus holding the client device (for IOMMU calls)
1360 * @base: start address of the valid IO address space
1361 * @size: size of the valid IO address space
1362 * @order: accuracy of the IO addresses allocations
1364 * Creates a mapping structure which holds information about used/unused
1365 * IO address ranges, which is required to perform memory allocation and
1366 * mapping with IOMMU aware functions.
1368 * The client device need to be attached to the mapping with
1369 * arm_iommu_attach_device function.
1371 struct dma_iommu_mapping *
1372 arm_iommu_create_mapping(struct bus_type *bus, dma_addr_t base, size_t size,
1375 unsigned int count = size >> (PAGE_SHIFT + order);
1376 unsigned int bitmap_size = BITS_TO_LONGS(count) * sizeof(long);
1377 struct dma_iommu_mapping *mapping;
1381 return ERR_PTR(-EINVAL);
1383 mapping = kzalloc(sizeof(struct dma_iommu_mapping), GFP_KERNEL);
1387 mapping->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
1388 if (!mapping->bitmap)
1391 mapping->base = base;
1392 mapping->bits = BITS_PER_BYTE * bitmap_size;
1393 mapping->order = order;
1394 spin_lock_init(&mapping->lock);
1396 mapping->domain = iommu_domain_alloc(bus);
1397 if (!mapping->domain)
1400 kref_init(&mapping->kref);
1403 kfree(mapping->bitmap);
1407 return ERR_PTR(err);
1410 static void release_iommu_mapping(struct kref *kref)
1412 struct dma_iommu_mapping *mapping =
1413 container_of(kref, struct dma_iommu_mapping, kref);
1415 iommu_domain_free(mapping->domain);
1416 kfree(mapping->bitmap);
1420 void arm_iommu_release_mapping(struct dma_iommu_mapping *mapping)
1423 kref_put(&mapping->kref, release_iommu_mapping);
1427 * arm_iommu_attach_device
1428 * @dev: valid struct device pointer
1429 * @mapping: io address space mapping structure (returned from
1430 * arm_iommu_create_mapping)
1432 * Attaches specified io address space mapping to the provided device,
1433 * this replaces the dma operations (dma_map_ops pointer) with the
1434 * IOMMU aware version. More than one client might be attached to
1435 * the same io address space mapping.
1437 int arm_iommu_attach_device(struct device *dev,
1438 struct dma_iommu_mapping *mapping)
1442 err = iommu_attach_device(mapping->domain, dev);
1446 kref_get(&mapping->kref);
1447 dev->archdata.mapping = mapping;
1448 set_dma_ops(dev, &iommu_ops);
1450 pr_info("Attached IOMMU controller to %s device.\n", dev_name(dev));