2 * linux/arch/arm/mm/cache-v3.S
4 * Copyright (C) 1997-2002 Russell king
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/linkage.h>
11 #include <linux/init.h>
13 #include "proc-macros.S"
18 * Unconditionally clean and invalidate the entire icache.
20 ENTRY(v3_flush_icache_all)
22 ENDPROC(v3_flush_icache_all)
25 * flush_user_cache_all()
27 * Invalidate all cache entries in a particular address
30 * - mm - mm_struct describing address space
32 ENTRY(v3_flush_user_cache_all)
35 * flush_kern_cache_all()
37 * Clean and invalidate the entire cache.
39 ENTRY(v3_flush_kern_cache_all)
43 * flush_user_cache_range(start, end, flags)
45 * Invalidate a range of cache entries in the specified
48 * - start - start address (may not be aligned)
49 * - end - end address (exclusive, may not be aligned)
50 * - flags - vma_area_struct flags describing address space
52 ENTRY(v3_flush_user_cache_range)
54 mcreq p15, 0, ip, c7, c0, 0 @ flush ID cache
58 * coherent_kern_range(start, end)
60 * Ensure coherency between the Icache and the Dcache in the
61 * region described by start. If you have non-snooping
62 * Harvard caches, you need to implement this function.
64 * - start - virtual start address
65 * - end - virtual end address
67 ENTRY(v3_coherent_kern_range)
71 * coherent_user_range(start, end)
73 * Ensure coherency between the Icache and the Dcache in the
74 * region described by start. If you have non-snooping
75 * Harvard caches, you need to implement this function.
77 * - start - virtual start address
78 * - end - virtual end address
80 ENTRY(v3_coherent_user_range)
85 * flush_kern_dcache_area(void *page, size_t size)
87 * Ensure no D cache aliasing occurs, either with itself or
90 * - addr - kernel address
91 * - size - region size
93 ENTRY(v3_flush_kern_dcache_area)
97 * dma_flush_range(start, end)
99 * Clean and invalidate the specified virtual address range.
101 * - start - virtual start address
102 * - end - virtual end address
104 ENTRY(v3_dma_flush_range)
106 mcr p15, 0, r0, c7, c0, 0 @ flush ID cache
110 * dma_unmap_area(start, size, dir)
111 * - start - kernel virtual start address
112 * - size - size of region
113 * - dir - DMA direction
115 ENTRY(v3_dma_unmap_area)
116 teq r2, #DMA_TO_DEVICE
117 bne v3_dma_flush_range
121 * dma_map_area(start, size, dir)
122 * - start - kernel virtual start address
123 * - size - size of region
124 * - dir - DMA direction
126 ENTRY(v3_dma_map_area)
128 ENDPROC(v3_dma_unmap_area)
129 ENDPROC(v3_dma_map_area)
131 .globl v3_flush_kern_cache_louis
132 .equ v3_flush_kern_cache_louis, v3_flush_kern_cache_all
136 @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
137 define_cache_functions v3