arch/arm/mach-zynqmp/spl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2015 - 2016 Xilinx, Inc.
   4  *
   5  * Michal Simek <michal.simek@xilinx.com>
   6  */
   7
   8 #include <common.h>
   9 #include <debug_uart.h>
  10 #include <init.h>
  11 #include <spl.h>
  12
  13 #include <asm/io.h>
  14 #include <asm/spl.h>
  15 #include <asm/arch/hardware.h>
  16 #include <asm/arch/psu_init_gpl.h>
  17 #include <asm/arch/sys_proto.h>
  18
  19 void board_init_f(ulong dummy)
  20 {
  21         board_early_init_f();
  22         board_early_init_r();
  23
  24 #ifdef CONFIG_DEBUG_UART
  25         /* Uart debug for sure */
  26         debug_uart_init();
  27         puts("Debug uart enabled\n"); /* or printch() */
  28 #endif
  29         /* Delay is required for clocks to be propagated */
  30         udelay(1000000);
  31 }
  32
  33 static void ps_mode_reset(ulong mode)
  34 {
  35         writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
  36                &crlapb_base->boot_pin_ctrl);
  37         udelay(5);
  38         writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
  39                mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
  40                &crlapb_base->boot_pin_ctrl);
  41 }
  42
  43 /*
  44  * Set default PS_MODE1 which is used for USB ULPI phy reset
  45  * Also other resets can be connected to this certain pin
  46  */
  47 #ifndef MODE_RESET
  48 # define MODE_RESET     PS_MODE1
  49 #endif
  50
  51 #ifdef CONFIG_SPL_BOARD_INIT
  52 void spl_board_init(void)
  53 {
  54         preloader_console_init();
  55         ps_mode_reset(MODE_RESET);
  56         board_init();
  57         psu_post_config_data();
  58 }
  59 #endif
  60
  61 void board_boot_order(u32 *spl_boot_list)
  62 {
  63         spl_boot_list[0] = spl_boot_device();
  64
  65         if (spl_boot_list[0] == BOOT_DEVICE_MMC1)
  66                 spl_boot_list[1] = BOOT_DEVICE_MMC2;
  67         if (spl_boot_list[0] == BOOT_DEVICE_MMC2)
  68                 spl_boot_list[1] = BOOT_DEVICE_MMC1;
  69 }
  70
  71 u32 spl_boot_device(void)
  72 {
  73         u32 reg = 0;
  74         u8 bootmode;
  75
  76 #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
  77         /* Change default boot mode at run-time */
  78         writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
  79                &crlapb_base->boot_mode);
  80 #endif
  81
  82         reg = readl(&crlapb_base->boot_mode);
  83         if (reg >> BOOT_MODE_ALT_SHIFT)
  84                 reg >>= BOOT_MODE_ALT_SHIFT;
  85
  86         bootmode = reg & BOOT_MODES_MASK;
  87
  88         switch (bootmode) {
  89         case JTAG_MODE:
  90                 return BOOT_DEVICE_RAM;
  91 #ifdef CONFIG_SPL_MMC_SUPPORT
  92         case SD_MODE1:
  93         case SD1_LSHFT_MODE: /* not working on silicon v1 */
  94                 return BOOT_DEVICE_MMC2;
  95         case SD_MODE:
  96         case EMMC_MODE:
  97                 return BOOT_DEVICE_MMC1;
  98 #endif
  99 #ifdef CONFIG_SPL_DFU
 100         case USB_MODE:
 101                 return BOOT_DEVICE_DFU;
 102 #endif
 103 #ifdef CONFIG_SPL_SATA_SUPPORT
 104         case SW_SATA_MODE:
 105                 return BOOT_DEVICE_SATA;
 106 #endif
 107 #ifdef CONFIG_SPL_SPI_SUPPORT
 108         case QSPI_MODE_24BIT:
 109         case QSPI_MODE_32BIT:
 110                 return BOOT_DEVICE_SPI;
 111 #endif
 112         default:
 113                 printf("Invalid Boot Mode:0x%x\n", bootmode);
 114                 break;
 115         }
 116
 117         return 0;
 118 }
 119
 120 #ifdef CONFIG_SPL_OS_BOOT
 121 int spl_start_uboot(void)
 122 {
 123         handoff_setup();
 124
 125         return 0;
 126 }
 127 #endif
 128
 129 #ifdef CONFIG_SPL_LOAD_FIT
 130 int board_fit_config_name_match(const char *name)
 131 {
 132         /* Just empty function now - can't decide what to choose */
 133         debug("%s: %s\n", __func__, name);
 134
 135         return 0;
 136 }
 137 #endif