1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Weidmüller Interface GmbH & Co. KG
4 * Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
6 * Copyright (C) 2012 Michal Simek <monstr@monstr.eu>
7 * Copyright (C) 2011-2017 Xilinx, Inc. All rights reserved.
10 * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
13 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
15 * (C) Copyright 2002-2004
16 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
19 * Texas Instruments <www.ti.com>
22 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
23 * Marius Groeger <mgroeger@sysgo.de>
26 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
27 * Alex Zuepke <azu@sysgo.de>
37 #include <asm/arch/hardware.h>
38 #include <asm/arch/clk.h>
40 DECLARE_GLOBAL_DATA_PTR;
43 u32 load; /* Timer Load Register */
44 u32 counter; /* Timer Counter Register */
45 u32 control; /* Timer Control Register */
48 static struct scu_timer *timer_base =
49 (struct scu_timer *)ZYNQ_SCUTIMER_BASEADDR;
51 #define SCUTIMER_CONTROL_PRESCALER_MASK 0x0000FF00 /* Prescaler */
52 #define SCUTIMER_CONTROL_PRESCALER_SHIFT 8
53 #define SCUTIMER_CONTROL_AUTO_RELOAD_MASK 0x00000002 /* Auto-reload */
54 #define SCUTIMER_CONTROL_ENABLE_MASK 0x00000001 /* Timer enable */
56 #define TIMER_LOAD_VAL 0xFFFFFFFF
57 #define TIMER_PRESCALE 255
61 const u32 emask = SCUTIMER_CONTROL_AUTO_RELOAD_MASK |
62 (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) |
63 SCUTIMER_CONTROL_ENABLE_MASK;
69 ret = uclass_get_device_by_driver(UCLASS_CLK,
70 DM_GET_DRIVER(zynq_clk), &dev);
74 clk.id = cpu_6or4x_clk;
75 ret = clk_request(dev, &clk);
79 gd->cpu_clk = clk_get_rate(&clk);
83 gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / (TIMER_PRESCALE + 1);
85 /* Load the timer counter register */
86 writel(0xFFFFFFFF, &timer_base->load);
89 * Start the A9Timer device
90 * Enable Auto reload mode, Clear prescaler control bits
91 * Set prescaler value, Enable the decrementer
93 clrsetbits_le32(&timer_base->control, SCUTIMER_CONTROL_PRESCALER_MASK,
97 gd->arch.lastinc = readl(&timer_base->counter) /
98 (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
105 * This function is derived from PowerPC code (timebase clock frequency).
106 * On ARM it returns the number of timer ticks per second.
108 ulong get_tbclk(void)
110 return gd->arch.timer_rate_hz;