2 * Copyright (C) 2008-2009 ST-Ericsson SA
4 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
11 #include <linux/types.h>
12 #include <linux/init.h>
13 #include <linux/device.h>
14 #include <linux/amba/bus.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/platform_device.h>
20 #include <asm/mach/map.h>
22 #include <plat/gpio-nomadik.h>
23 #include <mach/hardware.h>
24 #include <mach/setup.h>
25 #include <mach/devices.h>
27 #include <mach/db8500-regs.h>
29 #include "devices-db8500.h"
30 #include "ste-dma40-db8500.h"
32 /* minimum static i/o mapping required to boot U8500 platforms */
33 static struct map_desc u8500_uart_io_desc[] __initdata = {
34 __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
35 __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
37 /* U8500 and U9540 common io_desc */
38 static struct map_desc u8500_common_io_desc[] __initdata = {
39 /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
40 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
41 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
42 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
43 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
44 __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
46 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
47 __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
48 __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
49 __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
50 __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
52 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
53 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
54 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
55 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
58 /* U8500 IO map specific description */
59 static struct map_desc u8500_io_desc[] __initdata = {
60 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
61 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
65 /* U9540 IO map specific description */
66 static struct map_desc u9540_io_desc[] __initdata = {
67 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
68 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
71 void __init u8500_map_io(void)
74 * Map the UARTs early so that the DEBUG_LL stuff continues to work.
76 iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
80 iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
83 iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
85 iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
87 _PRCMU_BASE = __io_address(U8500_PRCMU_BASE);
90 static struct resource db8500_pmu_resources[] = {
92 .start = IRQ_DB8500_PMU,
93 .end = IRQ_DB8500_PMU,
94 .flags = IORESOURCE_IRQ,
99 * The PMU IRQ lines of two cores are wired together into a single interrupt.
100 * Bounce the interrupt to the other core if it's not ours.
102 static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
104 irqreturn_t ret = handler(irq, dev);
105 int other = !smp_processor_id();
107 if (ret == IRQ_NONE && cpu_online(other))
108 irq_set_affinity(irq, cpumask_of(other));
111 * We should be able to get away with the amount of IRQ_NONEs we give,
112 * while still having the spurious IRQ detection code kick in if the
113 * interrupt really starts hitting spuriously.
118 static struct arm_pmu_platdata db8500_pmu_platdata = {
119 .handle_irq = db8500_pmu_handler,
122 static struct platform_device db8500_pmu_device = {
124 .id = ARM_PMU_DEVICE_CPU,
125 .num_resources = ARRAY_SIZE(db8500_pmu_resources),
126 .resource = db8500_pmu_resources,
127 .dev.platform_data = &db8500_pmu_platdata,
130 static struct platform_device db8500_prcmu_device = {
131 .name = "db8500-prcmu",
134 static struct platform_device *platform_devs[] __initdata = {
137 &db8500_prcmu_device,
140 static struct platform_device *of_platform_devs[] __initdata = {
144 static resource_size_t __initdata db8500_gpio_base[] = {
145 U8500_GPIOBANK0_BASE,
146 U8500_GPIOBANK1_BASE,
147 U8500_GPIOBANK2_BASE,
148 U8500_GPIOBANK3_BASE,
149 U8500_GPIOBANK4_BASE,
150 U8500_GPIOBANK5_BASE,
151 U8500_GPIOBANK6_BASE,
152 U8500_GPIOBANK7_BASE,
153 U8500_GPIOBANK8_BASE,
156 static void __init db8500_add_gpios(struct device *parent)
158 struct nmk_gpio_platform_data pdata = {
159 .supports_sleepmode = true,
162 dbx500_add_gpios(parent, ARRAY_AND_SIZE(db8500_gpio_base),
163 IRQ_DB8500_GPIO0, &pdata);
164 dbx500_add_pinctrl(parent, "pinctrl-db8500");
167 static int usb_db8500_rx_dma_cfg[] = {
168 DB8500_DMA_DEV38_USB_OTG_IEP_1_9,
169 DB8500_DMA_DEV37_USB_OTG_IEP_2_10,
170 DB8500_DMA_DEV36_USB_OTG_IEP_3_11,
171 DB8500_DMA_DEV19_USB_OTG_IEP_4_12,
172 DB8500_DMA_DEV18_USB_OTG_IEP_5_13,
173 DB8500_DMA_DEV17_USB_OTG_IEP_6_14,
174 DB8500_DMA_DEV16_USB_OTG_IEP_7_15,
175 DB8500_DMA_DEV39_USB_OTG_IEP_8
178 static int usb_db8500_tx_dma_cfg[] = {
179 DB8500_DMA_DEV38_USB_OTG_OEP_1_9,
180 DB8500_DMA_DEV37_USB_OTG_OEP_2_10,
181 DB8500_DMA_DEV36_USB_OTG_OEP_3_11,
182 DB8500_DMA_DEV19_USB_OTG_OEP_4_12,
183 DB8500_DMA_DEV18_USB_OTG_OEP_5_13,
184 DB8500_DMA_DEV17_USB_OTG_OEP_6_14,
185 DB8500_DMA_DEV16_USB_OTG_OEP_7_15,
186 DB8500_DMA_DEV39_USB_OTG_OEP_8
189 static const char *db8500_read_soc_id(void)
191 void __iomem *uid = __io_address(U8500_BB_UID_BASE);
193 return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
195 readl((u32 *)uid+1), readl((u32 *)uid+2),
196 readl((u32 *)uid+3), readl((u32 *)uid+4));
199 static struct device * __init db8500_soc_device_init(void)
201 const char *soc_id = db8500_read_soc_id();
203 return ux500_soc_device_init(soc_id);
207 * This function is called from the board init
209 struct device * __init u8500_init_devices(void)
211 struct device *parent;
214 parent = db8500_soc_device_init();
216 db8500_add_rtc(parent);
217 db8500_add_gpios(parent);
218 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
220 platform_device_register_data(parent,
221 "cpufreq-u8500", -1, NULL, 0);
223 for (i = 0; i < ARRAY_SIZE(platform_devs); i++)
224 platform_devs[i]->dev.parent = parent;
226 platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs));
231 /* TODO: Once all pieces are DT:ed, remove completely. */
232 struct device * __init u8500_of_init_devices(void)
234 struct device *parent;
237 parent = db8500_soc_device_init();
239 db8500_add_usb(parent, usb_db8500_rx_dma_cfg, usb_db8500_tx_dma_cfg);
241 platform_device_register_data(parent,
242 "cpufreq-u8500", -1, NULL, 0);
244 for (i = 0; i < ARRAY_SIZE(of_platform_devs); i++)
245 of_platform_devs[i]->dev.parent = parent;
248 * Devices to be DT:ed:
249 * u8500_dma40_device = todo
250 * db8500_pmu_device = done
251 * db8500_prcmu_device = done
253 platform_add_devices(of_platform_devs, ARRAY_SIZE(of_platform_devs));