3 * Copyright (C) 2008-2009 ST-Ericsson
5 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2, as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/platform_device.h>
17 #include <linux/i2c.h>
18 #include <linux/gpio.h>
19 #include <linux/amba/bus.h>
20 #include <linux/amba/pl022.h>
21 #include <linux/amba/serial.h>
22 #include <linux/spi/spi.h>
23 #include <linux/mfd/abx500/ab8500.h>
24 #include <linux/regulator/ab8500.h>
25 #include <linux/mfd/tc3589x.h>
26 #include <linux/mfd/tps6105x.h>
27 #include <linux/mfd/abx500/ab8500-gpio.h>
28 #include <linux/leds-lp5521.h>
29 #include <linux/input.h>
30 #include <linux/smsc911x.h>
31 #include <linux/gpio_keys.h>
32 #include <linux/delay.h>
34 #include <linux/of_platform.h>
35 #include <linux/leds.h>
36 #include <linux/pinctrl/consumer.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/hardware/gic.h>
43 #include <plat/ste_dma40.h>
44 #include <plat/gpio-nomadik.h>
46 #include <mach/hardware.h>
47 #include <mach/setup.h>
48 #include <mach/devices.h>
49 #include <mach/irqs.h>
50 #include <mach/crypto-ux500.h>
52 #include "ste-dma40-db8500.h"
53 #include "devices-db8500.h"
54 #include "board-mop500.h"
55 #include "board-mop500-regulators.h"
56 #include "board-mop500-msp.h"
58 static struct gpio_led snowball_led_array[] = {
61 .default_trigger = "none",
66 static struct gpio_led_platform_data snowball_led_data = {
67 .leds = snowball_led_array,
68 .num_leds = ARRAY_SIZE(snowball_led_array),
71 static struct platform_device snowball_led_dev = {
74 .platform_data = &snowball_led_data,
78 static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
79 .gpio_base = MOP500_AB8500_PIN_GPIO(1),
80 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
81 /* config_reg is the initial configuration of ab8500 pins.
82 * The pins can be configured as GPIO or alt functions based
83 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
84 * register. This is the array of 7 configuration settings.
85 * One has to compile time decide these settings. Below is the
86 * explanation of these setting
87 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
88 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
89 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
90 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
91 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
92 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
93 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
94 * as GPIO then this register selectes the alternate fucntions
96 .config_reg = {0x00, 0x1E, 0x80, 0x01,
100 static struct gpio_keys_button snowball_key_array[] = {
107 .debounce_interval = 50,
116 .debounce_interval = 50,
125 .debounce_interval = 50,
134 .debounce_interval = 50,
143 .debounce_interval = 50,
148 static struct gpio_keys_platform_data snowball_key_data = {
149 .buttons = snowball_key_array,
150 .nbuttons = ARRAY_SIZE(snowball_key_array),
153 static struct platform_device snowball_key_dev = {
157 .platform_data = &snowball_key_data,
161 static struct smsc911x_platform_config snowball_sbnet_cfg = {
162 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
163 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
164 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
168 static struct resource sbnet_res[] = {
170 .name = "smsc911x-memory",
171 .start = (0x5000 << 16),
172 .end = (0x5000 << 16) + 0xffff,
173 .flags = IORESOURCE_MEM,
176 .start = NOMADIK_GPIO_TO_IRQ(140),
177 .end = NOMADIK_GPIO_TO_IRQ(140),
178 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
182 static struct platform_device snowball_sbnet_dev = {
184 .num_resources = ARRAY_SIZE(sbnet_res),
185 .resource = sbnet_res,
187 .platform_data = &snowball_sbnet_cfg,
191 static struct ab8500_platform_data ab8500_platdata = {
192 .irq_base = MOP500_AB8500_IRQ_BASE,
193 .regulator_reg_init = ab8500_regulator_reg_init,
194 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
195 .regulator = ab8500_regulators,
196 .num_regulator = ARRAY_SIZE(ab8500_regulators),
197 .gpio = &ab8500_gpio_pdata,
200 static struct resource ab8500_resources[] = {
202 .start = IRQ_DB8500_AB8500,
203 .end = IRQ_DB8500_AB8500,
204 .flags = IORESOURCE_IRQ
208 struct platform_device ab8500_device = {
209 .name = "ab8500-i2c",
212 .platform_data = &ab8500_platdata,
215 .resource = ab8500_resources,
222 static struct tps6105x_platform_data mop500_tps61052_data = {
223 .mode = TPS6105X_MODE_VOLTAGE,
224 .regulator_data = &tps61052_regulator,
231 static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
233 struct device *parent = NULL;
235 /* FIXME: Is the sdi actually part of tc3589x? */
236 parent = tc3589x->dev;
238 mop500_sdi_tc35892_init(parent);
241 static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
242 .gpio_base = MOP500_EGPIO(0),
243 .setup = mop500_tc35892_init,
246 static struct tc3589x_platform_data mop500_tc35892_data = {
247 .block = TC3589x_BLOCK_GPIO,
248 .gpio = &mop500_tc35892_gpio_data,
249 .irq_base = MOP500_EGPIO_IRQ_BASE,
252 static struct lp5521_led_config lp5521_pri_led[] = {
270 static struct lp5521_platform_data __initdata lp5521_pri_data = {
271 .label = "lp5521_pri",
272 .led_config = &lp5521_pri_led[0],
274 .clock_mode = LP5521_CLOCK_EXT,
277 static struct lp5521_led_config lp5521_sec_led[] = {
295 static struct lp5521_platform_data __initdata lp5521_sec_data = {
296 .label = "lp5521_sec",
297 .led_config = &lp5521_sec_led[0],
299 .clock_mode = LP5521_CLOCK_EXT,
302 static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
304 I2C_BOARD_INFO("tc3589x", 0x42),
305 .irq = NOMADIK_GPIO_TO_IRQ(217),
306 .platform_data = &mop500_tc35892_data,
308 /* I2C0 devices only available prior to HREFv60 */
310 I2C_BOARD_INFO("tps61052", 0x33),
311 .platform_data = &mop500_tps61052_data,
315 #define NUM_PRE_V60_I2C0_DEVICES 1
317 static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
319 /* lp5521 LED driver, 1st device */
320 I2C_BOARD_INFO("lp5521", 0x33),
321 .platform_data = &lp5521_pri_data,
324 /* lp5521 LED driver, 2st device */
325 I2C_BOARD_INFO("lp5521", 0x34),
326 .platform_data = &lp5521_sec_data,
329 /* Light sensor Rohm BH1780GLI */
330 I2C_BOARD_INFO("bh1780", 0x29),
334 #define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \
335 static struct nmk_i2c_controller u8500_i2c##id##_data = { \
337 * slave data setup time, which is \
338 * 250 ns,100ns,10ns which is 14,6,2 \
339 * respectively for a 48 Mhz \
343 /* Tx FIFO threshold */ \
345 /* Rx FIFO threshold */ \
347 /* std. mode operation */ \
349 /* Slave response timeout(ms) */\
355 * The board uses 4 i2c controllers, initialize all of
356 * them with slave data setup time of 250 ns,
357 * Tx & Rx FIFO threshold values as 8 and standard
360 U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
361 U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
362 U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
363 U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
365 static void __init mop500_i2c_init(struct device *parent)
367 db8500_add_i2c0(parent, &u8500_i2c0_data);
368 db8500_add_i2c1(parent, &u8500_i2c1_data);
369 db8500_add_i2c2(parent, &u8500_i2c2_data);
370 db8500_add_i2c3(parent, &u8500_i2c3_data);
373 static struct gpio_keys_button mop500_gpio_keys[] = {
375 .desc = "SFH7741 Proximity Sensor",
377 .code = SW_FRONT_PROXIMITY,
383 static struct regulator *prox_regulator;
384 static int mop500_prox_activate(struct device *dev);
385 static void mop500_prox_deactivate(struct device *dev);
387 static struct gpio_keys_platform_data mop500_gpio_keys_data = {
388 .buttons = mop500_gpio_keys,
389 .nbuttons = ARRAY_SIZE(mop500_gpio_keys),
390 .enable = mop500_prox_activate,
391 .disable = mop500_prox_deactivate,
394 static struct platform_device mop500_gpio_keys_device = {
398 .platform_data = &mop500_gpio_keys_data,
402 static int mop500_prox_activate(struct device *dev)
404 prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
406 if (IS_ERR(prox_regulator)) {
407 dev_err(&mop500_gpio_keys_device.dev,
409 return PTR_ERR(prox_regulator);
411 regulator_enable(prox_regulator);
415 static void mop500_prox_deactivate(struct device *dev)
417 regulator_disable(prox_regulator);
418 regulator_put(prox_regulator);
421 static struct cryp_platform_data u8500_cryp1_platform_data = {
423 .dir = STEDMA40_MEM_TO_PERIPH,
424 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
425 .dst_dev_type = DB8500_DMA_DEV48_CAC1_TX,
426 .src_info.data_width = STEDMA40_WORD_WIDTH,
427 .dst_info.data_width = STEDMA40_WORD_WIDTH,
428 .mode = STEDMA40_MODE_LOGICAL,
429 .src_info.psize = STEDMA40_PSIZE_LOG_4,
430 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
433 .dir = STEDMA40_PERIPH_TO_MEM,
434 .src_dev_type = DB8500_DMA_DEV48_CAC1_RX,
435 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
436 .src_info.data_width = STEDMA40_WORD_WIDTH,
437 .dst_info.data_width = STEDMA40_WORD_WIDTH,
438 .mode = STEDMA40_MODE_LOGICAL,
439 .src_info.psize = STEDMA40_PSIZE_LOG_4,
440 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
444 static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
445 .dir = STEDMA40_MEM_TO_PERIPH,
446 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
447 .dst_dev_type = DB8500_DMA_DEV50_HAC1_TX,
448 .src_info.data_width = STEDMA40_WORD_WIDTH,
449 .dst_info.data_width = STEDMA40_WORD_WIDTH,
450 .mode = STEDMA40_MODE_LOGICAL,
451 .src_info.psize = STEDMA40_PSIZE_LOG_16,
452 .dst_info.psize = STEDMA40_PSIZE_LOG_16,
455 static struct hash_platform_data u8500_hash1_platform_data = {
456 .mem_to_engine = &u8500_hash_dma_cfg_tx,
457 .dma_filter = stedma40_filter,
460 /* add any platform devices here - TODO */
461 static struct platform_device *mop500_platform_devs[] __initdata = {
462 &mop500_gpio_keys_device,
466 #ifdef CONFIG_STE_DMA40
467 static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
468 .mode = STEDMA40_MODE_LOGICAL,
469 .dir = STEDMA40_PERIPH_TO_MEM,
470 .src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
471 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
472 .src_info.data_width = STEDMA40_BYTE_WIDTH,
473 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
476 static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
477 .mode = STEDMA40_MODE_LOGICAL,
478 .dir = STEDMA40_MEM_TO_PERIPH,
479 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
480 .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
481 .src_info.data_width = STEDMA40_BYTE_WIDTH,
482 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
486 static struct pl022_ssp_controller ssp0_plat = {
488 #ifdef CONFIG_STE_DMA40
490 .dma_filter = stedma40_filter,
491 .dma_rx_param = &ssp0_dma_cfg_rx,
492 .dma_tx_param = &ssp0_dma_cfg_tx,
496 /* on this platform, gpio 31,142,144,214 &
497 * 224 are connected as chip selects
502 static void __init mop500_spi_init(struct device *parent)
504 db8500_add_ssp0(parent, &ssp0_plat);
507 #ifdef CONFIG_STE_DMA40
508 static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
509 .mode = STEDMA40_MODE_LOGICAL,
510 .dir = STEDMA40_PERIPH_TO_MEM,
511 .src_dev_type = DB8500_DMA_DEV13_UART0_RX,
512 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
513 .src_info.data_width = STEDMA40_BYTE_WIDTH,
514 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
517 static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
518 .mode = STEDMA40_MODE_LOGICAL,
519 .dir = STEDMA40_MEM_TO_PERIPH,
520 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
521 .dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
522 .src_info.data_width = STEDMA40_BYTE_WIDTH,
523 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
526 static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
527 .mode = STEDMA40_MODE_LOGICAL,
528 .dir = STEDMA40_PERIPH_TO_MEM,
529 .src_dev_type = DB8500_DMA_DEV12_UART1_RX,
530 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
531 .src_info.data_width = STEDMA40_BYTE_WIDTH,
532 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
535 static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
536 .mode = STEDMA40_MODE_LOGICAL,
537 .dir = STEDMA40_MEM_TO_PERIPH,
538 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
539 .dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
540 .src_info.data_width = STEDMA40_BYTE_WIDTH,
541 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
544 static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
545 .mode = STEDMA40_MODE_LOGICAL,
546 .dir = STEDMA40_PERIPH_TO_MEM,
547 .src_dev_type = DB8500_DMA_DEV11_UART2_RX,
548 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
549 .src_info.data_width = STEDMA40_BYTE_WIDTH,
550 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
553 static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
554 .mode = STEDMA40_MODE_LOGICAL,
555 .dir = STEDMA40_MEM_TO_PERIPH,
556 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
557 .dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
558 .src_info.data_width = STEDMA40_BYTE_WIDTH,
559 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
563 #define PRCC_K_SOFTRST_SET 0x18
564 #define PRCC_K_SOFTRST_CLEAR 0x1C
565 static void ux500_uart0_reset(void)
567 void __iomem *prcc_rst_set, *prcc_rst_clr;
569 prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
571 prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
572 PRCC_K_SOFTRST_CLEAR);
574 /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
575 writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
578 /* Release soft reset PRCC_K_SOFTRST_SET */
579 writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
583 /* This needs to be referenced by callbacks */
584 struct pinctrl *u0_p;
585 struct pinctrl_state *u0_def;
586 struct pinctrl_state *u0_sleep;
588 static void ux500_uart0_init(void)
592 if (IS_ERR(u0_p) || IS_ERR(u0_def))
595 ret = pinctrl_select_state(u0_p, u0_def);
597 pr_err("could not set UART0 defstate\n");
600 static void ux500_uart0_exit(void)
604 if (IS_ERR(u0_p) || IS_ERR(u0_sleep))
607 ret = pinctrl_select_state(u0_p, u0_sleep);
609 pr_err("could not set UART0 idlestate\n");
612 static struct amba_pl011_data uart0_plat = {
613 #ifdef CONFIG_STE_DMA40
614 .dma_filter = stedma40_filter,
615 .dma_rx_param = &uart0_dma_cfg_rx,
616 .dma_tx_param = &uart0_dma_cfg_tx,
618 .init = ux500_uart0_init,
619 .exit = ux500_uart0_exit,
620 .reset = ux500_uart0_reset,
623 static struct amba_pl011_data uart1_plat = {
624 #ifdef CONFIG_STE_DMA40
625 .dma_filter = stedma40_filter,
626 .dma_rx_param = &uart1_dma_cfg_rx,
627 .dma_tx_param = &uart1_dma_cfg_tx,
631 static struct amba_pl011_data uart2_plat = {
632 #ifdef CONFIG_STE_DMA40
633 .dma_filter = stedma40_filter,
634 .dma_rx_param = &uart2_dma_cfg_rx,
635 .dma_tx_param = &uart2_dma_cfg_tx,
639 static void __init mop500_uart_init(struct device *parent)
641 struct amba_device *uart0_device;
643 uart0_device = db8500_add_uart0(parent, &uart0_plat);
645 u0_p = pinctrl_get(&uart0_device->dev);
647 dev_err(&uart0_device->dev,
648 "could not get UART0 pinctrl\n");
650 u0_def = pinctrl_lookup_state(u0_p,
651 PINCTRL_STATE_DEFAULT);
652 if (IS_ERR(u0_def)) {
653 dev_err(&uart0_device->dev,
654 "could not get UART0 defstate\n");
656 u0_sleep = pinctrl_lookup_state(u0_p,
657 PINCTRL_STATE_SLEEP);
658 if (IS_ERR(u0_sleep))
659 dev_err(&uart0_device->dev,
660 "could not get UART0 idlestate\n");
663 db8500_add_uart1(parent, &uart1_plat);
664 db8500_add_uart2(parent, &uart2_plat);
667 static void __init u8500_cryp1_hash1_init(struct device *parent)
669 db8500_add_cryp1(parent, &u8500_cryp1_platform_data);
670 db8500_add_hash1(parent, &u8500_hash1_platform_data);
673 static struct platform_device *snowball_platform_devs[] __initdata = {
679 static void __init mop500_init_machine(void)
681 struct device *parent = NULL;
685 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
687 mop500_pinmaps_init();
688 parent = u8500_init_devices();
690 /* FIXME: parent of ab8500 should be prcmu */
691 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
692 mop500_platform_devs[i]->dev.parent = parent;
694 platform_add_devices(mop500_platform_devs,
695 ARRAY_SIZE(mop500_platform_devs));
697 mop500_i2c_init(parent);
698 mop500_sdi_init(parent);
699 mop500_spi_init(parent);
700 mop500_msp_init(parent);
701 mop500_uart_init(parent);
703 u8500_cryp1_hash1_init(parent);
705 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
707 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
708 i2c_register_board_info(2, mop500_i2c2_devices,
709 ARRAY_SIZE(mop500_i2c2_devices));
711 /* This board has full regulator constraints */
712 regulator_has_full_constraints();
715 static void __init snowball_init_machine(void)
717 struct device *parent = NULL;
720 snowball_pinmaps_init();
721 parent = u8500_init_devices();
723 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
724 snowball_platform_devs[i]->dev.parent = parent;
726 platform_add_devices(snowball_platform_devs,
727 ARRAY_SIZE(snowball_platform_devs));
729 mop500_i2c_init(parent);
730 snowball_sdi_init(parent);
731 mop500_spi_init(parent);
732 mop500_msp_init(parent);
733 mop500_uart_init(parent);
735 /* This board has full regulator constraints */
736 regulator_has_full_constraints();
739 static void __init hrefv60_init_machine(void)
741 struct device *parent = NULL;
746 * The HREFv60 board removed a GPIO expander and routed
747 * all these GPIO pins to the internal GPIO controller
750 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
752 hrefv60_pinmaps_init();
753 parent = u8500_init_devices();
755 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
756 mop500_platform_devs[i]->dev.parent = parent;
758 platform_add_devices(mop500_platform_devs,
759 ARRAY_SIZE(mop500_platform_devs));
761 mop500_i2c_init(parent);
762 hrefv60_sdi_init(parent);
763 mop500_spi_init(parent);
764 mop500_msp_init(parent);
765 mop500_uart_init(parent);
767 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
769 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
771 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
772 i2c_register_board_info(2, mop500_i2c2_devices,
773 ARRAY_SIZE(mop500_i2c2_devices));
775 /* This board has full regulator constraints */
776 regulator_has_full_constraints();
779 MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
780 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
781 .atag_offset = 0x100,
782 .map_io = u8500_map_io,
783 .init_irq = ux500_init_irq,
784 /* we re-use nomadik timer here */
785 .timer = &ux500_timer,
786 .handle_irq = gic_handle_irq,
787 .init_machine = mop500_init_machine,
790 MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
791 .atag_offset = 0x100,
792 .map_io = u8500_map_io,
793 .init_irq = ux500_init_irq,
794 .timer = &ux500_timer,
795 .handle_irq = gic_handle_irq,
796 .init_machine = hrefv60_init_machine,
799 MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
800 .atag_offset = 0x100,
801 .map_io = u8500_map_io,
802 .init_irq = ux500_init_irq,
803 /* we re-use nomadik timer here */
804 .timer = &ux500_timer,
805 .handle_irq = gic_handle_irq,
806 .init_machine = snowball_init_machine,
809 #ifdef CONFIG_MACH_UX500_DT
811 struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
812 /* Requires DMA and call-back bindings. */
813 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
814 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
815 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
816 /* Requires DMA bindings. */
817 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
818 /* Requires clock name bindings. */
819 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
820 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
821 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
822 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
823 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
824 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
825 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
826 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
827 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
831 static const struct of_device_id u8500_local_bus_nodes[] = {
832 /* only create devices below soc node */
833 { .compatible = "stericsson,db8500", },
834 { .compatible = "simple-bus"},
838 static void __init u8500_init_machine(void)
840 struct device *parent = NULL;
844 /* Pinmaps must be in place before devices register */
845 if (of_machine_is_compatible("st-ericsson,mop500"))
846 mop500_pinmaps_init();
847 else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
848 snowball_pinmaps_init();
849 else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
850 hrefv60_pinmaps_init();
852 parent = u8500_init_devices();
854 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
855 mop500_platform_devs[i]->dev.parent = parent;
856 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
857 snowball_platform_devs[i]->dev.parent = parent;
859 /* automatically probe child nodes of db8500 device */
860 of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
862 if (of_machine_is_compatible("st-ericsson,mop500")) {
863 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
865 platform_add_devices(mop500_platform_devs,
866 ARRAY_SIZE(mop500_platform_devs));
868 mop500_sdi_init(parent);
870 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
871 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
872 i2c_register_board_info(2, mop500_i2c2_devices,
873 ARRAY_SIZE(mop500_i2c2_devices));
875 } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
876 platform_add_devices(snowball_platform_devs,
877 ARRAY_SIZE(snowball_platform_devs));
879 snowball_sdi_init(parent);
880 } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
882 * The HREFv60 board removed a GPIO expander and routed
883 * all these GPIO pins to the internal GPIO controller
886 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
887 platform_add_devices(mop500_platform_devs,
888 ARRAY_SIZE(mop500_platform_devs));
890 hrefv60_sdi_init(parent);
892 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
893 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
895 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
896 i2c_register_board_info(2, mop500_i2c2_devices,
897 ARRAY_SIZE(mop500_i2c2_devices));
899 mop500_i2c_init(parent);
901 /* This board has full regulator constraints */
902 regulator_has_full_constraints();
905 static const char * u8500_dt_board_compat[] = {
906 "calaosystems,snowball-a9500",
907 "st-ericsson,hrefv60+",
909 "st-ericsson,mop500",
914 DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
915 .map_io = u8500_map_io,
916 .init_irq = ux500_init_irq,
917 /* we re-use nomadik timer here */
918 .timer = &ux500_timer,
919 .handle_irq = gic_handle_irq,
920 .init_machine = u8500_init_machine,
921 .dt_compat = u8500_dt_board_compat,