2 * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <mach/sbc-regs.h>
10 #include <mach/sg-regs.h>
16 /* system bus output enable */
21 /* XECS1: sub/boot memory (boot swap = off/on) */
22 writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10);
23 writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11);
24 writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12);
25 writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14);
27 /* XECS0: boot/sub memory (boot swap = off/on) */
28 writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00);
29 writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01);
30 writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02);
31 writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04);
33 /* XECS3: peripherals */
34 writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30);
35 writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31);
36 writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32);
37 writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34);
39 /* base address regsiters */
40 writel(0x0000bc01, SBBASE0);
41 writel(0x0400bc01, SBBASE1);
42 writel(0x0800bf01, SBBASE3);
44 /* enable access to sub memory when boot swap is on */
45 if (boot_is_swapped())
46 sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */
48 sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */