arch/arm/mach-uniphier/ph1-ld4/sbc_init.c

   1 /*
   2  * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <linux/io.h>
   9 #include <mach/sbc-regs.h>
  10 #include <mach/sg-regs.h>
  11
  12 void sbc_init(void)
  13 {
  14         u32 tmp;
  15
  16         /* system bus output enable */
  17         tmp = readl(PC0CTRL);
  18         tmp &= 0xfffffcff;
  19         writel(tmp, PC0CTRL);
  20
  21         /*
  22          * Only CS1 is connected to support card.
  23          * BKSZ[1:0] should be set to "01".
  24          */
  25         writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10);
  26         writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11);
  27         writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12);
  28         writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14);
  29
  30         if (boot_is_swapped()) {
  31                 /*
  32                  * Boot Swap On: boot from external NOR/SRAM
  33                  * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff.
  34                  *
  35                  * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank
  36                  * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals
  37                  */
  38                 writel(0x0000bc01, SBBASE0);
  39         } else {
  40                 /*
  41                  * Boot Swap Off: boot from mask ROM
  42                  * 0x40000000-0x41ffffff: mask ROM
  43                  * 0x42000000-0x43efffff: memory bank (31MB)
  44                  * 0x43f00000-0x43ffffff: peripherals (1MB)
  45                  */
  46                 writel(0x0000be01, SBBASE0); /* dummy */
  47                 writel(0x0200be01, SBBASE1);
  48         }
  49 }