2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
14 #include "micro-support-card.h"
18 DECLARE_GLOBAL_DATA_PTR;
20 static void uniphier_setup_xirq(void)
22 const void *fdt = gd->fdt_blob;
23 int soc_node, aidet_node;
25 unsigned long aidet_base;
28 soc_node = fdt_path_offset(fdt, "/soc");
32 aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5);
36 val = fdt_getprop(fdt, aidet_node, "reg", NULL);
40 aidet_base = fdt32_to_cpu(*val);
42 tmp = readl(aidet_base + 8); /* AIDET DETCONFR2 */
43 tmp |= 0x00ff0000; /* Set XIRQ0-7 low active */
44 writel(tmp, aidet_base + 8);
46 tmp = readl(0x55000090); /* IRQCTL */
48 writel(tmp, 0x55000090);
51 static void uniphier_nand_pin_init(bool cs2)
53 #ifdef CONFIG_NAND_DENALI
54 if (uniphier_pin_init(cs2 ? "nand2cs_grp" : "nand_grp"))
55 pr_err("failed to init NAND pins\n");
63 switch (uniphier_get_soc_type()) {
64 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
65 case SOC_UNIPHIER_SLD3:
66 uniphier_nand_pin_init(true);
68 uniphier_ld4_clk_init();
71 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
72 case SOC_UNIPHIER_LD4:
73 uniphier_nand_pin_init(true);
75 uniphier_ld4_clk_init();
78 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
79 case SOC_UNIPHIER_PRO4:
80 uniphier_nand_pin_init(false);
82 uniphier_pro4_clk_init();
85 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
86 case SOC_UNIPHIER_SLD8:
87 uniphier_nand_pin_init(true);
89 uniphier_ld4_clk_init();
92 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
93 case SOC_UNIPHIER_PRO5:
94 uniphier_nand_pin_init(true);
96 uniphier_pro5_clk_init();
99 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
100 case SOC_UNIPHIER_PXS2:
101 uniphier_nand_pin_init(true);
103 uniphier_pxs2_clk_init();
106 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
107 case SOC_UNIPHIER_LD6B:
108 uniphier_nand_pin_init(true);
110 uniphier_pxs2_clk_init();
113 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
114 case SOC_UNIPHIER_LD11:
115 uniphier_nand_pin_init(false);
116 sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
118 sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
121 uniphier_ld11_clk_init();
124 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
125 case SOC_UNIPHIER_LD20:
126 uniphier_nand_pin_init(false);
127 sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
129 sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
132 uniphier_ld20_clk_init();
140 uniphier_setup_xirq();
144 support_card_late_init();
149 uniphier_smp_kick_all_cpus();