3 * arch/arm/mach-u300/include/mach/u300-regs.h
6 * Copyright (C) 2006-2009 ST-Ericsson AB
7 * License terms: GNU General Public License (GPL) version 2
8 * Basic register address definitions in physical memory and
9 * some block definitions for core devices like the timer.
10 * Author: Linus Walleij <linus.walleij@stericsson.com>
13 #ifndef __MACH_U300_REGS_H
14 #define __MACH_U300_REGS_H
17 * These are the large blocks of memory allocated for I/O.
18 * the defines are used for setting up the I/O memory mapping.
22 #define U300_NAND_CS0_PHYS_BASE 0x80000000
25 #define U300_NAND_IF_PHYS_BASE 0x9f800000
27 /* ALE, CLE offset for FSMC NAND */
28 #define PLAT_NAND_CLE (1 << 16)
29 #define PLAT_NAND_ALE (1 << 17)
33 #define U300_AHB_PER_PHYS_BASE 0xa0000000
34 #define U300_AHB_PER_VIRT_BASE 0xff010000
36 /* FAST Peripherals */
37 #define U300_FAST_PER_PHYS_BASE 0xc0000000
38 #define U300_FAST_PER_VIRT_BASE 0xff020000
40 /* SLOW Peripherals */
41 #define U300_SLOW_PER_PHYS_BASE 0xc0010000
42 #define U300_SLOW_PER_VIRT_BASE 0xff000000
45 #define U300_BOOTROM_PHYS_BASE 0xffff0000
46 #define U300_BOOTROM_VIRT_BASE 0xffff0000
48 /* SEMI config base */
49 #ifdef CONFIG_MACH_U300_BS335
50 #define U300_SEMI_CONFIG_BASE 0x2FFE0000
52 #define U300_SEMI_CONFIG_BASE 0x30000000
59 /* AHB Peripherals Bridge Controller */
60 #define U300_AHB_BRIDGE_BASE (U300_AHB_PER_PHYS_BASE+0x0000)
62 /* Vectored Interrupt Controller 0, servicing 32 interrupts */
63 #define U300_INTCON0_BASE (U300_AHB_PER_PHYS_BASE+0x1000)
64 #define U300_INTCON0_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x1000)
66 /* Vectored Interrupt Controller 1, servicing 32 interrupts */
67 #define U300_INTCON1_BASE (U300_AHB_PER_PHYS_BASE+0x2000)
68 #define U300_INTCON1_VBASE IOMEM(U300_AHB_PER_VIRT_BASE+0x2000)
70 /* Memory Stick Pro (MSPRO) controller */
71 #define U300_MSPRO_BASE (U300_AHB_PER_PHYS_BASE+0x3000)
73 /* EMIF Configuration Area */
74 #define U300_EMIF_CFG_BASE (U300_AHB_PER_PHYS_BASE+0x4000)
81 /* FAST bridge control */
82 #define U300_FAST_BRIDGE_BASE (U300_FAST_PER_PHYS_BASE+0x0000)
84 /* MMC/SD controller */
85 #define U300_MMCSD_BASE (U300_FAST_PER_PHYS_BASE+0x1000)
87 /* PCM I2S0 controller */
88 #define U300_PCM_I2S0_BASE (U300_FAST_PER_PHYS_BASE+0x2000)
90 /* PCM I2S1 controller */
91 #define U300_PCM_I2S1_BASE (U300_FAST_PER_PHYS_BASE+0x3000)
94 #define U300_I2C0_BASE (U300_FAST_PER_PHYS_BASE+0x4000)
97 #define U300_I2C1_BASE (U300_FAST_PER_PHYS_BASE+0x5000)
100 #define U300_SPI_BASE (U300_FAST_PER_PHYS_BASE+0x6000)
102 #ifdef CONFIG_MACH_U300_BS335
103 /* Fast UART1 on U335 only */
104 #define U300_UART1_BASE (U300_SLOW_PER_PHYS_BASE+0x7000)
111 /* SLOW bridge control */
112 #define U300_SLOW_BRIDGE_BASE (U300_SLOW_PER_PHYS_BASE)
115 #define U300_SYSCON_BASE (U300_SLOW_PER_PHYS_BASE+0x1000)
116 #define U300_SYSCON_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x1000)
119 #define U300_WDOG_BASE (U300_SLOW_PER_PHYS_BASE+0x2000)
122 #define U300_UART0_BASE (U300_SLOW_PER_PHYS_BASE+0x3000)
124 /* APP side special timer */
125 #define U300_TIMER_APP_BASE (U300_SLOW_PER_PHYS_BASE+0x4000)
126 #define U300_TIMER_APP_VBASE IOMEM(U300_SLOW_PER_VIRT_BASE+0x4000)
129 #define U300_KEYPAD_BASE (U300_SLOW_PER_PHYS_BASE+0x5000)
132 #define U300_GPIO_BASE (U300_SLOW_PER_PHYS_BASE+0x6000)
135 #define U300_RTC_BASE (U300_SLOW_PER_PHYS_BASE+0x7000)
138 #define U300_BUSTR_BASE (U300_SLOW_PER_PHYS_BASE+0x8000)
140 /* Event handler (hardware queue) */
141 #define U300_EVHIST_BASE (U300_SLOW_PER_PHYS_BASE+0x9000)
144 #define U300_TIMER_BASE (U300_SLOW_PER_PHYS_BASE+0xa000)
147 #define U300_PPM_BASE (U300_SLOW_PER_PHYS_BASE+0xb000)
154 /* ISP (image signal processor) is only available in U335 */
155 #ifdef CONFIG_MACH_U300_BS335
156 #define U300_ISP_BASE (0xA0008000)
159 /* DMA Controller base */
160 #define U300_DMAC_BASE (0xC0020000)
163 #define U300_MSL_BASE (0xc0022000)
166 #define U300_APEX_BASE (0xc0030000)
168 /* Video Encoder Base */
169 #ifdef CONFIG_MACH_U300_BS335
170 #define U300_VIDEOENC_BASE (0xc0080000)
172 #define U300_VIDEOENC_BASE (0xc0040000)
176 #define U300_XGAM_BASE (0xd0000000)
179 * Virtual accessor macros for static devices