2 * (C) Copyright 2010-2014
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/arch/clock.h>
11 #include <asm/arch/funcmux.h>
12 #include <asm/arch/mc.h>
13 #include <asm/arch/tegra.h>
14 #include <asm/arch-tegra/board.h>
15 #include <asm/arch-tegra/pmc.h>
16 #include <asm/arch-tegra/sys_proto.h>
17 #include <asm/arch-tegra/warmboot.h>
19 DECLARE_GLOBAL_DATA_PTR;
22 /* UARTs which we can enable */
31 /* Read the RAM size directly from the memory controller */
32 unsigned int query_sdram_size(void)
34 struct mc_ctlr *const mc = (struct mc_ctlr *)NV_PA_MC_BASE;
37 size_mb = readl(&mc->mc_emem_cfg);
38 #if defined(CONFIG_TEGRA20)
39 debug("mc->mc_emem_cfg (MEM_SIZE_KB) = 0x%08x\n", size_mb);
40 size_mb = get_ram_size((void *)PHYS_SDRAM_1, size_mb * 1024);
42 debug("mc->mc_emem_cfg (MEM_SIZE_MB) = 0x%08x\n", size_mb);
43 size_mb = get_ram_size((void *)PHYS_SDRAM_1, size_mb * 1024 * 1024);
46 #if defined(CONFIG_TEGRA30) || defined(CONFIG_TEGRA114)
47 /* External memory limited to 2047 MB due to IROM/HI-VEC */
48 if (size_mb == SZ_2G) size_mb -= SZ_1M;
56 /* We do not initialise DRAM here. We just query the size */
57 gd->ram_size = query_sdram_size();
61 #ifdef CONFIG_DISPLAY_BOARDINFO
64 printf("Board: %s\n", sysinfo.board_string);
67 #endif /* CONFIG_DISPLAY_BOARDINFO */
69 static int uart_configs[] = {
70 #if defined(CONFIG_TEGRA20)
71 #if defined(CONFIG_TEGRA_UARTA_UAA_UAB)
72 FUNCMUX_UART1_UAA_UAB,
73 #elif defined(CONFIG_TEGRA_UARTA_GPU)
75 #elif defined(CONFIG_TEGRA_UARTA_SDIO1)
78 FUNCMUX_UART1_IRRX_IRTX,
84 #elif defined(CONFIG_TEGRA30)
85 FUNCMUX_UART1_ULPI, /* UARTA */
90 #elif defined(CONFIG_TEGRA114)
94 FUNCMUX_UART4_GMI, /* UARTD */
97 FUNCMUX_UART1_KBC, /* UARTA */
100 FUNCMUX_UART4_GPIO, /* UARTD */
106 * Set up the specified uarts
108 * @param uarts_ids Mask containing UARTs to init (UARTx)
110 static void setup_uarts(int uart_ids)
112 static enum periph_id id_for_uart[] = {
121 for (i = 0; i < UART_COUNT; i++) {
122 if (uart_ids & (1 << i)) {
123 enum periph_id id = id_for_uart[i];
125 funcmux_select(id, uart_configs[i]);
126 clock_ll_start_uart(id);
131 void board_init_uart_f(void)
133 int uart_ids = 0; /* bit mask of which UART ids to enable */
135 #ifdef CONFIG_TEGRA_ENABLE_UARTA
138 #ifdef CONFIG_TEGRA_ENABLE_UARTB
141 #ifdef CONFIG_TEGRA_ENABLE_UARTC
144 #ifdef CONFIG_TEGRA_ENABLE_UARTD
147 #ifdef CONFIG_TEGRA_ENABLE_UARTE
150 setup_uarts(uart_ids);
153 #ifndef CONFIG_SYS_DCACHE_OFF
154 void enable_caches(void)
156 /* Enable D-cache. I-cache is already enabled in start.S */