arch/arm/mach-stm32mp/stm32mp13x.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
   2 /*
   3  * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
   4  */
   5
   6 #define LOG_CATEGORY LOGC_ARCH
   7
   8 #include <common.h>
   9 #include <log.h>
  10 #include <syscon.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/stm32.h>
  13 #include <asm/arch/sys_proto.h>
  14
  15 /* SYSCFG register */
  16 #define SYSCFG_IDC_OFFSET       0x380
  17 #define SYSCFG_IDC_DEV_ID_MASK  GENMASK(11, 0)
  18 #define SYSCFG_IDC_DEV_ID_SHIFT 0
  19 #define SYSCFG_IDC_REV_ID_MASK  GENMASK(31, 16)
  20 #define SYSCFG_IDC_REV_ID_SHIFT 16
  21
  22 /* Device Part Number (RPN) = OTP_DATA1 lower 11 bits */
  23 #define RPN_SHIFT       0
  24 #define RPN_MASK        GENMASK(11, 0)
  25
  26 static u32 read_idc(void)
  27 {
  28         void *syscfg = syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
  29
  30         return readl(syscfg + SYSCFG_IDC_OFFSET);
  31 }
  32
  33 u32 get_cpu_dev(void)
  34 {
  35         return (read_idc() & SYSCFG_IDC_DEV_ID_MASK) >> SYSCFG_IDC_DEV_ID_SHIFT;
  36 }
  37
  38 u32 get_cpu_rev(void)
  39 {
  40         return (read_idc() & SYSCFG_IDC_REV_ID_MASK) >> SYSCFG_IDC_REV_ID_SHIFT;
  41 }
  42
  43 /* Get Device Part Number (RPN) from OTP */
  44 static u32 get_cpu_rpn(void)
  45 {
  46         return get_otp(BSEC_OTP_RPN, RPN_SHIFT, RPN_MASK);
  47 }
  48
  49 u32 get_cpu_type(void)
  50 {
  51         return (get_cpu_dev() << 16) | get_cpu_rpn();
  52 }
  53
  54 void get_soc_name(char name[SOC_NAME_SIZE])
  55 {
  56         char *cpu_s, *cpu_r;
  57
  58         /* MPUs Part Numbers */
  59         switch (get_cpu_type()) {
  60         case CPU_STM32MP135Fxx:
  61                 cpu_s = "135F";
  62                 break;
  63         case CPU_STM32MP135Dxx:
  64                 cpu_s = "135D";
  65                 break;
  66         case CPU_STM32MP135Cxx:
  67                 cpu_s = "135C";
  68                 break;
  69         case CPU_STM32MP135Axx:
  70                 cpu_s = "135A";
  71                 break;
  72         case CPU_STM32MP133Fxx:
  73                 cpu_s = "133F";
  74                 break;
  75         case CPU_STM32MP133Dxx:
  76                 cpu_s = "133D";
  77                 break;
  78         case CPU_STM32MP133Cxx:
  79                 cpu_s = "133C";
  80                 break;
  81         case CPU_STM32MP133Axx:
  82                 cpu_s = "133A";
  83                 break;
  84         case CPU_STM32MP131Fxx:
  85                 cpu_s = "131F";
  86                 break;
  87         case CPU_STM32MP131Dxx:
  88                 cpu_s = "131D";
  89                 break;
  90         case CPU_STM32MP131Cxx:
  91                 cpu_s = "131C";
  92                 break;
  93         case CPU_STM32MP131Axx:
  94                 cpu_s = "131A";
  95                 break;
  96         default:
  97                 cpu_s = "????";
  98                 break;
  99         }
 100
 101         /* REVISION */
 102         switch (get_cpu_rev()) {
 103         case CPU_REV1:
 104                 cpu_r = "A";
 105                 break;
 106         case CPU_REV1_1:
 107                 cpu_r = "Z";
 108                 break;
 109         default:
 110                 cpu_r = "?";
 111                 break;
 112         }
 113
 114         snprintf(name, SOC_NAME_SIZE, "STM32MP%s Rev.%s", cpu_s, cpu_r);
 115 }