ARM: dts: at91: sama5d2_icp: fix i2c eeprom compatible
[platform/kernel/u-boot.git] / arch / arm / mach-stm32mp / spl.c
1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4  */
5
6 #include <common.h>
7 #include <cpu_func.h>
8 #include <dm.h>
9 #include <hang.h>
10 #include <init.h>
11 #include <log.h>
12 #include <spl.h>
13 #include <asm/cache.h>
14 #include <asm/io.h>
15 #include <asm/arch/sys_proto.h>
16 #include <linux/libfdt.h>
17
18 u32 spl_boot_device(void)
19 {
20         u32 boot_mode;
21
22         boot_mode = get_bootmode();
23
24         switch (boot_mode) {
25         case BOOT_FLASH_SD_1:
26         case BOOT_FLASH_EMMC_1:
27                 return BOOT_DEVICE_MMC1;
28         case BOOT_FLASH_SD_2:
29         case BOOT_FLASH_EMMC_2:
30                 return BOOT_DEVICE_MMC2;
31         case BOOT_SERIAL_UART_1:
32         case BOOT_SERIAL_UART_2:
33         case BOOT_SERIAL_UART_3:
34         case BOOT_SERIAL_UART_4:
35         case BOOT_SERIAL_UART_5:
36         case BOOT_SERIAL_UART_6:
37         case BOOT_SERIAL_UART_7:
38         case BOOT_SERIAL_UART_8:
39                 return BOOT_DEVICE_UART;
40         case BOOT_SERIAL_USB_OTG:
41                 return BOOT_DEVICE_USB;
42         case BOOT_FLASH_NAND_FMC:
43                 return BOOT_DEVICE_NAND;
44         case BOOT_FLASH_NOR_QSPI:
45                 return BOOT_DEVICE_SPI;
46         case BOOT_FLASH_SPINAND_1:
47                 return BOOT_DEVICE_NONE; /* SPINAND not supported in SPL */
48         }
49
50         return BOOT_DEVICE_MMC1;
51 }
52
53 u32 spl_mmc_boot_mode(const u32 boot_device)
54 {
55         return MMCSD_MODE_RAW;
56 }
57
58 int spl_mmc_boot_partition(const u32 boot_device)
59 {
60         switch (boot_device) {
61         case BOOT_DEVICE_MMC1:
62                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;
63         case BOOT_DEVICE_MMC2:
64                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2;
65         default:
66                 return -EINVAL;
67         }
68 }
69
70 #ifdef CONFIG_SPL_DISPLAY_PRINT
71 void spl_display_print(void)
72 {
73         DECLARE_GLOBAL_DATA_PTR;
74         const char *model;
75
76         /* same code than show_board_info() but not compiled for SPL
77          * see CONFIG_DISPLAY_BOARDINFO & common/board_info.c
78          */
79         model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
80         if (model)
81                 printf("Model: %s\n", model);
82 }
83 #endif
84
85 __weak int board_early_init_f(void)
86 {
87         return 0;
88 }
89
90 void board_init_f(ulong dummy)
91 {
92         struct udevice *dev;
93         int ret;
94
95         arch_cpu_init();
96
97         ret = spl_early_init();
98         if (ret) {
99                 debug("spl_early_init() failed: %d\n", ret);
100                 hang();
101         }
102
103         ret = uclass_get_device(UCLASS_CLK, 0, &dev);
104         if (ret) {
105                 debug("Clock init failed: %d\n", ret);
106                 hang();
107         }
108
109         ret = uclass_get_device(UCLASS_RESET, 0, &dev);
110         if (ret) {
111                 debug("Reset init failed: %d\n", ret);
112                 hang();
113         }
114
115         ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
116         if (ret) {
117                 debug("%s: Cannot find pinctrl device\n", __func__);
118                 hang();
119         }
120
121         /* enable console uart printing */
122         preloader_console_init();
123
124         ret = board_early_init_f();
125         if (ret) {
126                 debug("board_early_init_f() failed: %d\n", ret);
127                 hang();
128         }
129
130         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
131         if (ret) {
132                 printf("DRAM init failed: %d\n", ret);
133                 hang();
134         }
135
136         /*
137          * activate cache on DDR only when DDR is fully initialized
138          * to avoid speculative access and issue in get_ram_size()
139          */
140         if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
141                 mmu_set_region_dcache_behaviour(STM32_DDR_BASE,
142                                                 CONFIG_DDR_CACHEABLE_SIZE,
143                                                 DCACHE_DEFAULT_OPTION);
144 }
145
146 void spl_board_prepare_for_boot(void)
147 {
148         dcache_disable();
149 }
150
151 void spl_board_prepare_for_linux(void)
152 {
153         dcache_disable();
154 }