spi: zynqmp_gqspi: fix set_speed bug on multiple runs
[platform/kernel/u-boot.git] / arch / arm / mach-stm32mp / spl.c
1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4  */
5
6 #define LOG_CATEGORY LOGC_ARCH
7
8 #include <common.h>
9 #include <cpu_func.h>
10 #include <dm.h>
11 #include <hang.h>
12 #include <init.h>
13 #include <log.h>
14 #include <spl.h>
15 #include <asm/cache.h>
16 #include <asm/io.h>
17 #include <asm/arch/sys_proto.h>
18 #include <linux/libfdt.h>
19
20 u32 spl_boot_device(void)
21 {
22         u32 boot_mode;
23
24         boot_mode = get_bootmode();
25
26         switch (boot_mode) {
27         case BOOT_FLASH_SD_1:
28         case BOOT_FLASH_EMMC_1:
29                 return BOOT_DEVICE_MMC1;
30         case BOOT_FLASH_SD_2:
31         case BOOT_FLASH_EMMC_2:
32                 return BOOT_DEVICE_MMC2;
33         case BOOT_SERIAL_UART_1:
34         case BOOT_SERIAL_UART_2:
35         case BOOT_SERIAL_UART_3:
36         case BOOT_SERIAL_UART_4:
37         case BOOT_SERIAL_UART_5:
38         case BOOT_SERIAL_UART_6:
39         case BOOT_SERIAL_UART_7:
40         case BOOT_SERIAL_UART_8:
41                 return BOOT_DEVICE_UART;
42         case BOOT_SERIAL_USB_OTG:
43                 return BOOT_DEVICE_USB;
44         case BOOT_FLASH_NAND_FMC:
45                 return BOOT_DEVICE_NAND;
46         case BOOT_FLASH_NOR_QSPI:
47                 return BOOT_DEVICE_SPI;
48         case BOOT_FLASH_SPINAND_1:
49                 return BOOT_DEVICE_NONE; /* SPINAND not supported in SPL */
50         }
51
52         return BOOT_DEVICE_MMC1;
53 }
54
55 u32 spl_mmc_boot_mode(const u32 boot_device)
56 {
57         return MMCSD_MODE_RAW;
58 }
59
60 #ifdef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
61 int spl_mmc_boot_partition(const u32 boot_device)
62 {
63         switch (boot_device) {
64         case BOOT_DEVICE_MMC1:
65                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;
66         case BOOT_DEVICE_MMC2:
67                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2;
68         default:
69                 return -EINVAL;
70         }
71 }
72 #endif
73
74 #ifdef CONFIG_SPL_DISPLAY_PRINT
75 void spl_display_print(void)
76 {
77         DECLARE_GLOBAL_DATA_PTR;
78         const char *model;
79
80         /* same code than show_board_info() but not compiled for SPL
81          * see CONFIG_DISPLAY_BOARDINFO & common/board_info.c
82          */
83         model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
84         if (model)
85                 log_info("Model: %s\n", model);
86 }
87 #endif
88
89 __weak int board_early_init_f(void)
90 {
91         return 0;
92 }
93
94 void board_init_f(ulong dummy)
95 {
96         struct udevice *dev;
97         int ret;
98
99         arch_cpu_init();
100
101         ret = spl_early_init();
102         if (ret) {
103                 log_debug("spl_early_init() failed: %d\n", ret);
104                 hang();
105         }
106
107         ret = uclass_get_device(UCLASS_CLK, 0, &dev);
108         if (ret) {
109                 log_debug("Clock init failed: %d\n", ret);
110                 hang();
111         }
112
113         ret = uclass_get_device(UCLASS_RESET, 0, &dev);
114         if (ret) {
115                 log_debug("Reset init failed: %d\n", ret);
116                 hang();
117         }
118
119         ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
120         if (ret) {
121                 log_debug("%s: Cannot find pinctrl device\n", __func__);
122                 hang();
123         }
124
125         /* enable console uart printing */
126         preloader_console_init();
127
128         ret = board_early_init_f();
129         if (ret) {
130                 log_debug("board_early_init_f() failed: %d\n", ret);
131                 hang();
132         }
133
134         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
135         if (ret) {
136                 log_err("DRAM init failed: %d\n", ret);
137                 hang();
138         }
139
140         /*
141          * activate cache on DDR only when DDR is fully initialized
142          * to avoid speculative access and issue in get_ram_size()
143          */
144         if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
145                 mmu_set_region_dcache_behaviour(STM32_DDR_BASE,
146                                                 CONFIG_DDR_CACHEABLE_SIZE,
147                                                 DCACHE_DEFAULT_OPTION);
148 }
149
150 void spl_board_prepare_for_boot(void)
151 {
152         dcache_disable();
153 }
154
155 void spl_board_prepare_for_linux(void)
156 {
157         dcache_disable();
158 }