arch/arm/mach-spear6xx/include/mach/spear.h

   1 /*
   2  * arch/arm/mach-spear6xx/include/mach/spear.h
   3  *
   4  * SPEAr6xx Machine family specific definition
   5  *
   6  * Copyright (C) 2009 ST Microelectronics
   7  * Rajeev Kumar<rajeev-dlh.kumar@st.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2. This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 #ifndef __MACH_SPEAR6XX_H
  15 #define __MACH_SPEAR6XX_H
  16
  17 #include <mach/spear600.h>
  18
  19 #define SPEAR6XX_ML_SDRAM_BASE          0x00000000
  20 #define SPEAR6XX_ML_SDRAM_SIZE          0x40000000
  21
  22 /* ICM1 - Low speed connection */
  23 #define SPEAR6XX_ICM1_BASE              0xD0000000
  24 #define SPEAR6XX_ICM1_SIZE              0x08000000
  25
  26 #define SPEAR6XX_ICM1_UART0_BASE        0xD0000000
  27 #define VA_SPEAR6XX_ICM1_UART0_BASE     IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE)
  28 #define SPEAR6XX_ICM1_UART0_SIZE        0x00080000
  29
  30 #define SPEAR6XX_ICM1_UART1_BASE        0xD0080000
  31 #define SPEAR6XX_ICM1_UART1_SIZE        0x00080000
  32
  33 #define SPEAR6XX_ICM1_SSP0_BASE         0xD0100000
  34 #define SPEAR6XX_ICM1_SSP0_SIZE         0x00080000
  35
  36 #define SPEAR6XX_ICM1_SSP1_BASE         0xD0180000
  37 #define SPEAR6XX_ICM1_SSP1_SIZE         0x00080000
  38
  39 #define SPEAR6XX_ICM1_I2C_BASE          0xD0200000
  40 #define SPEAR6XX_ICM1_I2C_SIZE          0x00080000
  41
  42 #define SPEAR6XX_ICM1_JPEG_BASE         0xD0800000
  43 #define SPEAR6XX_ICM1_JPEG_SIZE         0x00800000
  44
  45 #define SPEAR6XX_ICM1_IRDA_BASE         0xD1000000
  46 #define SPEAR6XX_ICM1_IRDA_SIZE         0x00800000
  47
  48 #define SPEAR6XX_ICM1_FSMC_BASE         0xD1800000
  49 #define SPEAR6XX_ICM1_FSMC_SIZE         0x00800000
  50
  51 #define SPEAR6XX_ICM1_NAND_BASE         0xD2000000
  52 #define SPEAR6XX_ICM1_NAND_SIZE         0x00800000
  53
  54 #define SPEAR6XX_ICM1_SRAM_BASE         0xD2800000
  55 #define SPEAR6XX_ICM1_SRAM_SIZE         0x00800000
  56
  57 /* ICM2 - Application Subsystem */
  58 #define SPEAR6XX_ICM2_BASE              0xD8000000
  59 #define SPEAR6XX_ICM2_SIZE              0x08000000
  60
  61 #define SPEAR6XX_ICM2_TMR0_BASE         0xD8000000
  62 #define SPEAR6XX_ICM2_TMR0_SIZE         0x00080000
  63
  64 #define SPEAR6XX_ICM2_TMR1_BASE         0xD8080000
  65 #define SPEAR6XX_ICM2_TMR1_SIZE         0x00080000
  66
  67 #define SPEAR6XX_ICM2_GPIO_BASE         0xD8100000
  68 #define SPEAR6XX_ICM2_GPIO_SIZE         0x00080000
  69
  70 #define SPEAR6XX_ICM2_SPI2_BASE         0xD8180000
  71 #define SPEAR6XX_ICM2_SPI2_SIZE         0x00080000
  72
  73 #define SPEAR6XX_ICM2_ADC_BASE          0xD8200000
  74 #define SPEAR6XX_ICM2_ADC_SIZE          0x00080000
  75
  76 /* ML-1, 2 - Multi Layer CPU Subsystem */
  77 #define SPEAR6XX_ML_CPU_BASE            0xF0000000
  78 #define SPEAR6XX_ML_CPU_SIZE            0x08000000
  79
  80 #define SPEAR6XX_CPU_TMR_BASE           0xF0000000
  81 #define SPEAR6XX_CPU_TMR_SIZE           0x00100000
  82
  83 #define SPEAR6XX_CPU_GPIO_BASE          0xF0100000
  84 #define SPEAR6XX_CPU_GPIO_SIZE          0x00100000
  85
  86 #define SPEAR6XX_CPU_VIC_SEC_BASE       0xF1000000
  87 #define VA_SPEAR6XX_CPU_VIC_SEC_BASE    IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE)
  88 #define SPEAR6XX_CPU_VIC_SEC_SIZE       0x00100000
  89
  90 #define SPEAR6XX_CPU_VIC_PRI_BASE       0xF1100000
  91 #define VA_SPEAR6XX_CPU_VIC_PRI_BASE    IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE)
  92 #define SPEAR6XX_CPU_VIC_PRI_SIZE       0x00100000
  93
  94 /* ICM3 - Basic Subsystem */
  95 #define SPEAR6XX_ICM3_BASE              0xF8000000
  96 #define SPEAR6XX_ICM3_SIZE              0x08000000
  97
  98 #define SPEAR6XX_ICM3_SMEM_BASE         0xF8000000
  99 #define SPEAR6XX_ICM3_SMEM_SIZE         0x04000000
 100
 101 #define SPEAR6XX_ICM3_SMI_CTRL_BASE     0xFC000000
 102 #define SPEAR6XX_ICM3_SMI_CTRL_SIZE     0x00200000
 103
 104 #define SPEAR6XX_ICM3_CLCD_BASE         0xFC200000
 105 #define SPEAR6XX_ICM3_CLCD_SIZE         0x00200000
 106
 107 #define SPEAR6XX_ICM3_DMA_BASE          0xFC400000
 108 #define SPEAR6XX_ICM3_DMA_SIZE          0x00200000
 109
 110 #define SPEAR6XX_ICM3_SDRAM_CTRL_BASE   0xFC600000
 111 #define SPEAR6XX_ICM3_SDRAM_CTRL_SIZE   0x00200000
 112
 113 #define SPEAR6XX_ICM3_TMR_BASE          0xFC800000
 114 #define SPEAR6XX_ICM3_TMR_SIZE          0x00080000
 115
 116 #define SPEAR6XX_ICM3_WDT_BASE          0xFC880000
 117 #define SPEAR6XX_ICM3_WDT_SIZE          0x00080000
 118
 119 #define SPEAR6XX_ICM3_RTC_BASE          0xFC900000
 120 #define SPEAR6XX_ICM3_RTC_SIZE          0x00080000
 121
 122 #define SPEAR6XX_ICM3_GPIO_BASE         0xFC980000
 123 #define SPEAR6XX_ICM3_GPIO_SIZE         0x00080000
 124
 125 #define SPEAR6XX_ICM3_SYS_CTRL_BASE     0xFCA00000
 126 #define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE  IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE)
 127 #define SPEAR6XX_ICM3_SYS_CTRL_SIZE     0x00080000
 128
 129 #define SPEAR6XX_ICM3_MISC_REG_BASE     0xFCA80000
 130 #define VA_SPEAR6XX_ICM3_MISC_REG_BASE  IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE)
 131 #define SPEAR6XX_ICM3_MISC_REG_SIZE     0x00080000
 132
 133 /* ICM4 - High Speed Connection */
 134 #define SPEAR6XX_ICM4_BASE              0xE0000000
 135 #define SPEAR6XX_ICM4_SIZE              0x08000000
 136
 137 #define SPEAR6XX_ICM4_GMAC_BASE         0xE0800000
 138 #define SPEAR6XX_ICM4_GMAC_SIZE         0x00800000
 139
 140 #define SPEAR6XX_ICM4_USBD_FIFO_BASE    0xE1000000
 141 #define SPEAR6XX_ICM4_USBD_FIFO_SIZE    0x00100000
 142
 143 #define SPEAR6XX_ICM4_USBD_CSR_BASE     0xE1100000
 144 #define SPEAR6XX_ICM4_USBD_CSR_SIZE     0x00100000
 145
 146 #define SPEAR6XX_ICM4_USBD_PLDT_BASE    0xE1200000
 147 #define SPEAR6XX_ICM4_USBD_PLDT_SIZE    0x00100000
 148
 149 #define SPEAR6XX_ICM4_USB_EHCI0_BASE    0xE1800000
 150 #define SPEAR6XX_ICM4_USB_EHCI0_SIZE    0x00100000
 151
 152 #define SPEAR6XX_ICM4_USB_OHCI0_BASE    0xE1900000
 153 #define SPEAR6XX_ICM4_USB_OHCI0_SIZE    0x00100000
 154
 155 #define SPEAR6XX_ICM4_USB_EHCI1_BASE    0xE2000000
 156 #define SPEAR6XX_ICM4_USB_EHCI1_SIZE    0x00100000
 157
 158 #define SPEAR6XX_ICM4_USB_OHCI1_BASE    0xE2100000
 159 #define SPEAR6XX_ICM4_USB_OHCI1_SIZE    0x00100000
 160
 161 #define SPEAR6XX_ICM4_USB_ARB_BASE      0xE2800000
 162 #define SPEAR6XX_ICM4_USB_ARB_SIZE      0x00010000
 163
 164 /* Debug uart for linux, will be used for debug and uncompress messages */
 165 #define SPEAR_DBG_UART_BASE             SPEAR6XX_ICM1_UART0_BASE
 166 #define VA_SPEAR_DBG_UART_BASE          VA_SPEAR6XX_ICM1_UART0_BASE
 167
 168 /* Sysctl base for spear platform */
 169 #define SPEAR_SYS_CTRL_BASE             SPEAR6XX_ICM3_SYS_CTRL_BASE
 170 #define VA_SPEAR_SYS_CTRL_BASE          VA_SPEAR6XX_ICM3_SYS_CTRL_BASE
 171
 172 #endif /* __MACH_SPEAR6XX_H */