arch/arm/mach-spear3xx/include/mach/spear.h

   1 /*
   2  * arch/arm/mach-spear3xx/include/mach/spear.h
   3  *
   4  * SPEAr3xx Machine family specific definition
   5  *
   6  * Copyright (C) 2009 ST Microelectronics
   7  * Viresh Kumar<viresh.kumar@st.com>
   8  *
   9  * This file is licensed under the terms of the GNU General Public
  10  * License version 2. This program is licensed "as is" without any
  11  * warranty of any kind, whether express or implied.
  12  */
  13
  14 #ifndef __MACH_SPEAR3XX_H
  15 #define __MACH_SPEAR3XX_H
  16
  17 #include <mach/spear300.h>
  18 #include <mach/spear310.h>
  19 #include <mach/spear320.h>
  20
  21 #define SPEAR3XX_ML_SDRAM_BASE          0x00000000
  22 #define SPEAR3XX_ML_SDRAM_SIZE          0x40000000
  23
  24 #define SPEAR3XX_ICM9_BASE              0xC0000000
  25 #define SPEAR3XX_ICM9_SIZE              0x10000000
  26
  27 /* ICM1 - Low speed connection */
  28 #define SPEAR3XX_ICM1_2_BASE            0xD0000000
  29 #define SPEAR3XX_ICM1_2_SIZE            0x10000000
  30
  31 #define SPEAR3XX_ICM1_UART_BASE         0xD0000000
  32 #define VA_SPEAR3XX_ICM1_UART_BASE      IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)
  33 #define SPEAR3XX_ICM1_UART_SIZE         0x00080000
  34
  35 #define SPEAR3XX_ICM1_ADC_BASE          0xD0080000
  36 #define SPEAR3XX_ICM1_ADC_SIZE          0x00080000
  37
  38 #define SPEAR3XX_ICM1_SSP_BASE          0xD0100000
  39 #define SPEAR3XX_ICM1_SSP_SIZE          0x00080000
  40
  41 #define SPEAR3XX_ICM1_I2C_BASE          0xD0180000
  42 #define SPEAR3XX_ICM1_I2C_SIZE          0x00080000
  43
  44 #define SPEAR3XX_ICM1_JPEG_BASE         0xD0800000
  45 #define SPEAR3XX_ICM1_JPEG_SIZE         0x00800000
  46
  47 #define SPEAR3XX_ICM1_IRDA_BASE         0xD1000000
  48 #define SPEAR3XX_ICM1_IRDA_SIZE         0x00080000
  49
  50 #define SPEAR3XX_ICM1_SRAM_BASE         0xD2800000
  51 #define SPEAR3XX_ICM1_SRAM_SIZE         0x05800000
  52
  53 /* ICM2 - Application Subsystem */
  54 #define SPEAR3XX_ICM2_HWACCEL0_BASE     0xD8800000
  55 #define SPEAR3XX_ICM2_HWACCEL0_SIZE     0x00800000
  56
  57 #define SPEAR3XX_ICM2_HWACCEL1_BASE     0xD9000000
  58 #define SPEAR3XX_ICM2_HWACCEL1_SIZE     0x00800000
  59
  60 /* ICM4 - High Speed Connection */
  61 #define SPEAR3XX_ICM4_BASE              0xE0000000
  62 #define SPEAR3XX_ICM4_SIZE              0x08000000
  63
  64 #define SPEAR3XX_ICM4_MII_BASE          0xE0800000
  65 #define SPEAR3XX_ICM4_MII_SIZE          0x00800000
  66
  67 #define SPEAR3XX_ICM4_USBD_FIFO_BASE    0xE1000000
  68 #define SPEAR3XX_ICM4_USBD_FIFO_SIZE    0x00100000
  69
  70 #define SPEAR3XX_ICM4_USBD_CSR_BASE     0xE1100000
  71 #define SPEAR3XX_ICM4_USBD_CSR_SIZE     0x00100000
  72
  73 #define SPEAR3XX_ICM4_USBD_PLDT_BASE    0xE1200000
  74 #define SPEAR3XX_ICM4_USBD_PLDT_SIZE    0x00100000
  75
  76 #define SPEAR3XX_ICM4_USB_EHCI0_1_BASE  0xE1800000
  77 #define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE  0x00100000
  78
  79 #define SPEAR3XX_ICM4_USB_OHCI0_BASE    0xE1900000
  80 #define SPEAR3XX_ICM4_USB_OHCI0_SIZE    0x00100000
  81
  82 #define SPEAR3XX_ICM4_USB_OHCI1_BASE    0xE2100000
  83 #define SPEAR3XX_ICM4_USB_OHCI1_SIZE    0x00100000
  84
  85 #define SPEAR3XX_ICM4_USB_ARB_BASE      0xE2800000
  86 #define SPEAR3XX_ICM4_USB_ARB_SIZE      0x00010000
  87
  88 /* ML1 - Multi Layer CPU Subsystem */
  89 #define SPEAR3XX_ICM3_ML1_2_BASE        0xF0000000
  90 #define SPEAR3XX_ICM3_ML1_2_SIZE        0x0F000000
  91
  92 #define SPEAR3XX_ML1_TMR_BASE           0xF0000000
  93 #define SPEAR3XX_ML1_TMR_SIZE           0x00100000
  94
  95 #define SPEAR3XX_ML1_VIC_BASE           0xF1100000
  96 #define VA_SPEAR3XX_ML1_VIC_BASE        IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)
  97 #define SPEAR3XX_ML1_VIC_SIZE           0x00100000
  98
  99 /* ICM3 - Basic Subsystem */
 100 #define SPEAR3XX_ICM3_SMEM_BASE         0xF8000000
 101 #define SPEAR3XX_ICM3_SMEM_SIZE         0x04000000
 102
 103 #define SPEAR3XX_ICM3_SMI_CTRL_BASE     0xFC000000
 104 #define SPEAR3XX_ICM3_SMI_CTRL_SIZE     0x00200000
 105
 106 #define SPEAR3XX_ICM3_DMA_BASE          0xFC400000
 107 #define SPEAR3XX_ICM3_DMA_SIZE          0x00200000
 108
 109 #define SPEAR3XX_ICM3_SDRAM_CTRL_BASE   0xFC600000
 110 #define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE   0x00200000
 111
 112 #define SPEAR3XX_ICM3_TMR0_BASE         0xFC800000
 113 #define SPEAR3XX_ICM3_TMR0_SIZE         0x00080000
 114
 115 #define SPEAR3XX_ICM3_WDT_BASE          0xFC880000
 116 #define SPEAR3XX_ICM3_WDT_SIZE          0x00080000
 117
 118 #define SPEAR3XX_ICM3_RTC_BASE          0xFC900000
 119 #define SPEAR3XX_ICM3_RTC_SIZE          0x00080000
 120
 121 #define SPEAR3XX_ICM3_GPIO_BASE         0xFC980000
 122 #define SPEAR3XX_ICM3_GPIO_SIZE         0x00080000
 123
 124 #define SPEAR3XX_ICM3_SYS_CTRL_BASE     0xFCA00000
 125 #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE  IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)
 126 #define SPEAR3XX_ICM3_SYS_CTRL_SIZE     0x00080000
 127
 128 #define SPEAR3XX_ICM3_MISC_REG_BASE     0xFCA80000
 129 #define VA_SPEAR3XX_ICM3_MISC_REG_BASE  IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)
 130 #define SPEAR3XX_ICM3_MISC_REG_SIZE     0x00080000
 131
 132 #define SPEAR3XX_ICM3_TMR1_BASE         0xFCB00000
 133 #define SPEAR3XX_ICM3_TMR1_SIZE         0x00080000
 134
 135 /* Debug uart for linux, will be used for debug and uncompress messages */
 136 #define SPEAR_DBG_UART_BASE             SPEAR3XX_ICM1_UART_BASE
 137 #define VA_SPEAR_DBG_UART_BASE          VA_SPEAR3XX_ICM1_UART_BASE
 138
 139 /* Sysctl base for spear platform */
 140 #define SPEAR_SYS_CTRL_BASE             SPEAR3XX_ICM3_SYS_CTRL_BASE
 141 #define VA_SPEAR_SYS_CTRL_BASE          VA_SPEAR3XX_ICM3_SYS_CTRL_BASE
 142
 143 #endif /* __MACH_SPEAR3XX_H */