Convert CONFIG_SPL_SPI_SUPPORT to Kconfig
[platform/kernel/u-boot.git] / arch / arm / mach-socfpga / Kconfig
1 if ARCH_SOCFPGA
2
3 config SPL_LIBCOMMON_SUPPORT
4         default y
5
6 config SPL_LIBDISK_SUPPORT
7         default y
8
9 config SPL_LIBGENERIC_SUPPORT
10         default y
11
12 config SPL_MMC_SUPPORT
13         default y if DM_MMC
14
15 config SPL_NAND_SUPPORT
16         default y if SPL_NAND_DENALI
17
18 config SPL_SERIAL_SUPPORT
19         default y
20
21 config SPL_SPI_FLASH_SUPPORT
22         default y if SPL_SPI_SUPPORT
23
24 config SPL_SPI_SUPPORT
25         default y if DM_SPI
26
27 config TARGET_SOCFPGA_ARRIA5
28         bool
29         select TARGET_SOCFPGA_GEN5
30
31 config TARGET_SOCFPGA_CYCLONE5
32         bool
33         select TARGET_SOCFPGA_GEN5
34
35 config TARGET_SOCFPGA_GEN5
36         bool
37
38 choice
39         prompt "Altera SOCFPGA board select"
40         optional
41
42 config TARGET_SOCFPGA_ARRIA5_SOCDK
43         bool "Altera SOCFPGA SoCDK (Arria V)"
44         select TARGET_SOCFPGA_ARRIA5
45
46 config TARGET_SOCFPGA_CYCLONE5_SOCDK
47         bool "Altera SOCFPGA SoCDK (Cyclone V)"
48         select TARGET_SOCFPGA_CYCLONE5
49
50 config TARGET_SOCFPGA_DENX_MCVEVK
51         bool "DENX MCVEVK (Cyclone V)"
52         select TARGET_SOCFPGA_CYCLONE5
53
54 config TARGET_SOCFPGA_EBV_SOCRATES
55         bool "EBV SoCrates (Cyclone V)"
56         select TARGET_SOCFPGA_CYCLONE5
57
58 config TARGET_SOCFPGA_IS1
59         bool "IS1 (Cyclone V)"
60         select TARGET_SOCFPGA_CYCLONE5
61
62 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
63         bool "samtec VIN|ING FPGA (Cyclone V)"
64         select TARGET_SOCFPGA_CYCLONE5
65
66 config TARGET_SOCFPGA_SR1500
67         bool "SR1500 (Cyclone V)"
68         select TARGET_SOCFPGA_CYCLONE5
69
70 config TARGET_SOCFPGA_TERASIC_DE0_NANO
71         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
72         select TARGET_SOCFPGA_CYCLONE5
73
74 config TARGET_SOCFPGA_TERASIC_SOCKIT
75         bool "Terasic SoCkit (Cyclone V)"
76         select TARGET_SOCFPGA_CYCLONE5
77
78 endchoice
79
80 config SYS_BOARD
81         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
82         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
83         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
84         default "is1" if TARGET_SOCFPGA_IS1
85         default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
86         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
87         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
88         default "sr1500" if TARGET_SOCFPGA_SR1500
89         default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
90
91 config SYS_VENDOR
92         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
93         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
94         default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
95         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
96         default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
97         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
98         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
99
100 config SYS_SOC
101         default "socfpga"
102
103 config SYS_CONFIG_NAME
104         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
105         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
106         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
107         default "socfpga_is1" if TARGET_SOCFPGA_IS1
108         default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
109         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
110         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
111         default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
112         default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
113
114 endif