arch/arm/mach-socfpga/Kconfig

   1 if ARCH_SOCFPGA
   2
   3 config SPL_LIBCOMMON_SUPPORT
   4         default y
   5
   6 config SPL_LIBDISK_SUPPORT
   7         default y
   8
   9 config SPL_LIBGENERIC_SUPPORT
  10         default y
  11
  12 config SPL_MMC_SUPPORT
  13         default y if DM_MMC
  14
  15 config SPL_NAND_SUPPORT
  16         default y if SPL_NAND_DENALI
  17
  18 config SPL_SERIAL_SUPPORT
  19         default y
  20
  21 config SPL_SPI_FLASH_SUPPORT
  22         default y if DM_SPI
  23
  24 config TARGET_SOCFPGA_ARRIA5
  25         bool
  26         select TARGET_SOCFPGA_GEN5
  27
  28 config TARGET_SOCFPGA_CYCLONE5
  29         bool
  30         select TARGET_SOCFPGA_GEN5
  31
  32 config TARGET_SOCFPGA_GEN5
  33         bool
  34
  35 choice
  36         prompt "Altera SOCFPGA board select"
  37         optional
  38
  39 config TARGET_SOCFPGA_ARRIA5_SOCDK
  40         bool "Altera SOCFPGA SoCDK (Arria V)"
  41         select TARGET_SOCFPGA_ARRIA5
  42
  43 config TARGET_SOCFPGA_CYCLONE5_SOCDK
  44         bool "Altera SOCFPGA SoCDK (Cyclone V)"
  45         select TARGET_SOCFPGA_CYCLONE5
  46
  47 config TARGET_SOCFPGA_DENX_MCVEVK
  48         bool "DENX MCVEVK (Cyclone V)"
  49         select TARGET_SOCFPGA_CYCLONE5
  50
  51 config TARGET_SOCFPGA_EBV_SOCRATES
  52         bool "EBV SoCrates (Cyclone V)"
  53         select TARGET_SOCFPGA_CYCLONE5
  54
  55 config TARGET_SOCFPGA_IS1
  56         bool "IS1 (Cyclone V)"
  57         select TARGET_SOCFPGA_CYCLONE5
  58
  59 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  60         bool "samtec VIN|ING FPGA (Cyclone V)"
  61         select TARGET_SOCFPGA_CYCLONE5
  62
  63 config TARGET_SOCFPGA_SR1500
  64         bool "SR1500 (Cyclone V)"
  65         select TARGET_SOCFPGA_CYCLONE5
  66
  67 config TARGET_SOCFPGA_TERASIC_DE0_NANO
  68         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
  69         select TARGET_SOCFPGA_CYCLONE5
  70
  71 config TARGET_SOCFPGA_TERASIC_SOCKIT
  72         bool "Terasic SoCkit (Cyclone V)"
  73         select TARGET_SOCFPGA_CYCLONE5
  74
  75 endchoice
  76
  77 config SYS_BOARD
  78         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  79         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  80         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  81         default "is1" if TARGET_SOCFPGA_IS1
  82         default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  83         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  84         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  85         default "sr1500" if TARGET_SOCFPGA_SR1500
  86         default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  87
  88 config SYS_VENDOR
  89         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
  90         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  91         default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
  92         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
  93         default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  94         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  95         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
  96
  97 config SYS_SOC
  98         default "socfpga"
  99
 100 config SYS_CONFIG_NAME
 101         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
 102         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 103         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
 104         default "socfpga_is1" if TARGET_SOCFPGA_IS1
 105         default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
 106         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 107         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
 108         default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
 109         default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 110
 111 endif