arch/arm/mach-socfpga/Kconfig

   1 if ARCH_SOCFPGA
   2
   3 config SPL_LIBCOMMON_SUPPORT
   4         default y
   5
   6 config SPL_LIBDISK_SUPPORT
   7         default y
   8
   9 config SPL_LIBGENERIC_SUPPORT
  10         default y
  11
  12 config SPL_MMC_SUPPORT
  13         default y if DM_MMC
  14
  15 config SPL_NAND_SUPPORT
  16         default y if SPL_NAND_DENALI
  17
  18 config SPL_SERIAL_SUPPORT
  19         default y
  20
  21 config TARGET_SOCFPGA_ARRIA5
  22         bool
  23         select TARGET_SOCFPGA_GEN5
  24
  25 config TARGET_SOCFPGA_CYCLONE5
  26         bool
  27         select TARGET_SOCFPGA_GEN5
  28
  29 config TARGET_SOCFPGA_GEN5
  30         bool
  31
  32 choice
  33         prompt "Altera SOCFPGA board select"
  34         optional
  35
  36 config TARGET_SOCFPGA_ARRIA5_SOCDK
  37         bool "Altera SOCFPGA SoCDK (Arria V)"
  38         select TARGET_SOCFPGA_ARRIA5
  39
  40 config TARGET_SOCFPGA_CYCLONE5_SOCDK
  41         bool "Altera SOCFPGA SoCDK (Cyclone V)"
  42         select TARGET_SOCFPGA_CYCLONE5
  43
  44 config TARGET_SOCFPGA_DENX_MCVEVK
  45         bool "DENX MCVEVK (Cyclone V)"
  46         select TARGET_SOCFPGA_CYCLONE5
  47
  48 config TARGET_SOCFPGA_EBV_SOCRATES
  49         bool "EBV SoCrates (Cyclone V)"
  50         select TARGET_SOCFPGA_CYCLONE5
  51
  52 config TARGET_SOCFPGA_IS1
  53         bool "IS1 (Cyclone V)"
  54         select TARGET_SOCFPGA_CYCLONE5
  55
  56 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  57         bool "samtec VIN|ING FPGA (Cyclone V)"
  58         select TARGET_SOCFPGA_CYCLONE5
  59
  60 config TARGET_SOCFPGA_SR1500
  61         bool "SR1500 (Cyclone V)"
  62         select TARGET_SOCFPGA_CYCLONE5
  63
  64 config TARGET_SOCFPGA_TERASIC_DE0_NANO
  65         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
  66         select TARGET_SOCFPGA_CYCLONE5
  67
  68 config TARGET_SOCFPGA_TERASIC_SOCKIT
  69         bool "Terasic SoCkit (Cyclone V)"
  70         select TARGET_SOCFPGA_CYCLONE5
  71
  72 endchoice
  73
  74 config SYS_BOARD
  75         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  76         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  77         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  78         default "is1" if TARGET_SOCFPGA_IS1
  79         default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
  80         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
  81         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
  82         default "sr1500" if TARGET_SOCFPGA_SR1500
  83         default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  84
  85 config SYS_VENDOR
  86         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
  87         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
  88         default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
  89         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
  90         default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
  91         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
  92         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
  93
  94 config SYS_SOC
  95         default "socfpga"
  96
  97 config SYS_CONFIG_NAME
  98         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
  99         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
 100         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
 101         default "socfpga_is1" if TARGET_SOCFPGA_IS1
 102         default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
 103         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
 104         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
 105         default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
 106         default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
 107
 108 endif