Merge branch 'master' of git://www.denx.de/git/u-boot-imx
[platform/kernel/u-boot.git] / arch / arm / mach-socfpga / Kconfig
1 if ARCH_SOCFPGA
2
3 config TARGET_SOCFPGA_ARRIA5
4         bool
5
6 config TARGET_SOCFPGA_CYCLONE5
7         bool
8
9 choice
10         prompt "Altera SOCFPGA board select"
11         optional
12
13 config TARGET_SOCFPGA_ARRIA5_SOCDK
14         bool "Altera SOCFPGA SoCDK (Arria V)"
15         select TARGET_SOCFPGA_ARRIA5
16
17 config TARGET_SOCFPGA_CYCLONE5_SOCDK
18         bool "Altera SOCFPGA SoCDK (Cyclone V)"
19         select TARGET_SOCFPGA_CYCLONE5
20
21 config TARGET_SOCFPGA_DENX_MCVEVK
22         bool "DENX MCVEVK (Cyclone V)"
23         select TARGET_SOCFPGA_CYCLONE5
24
25 config TARGET_SOCFPGA_EBV_SOCRATES
26         bool "EBV SoCrates (Cyclone V)"
27         select TARGET_SOCFPGA_CYCLONE5
28
29 config TARGET_SOCFPGA_TERASIC_DE0_NANO
30         bool "Terasic DE0-Nano-Atlas (Cyclone V)"
31         select TARGET_SOCFPGA_CYCLONE5
32
33 config TARGET_SOCFPGA_TERASIC_SOCKIT
34         bool "Terasic SoCkit (Cyclone V)"
35         select TARGET_SOCFPGA_CYCLONE5
36
37 endchoice
38
39 config SYS_BOARD
40         default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
41         default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
42         default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
43         default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
44         default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
45         default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
46
47 config SYS_VENDOR
48         default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
49         default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
50         default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
51         default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
52         default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
53         default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
54
55 config SYS_SOC
56         default "socfpga"
57
58 config SYS_CONFIG_NAME
59         default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
60         default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
61         default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
62         default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
63         default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
64         default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
65
66 endif