2 * SMP support for R-Mobile / SH-Mobile - r8a7779 portion
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/smp.h>
23 #include <linux/spinlock.h>
25 #include <linux/delay.h>
26 #include <linux/irqchip/arm-gic.h>
27 #include <mach/common.h>
28 #include <mach/r8a7779.h>
29 #include <asm/cacheflush.h>
30 #include <asm/smp_plat.h>
31 #include <asm/smp_scu.h>
32 #include <asm/smp_twd.h>
34 #define AVECR IOMEM(0xfe700040)
35 #define R8A7779_SCU_BASE 0xf0000000
37 static struct r8a7779_pm_ch r8a7779_ch_cpu1 = {
38 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
39 .chan_bit = 1, /* ARM1 */
40 .isr_bit = 1, /* ARM1 */
43 static struct r8a7779_pm_ch r8a7779_ch_cpu2 = {
44 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
45 .chan_bit = 2, /* ARM2 */
46 .isr_bit = 2, /* ARM2 */
49 static struct r8a7779_pm_ch r8a7779_ch_cpu3 = {
50 .chan_offs = 0x40, /* PWRSR0 .. PWRER0 */
51 .chan_bit = 3, /* ARM3 */
52 .isr_bit = 3, /* ARM3 */
55 static struct r8a7779_pm_ch *r8a7779_ch_cpu[4] = {
56 [1] = &r8a7779_ch_cpu1,
57 [2] = &r8a7779_ch_cpu2,
58 [3] = &r8a7779_ch_cpu3,
61 #ifdef CONFIG_HAVE_ARM_TWD
62 static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, R8A7779_SCU_BASE + 0x600, 29);
63 void __init r8a7779_register_twd(void)
65 twd_local_timer_register(&twd_local_timer);
69 static int r8a7779_platform_cpu_kill(unsigned int cpu)
71 struct r8a7779_pm_ch *ch = NULL;
74 cpu = cpu_logical_map(cpu);
76 if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
77 ch = r8a7779_ch_cpu[cpu];
80 ret = r8a7779_sysc_power_down(ch);
85 static void __cpuinit r8a7779_secondary_init(unsigned int cpu)
87 gic_secondary_init(0);
90 static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
92 struct r8a7779_pm_ch *ch = NULL;
95 cpu = cpu_logical_map(cpu);
97 if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
98 ch = r8a7779_ch_cpu[cpu];
101 ret = r8a7779_sysc_power_up(ch);
106 static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
108 scu_enable(shmobile_scu_base);
110 /* Map the reset vector (in headsmp-scu.S) */
111 __raw_writel(__pa(shmobile_secondary_vector_scu), AVECR);
113 /* enable cache coherency on booting CPU */
114 scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
118 /* power off secondary CPUs */
119 r8a7779_platform_cpu_kill(1);
120 r8a7779_platform_cpu_kill(2);
121 r8a7779_platform_cpu_kill(3);
124 static void __init r8a7779_smp_init_cpus(void)
126 /* setup r8a7779 specific SCU base */
127 shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
129 shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
132 #ifdef CONFIG_HOTPLUG_CPU
133 static int r8a7779_scu_psr_core_disabled(int cpu)
135 unsigned long mask = 3 << (cpu * 8);
137 if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
143 static int r8a7779_cpu_kill(unsigned int cpu)
147 /* this function is running on another CPU than the offline target,
148 * here we need wait for shutdown code in platform_cpu_die() to
149 * finish before asking SoC-specific code to power off the CPU core.
151 for (k = 0; k < 1000; k++) {
152 if (r8a7779_scu_psr_core_disabled(cpu))
153 return r8a7779_platform_cpu_kill(cpu);
161 static void r8a7779_cpu_die(unsigned int cpu)
166 /* disable cache coherency */
167 scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
169 /* Endless loop until power off from r8a7779_cpu_kill() */
174 static int r8a7779_cpu_disable(unsigned int cpu)
176 /* only CPU1->3 have power domains, do not allow hotplug of CPU0 */
177 return cpu == 0 ? -EPERM : 0;
179 #endif /* CONFIG_HOTPLUG_CPU */
181 struct smp_operations r8a7779_smp_ops __initdata = {
182 .smp_init_cpus = r8a7779_smp_init_cpus,
183 .smp_prepare_cpus = r8a7779_smp_prepare_cpus,
184 .smp_secondary_init = r8a7779_secondary_init,
185 .smp_boot_secondary = r8a7779_boot_secondary,
186 #ifdef CONFIG_HOTPLUG_CPU
187 .cpu_kill = r8a7779_cpu_kill,
188 .cpu_die = r8a7779_cpu_die,
189 .cpu_disable = r8a7779_cpu_disable,