tizen 2.4 release
[profile/mobile/platform/kernel/linux-3.10-sc7730.git] / arch / arm / mach-sc / board-sp9830iec_4m_h100.c
1 /*
2  * Copyright (C) 2014 Spreadtrum Communications Inc.
3  *
4  * This software is licensed under the terms of the GNU General Public
5  * License version 2, as published by the Free Software Foundation, and
6  * may be copied, distributed, and modified under those terms.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17 #include <linux/delay.h>
18 #include <linux/export.h>
19 #include <linux/irqchip/arm-gic.h>
20 #include <linux/input.h>
21
22 #include <asm/io.h>
23 #include <asm/setup.h>
24 #include <asm/mach/time.h>
25 #include <asm/mach/arch.h>
26 #include <asm/mach/map.h>
27 #include <asm/mach-types.h>
28 #include <asm/hardware/cache-l2x0.h>
29 #include <asm/localtimer.h>
30 #include <linux/of_platform.h>
31 #include <linux/of.h>
32 #include <linux/of_address.h>
33 #include <linux/clocksource.h>
34 #include <linux/clk-provider.h>
35 #include <soc/sprd/hardware.h>
36 #include <linux/i2c.h>
37 #if (defined(CONFIG_INPUT_LIS3DH_I2C) || defined(CONFIG_INPUT_LIS3DH_I2C_MODULE))
38 #include <linux/i2c/lis3dh.h>
39 #endif
40 #if (defined(CONFIG_INPUT_LTR558_I2C) || defined(CONFIG_INPUT_LTR558_I2C_MODULE))
41 #include <linux/i2c/ltr_558als.h>
42 #endif
43 #if (defined(CONFIG_TOUCHSCREEN_MSG2138) || defined(CONFIG_TOUCHSCREEN_MSG2138_MODULE))
44 #include <linux/i2c/msg2138.h>
45 #endif
46 #include <linux/spi/spi.h>
47 #include <linux/gpio.h>
48 #include <soc/sprd/board.h>
49 #include <soc/sprd/serial_sprd.h>
50 #include <soc/sprd/adi.h>
51 #include <soc/sprd/adc.h>
52 #include <soc/sprd/pinmap.h>
53 #include <linux/irq.h>
54 #include <linux/input/matrix_keypad.h>
55
56 #include <soc/sprd/sci.h>
57 #include <soc/sprd/kpd.h>
58 #include <soc/sprd/sci_glb_regs.h>
59
60 #if (defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE))
61 #include <linux/mpu.h>
62 #endif
63 #if (defined(CONFIG_SENSORS_AK8975) || defined(CONFIG_SENSORS_AK8975_MODULE))
64 #include <linux/akm8975.h>
65 #endif
66
67
68 /* IRQ's for the multi sensor board */
69 #define MPUIRQ_GPIO 212
70 #include <linux/regulator/consumer.h>
71 #include <soc/sprd/regulator.h>
72 #if (defined(CONFIG_TOUCHSCREEN_FOCALTECH) || defined(CONFIG_TOUCHSCREEN_FOCALTECH_MODULE))
73 #include <linux/i2c/focaltech.h>
74 #endif
75
76 #if (defined(CONFIG_KEYBOARD_SC) || defined (CONFIG_KEYBOARD_SC_MODULE))
77 #include <linux/input/matrix_keypad.h>
78 #include <soc/sprd/kpd.h>
79 #endif
80 #if (defined(CONFIG_KEYBOARD_GPIO) || defined (CONFIG_KEYBOARD_GPIO_MODULE))
81 #include <linux/gpio_keys.h>
82 #endif
83 #if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
84 #include <linux/sprd_eic_keys.h>
85 #endif
86 #if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
87 #include <linux/sprd_pwm_bl.h>
88 #endif
89 #if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
90 #include <linux/headset_sprd_sc2723.h>
91 #endif
92 extern void bluesleep_setup_uart_port(struct platform_device *uart_dev);
93 extern void __init sci_reserve(void);
94 extern void __init sci_map_io(void);
95 extern void __init sci_init_irq(void);
96 extern void __init sci_timer_init(void);
97 extern int __init sci_clock_init(void);
98 extern int __init sci_regulator_init(void);
99
100 int __init __clock_init_early(void)
101 {
102 #if !defined(CONFIG_ARCH_SCX15)
103         pr_info("ahb ctl0 %08x, ctl2 %0x8 glb aon apb0 %08x aon apb1 %08x clk_en %08x\n",
104                 sci_glb_raw_read(REG_AP_AHB_AHB_EB),
105                 sci_glb_raw_read(REG_AP_AHB_AHB_RST),
106                 sci_glb_raw_read(REG_AON_APB_APB_EB0),
107                 sci_glb_raw_read(REG_AON_APB_APB_EB1),
108                 sci_glb_raw_read(REG_AON_CLK_PUB_AHB_CFG));
109 #endif
110
111         sci_glb_clr(REG_AP_AHB_AHB_EB,
112                 BIT_BUSMON2_EB          |
113                 BIT_BUSMON1_EB          |
114                 BIT_BUSMON0_EB          |
115                 BIT_SPINLOCK_EB         |
116 #if !defined(CONFIG_ARCH_SCX35L)
117                 BIT_GPS_EB              |
118 #endif
119                 BIT_EMMC_EB             |
120                 BIT_SDIO2_EB            |
121                 BIT_SDIO1_EB            |
122                 BIT_SDIO0_EB            |
123                 BIT_DRM_EB              |
124                 BIT_NFC_EB              |
125                 BIT_DMA_EB              |
126                 BIT_USB_EB              |
127 #if !defined(CONFIG_ARCH_SCX35L)
128                 BIT_GSP_EB              |
129                 BIT_DISPC1_EB           |
130 #endif
131                 0);
132         sci_glb_clr(REG_AP_APB_APB_EB,
133                 BIT_INTC3_EB            |
134                 BIT_INTC2_EB            |
135                 BIT_INTC1_EB            |
136                 BIT_IIS1_EB             |
137                 BIT_UART2_EB            |
138                 BIT_UART0_EB            |
139                 BIT_SPI1_EB             |
140                 BIT_SPI0_EB             |
141                 BIT_IIS0_EB             |
142                 BIT_I2C0_EB             |
143                 BIT_SPI2_EB             |
144                 BIT_UART3_EB            |
145                 0);
146         sci_glb_clr(REG_AON_APB_APB_RTC_EB,
147                 BIT_KPD_RTC_EB          |
148                 BIT_KPD_EB              |
149                 BIT_EFUSE_EB            |
150                 0);
151
152         sci_glb_clr(REG_AON_APB_APB_EB0,
153                 BIT_AUDIF_EB                    |
154                 BIT_VBC_EB                      |
155                 BIT_PWM3_EB                     |
156                 BIT_PWM1_EB                     |
157                 0);
158         sci_glb_clr(REG_AON_APB_APB_EB1,
159                 BIT_AUX1_EB                     |
160                 BIT_AUX0_EB                     |
161                 0);
162 #if defined(CONFIG_MACH_SP9830IEC_4M_H100)
163         sci_glb_set(REG_AON_APB_APB_EB1, BIT_CODEC_EB | 0);
164 #endif
165         printk("sc clock module early init ok\n");
166         return 0;
167 }
168
169 static inline int __sci_get_chip_id(void)
170 {
171         return __raw_readl(CHIP_ID_LOW_REG);
172 }
173
174 const struct of_device_id of_sprd_default_bus_match_table[] = {
175         { .compatible = "simple-bus", },
176         { .compatible = "sprd,adi-bus", },
177         {}
178 };
179
180 static struct of_dev_auxdata of_sprd_default_bus_lookup[] = {
181         { .compatible = "sprd,sprd_backlight", .name = "sprd_backlight" },
182 #if (defined(CONFIG_BACKLIGHT_SPRD_PWM) || defined(CONFIG_BACKLIGHT_SPRD_PWM_MODULE))
183         { .compatible = "sprd,sprd_pwm_bl",  .name = "sprd_pwm_bl" },
184 #endif
185 #if (defined(CONFIG_KEYBOARD_SC) || defined(CONFIG_KEYBOARD_SC_MODULE))
186         {.compatible = "sprd,sci-keypad", .name = "sci-keypad" },
187 #endif
188 #if (defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE))
189         {.compatible = "gpio-keys", .name = "gpio-keys" },
190 #endif
191 #if (defined(CONFIG_KEYBOARD_SPRD_EIC) || defined(CONFIG_KEYBOARD_SPRD_EIC_MODULE))
192         {.compatible = "sprd,sprd-eic-keys", .name = "sprd-eic-keys" },
193 #endif
194 #if (defined(CONFIG_INPUT_HEADSET_SPRD_SC2723) || defined(CONFIG_INPUT_HEADSET_SPRD_SC2723_MODULE))
195         { .compatible = "sprd,headset_sprd_sc2723",  .name = "headset_sprd_sc2723" },
196 #endif
197         {}
198 };
199
200 struct iotable_sprd io_addr_sprd;
201 EXPORT_SYMBOL(io_addr_sprd);
202
203 int iotable_build()
204 {
205         struct device_node *np;
206         struct resource res;
207
208 #define ADD_SPRD_DEVICE(compat, id)                     \
209 do {                                                    \
210         np = of_find_compatible_node(NULL, NULL, compat);\
211         if (of_can_translate_address(np)) {             \
212                 of_address_to_resource(np, 0, &res);    \
213                 io_addr_sprd.id.paddr = res.start;      \
214                 io_addr_sprd.id.length =                \
215                         resource_size(&res);            \
216                 io_addr_sprd.id.vaddr =                 \
217                 ioremap_nocache(res.start, io_addr_sprd.id.length);\
218                 pr_debug("sprd io map: phys=%08x virt=%08x size=%08x\n", \
219         io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
220         }                                               \
221 } while (0)
222 #define ADD_SPRD_DEVICE_BY_NAME(name, id)               \
223 do {                                                    \
224         np = of_find_node_by_name(NULL, name);          \
225         if (of_can_translate_address(np)) {             \
226                 of_address_to_resource(np, 0, &res);    \
227                 io_addr_sprd.id.paddr = res.start;      \
228                 io_addr_sprd.id.length =                \
229                         resource_size(&res);            \
230                 io_addr_sprd.id.vaddr =                 \
231                 ioremap_nocache(res.start, io_addr_sprd.id.length);\
232                 pr_debug("sprd io map: phys=%16lx virt=%16lx size=%16lx\n", \
233         io_addr_sprd.id.paddr, io_addr_sprd.id.vaddr, io_addr_sprd.id.length);\
234         }                                               \
235 } while (0)
236         ADD_SPRD_DEVICE("sprd,ahb", AHB);
237         ADD_SPRD_DEVICE("sprd,aonapb", AONAPB);
238         ADD_SPRD_DEVICE("sprd,aonckg", AONCKG);
239         ADD_SPRD_DEVICE("sprd,apbreg", APBREG);
240         ADD_SPRD_DEVICE("sprd,core", CORE);
241         ADD_SPRD_DEVICE("sprd,mmahb", MMAHB);
242         ADD_SPRD_DEVICE("sprd,pmu", PMU);
243         ADD_SPRD_DEVICE("sprd,mmckg", MMCKG);
244         ADD_SPRD_DEVICE("sprd,gpuapb", GPUAPB);
245         ADD_SPRD_DEVICE("sprd,apbckg", APBCKG);
246         ADD_SPRD_DEVICE("sprd,gpuckg", GPUCKG);
247         ADD_SPRD_DEVICE("sprd,int", INT);
248         ADD_SPRD_DEVICE("sprd,intc0", INTC0);
249         ADD_SPRD_DEVICE("sprd,intc1", INTC1);
250         ADD_SPRD_DEVICE("sprd,intc2", INTC2);
251         ADD_SPRD_DEVICE("sprd,intc3", INTC3);
252         ADD_SPRD_DEVICE("sprd,uidefuse", UIDEFUSE);
253         ADD_SPRD_DEVICE("sprd,isp", ISP);
254         ADD_SPRD_DEVICE("sprd,ca7wdg", CA7WDG);
255         ADD_SPRD_DEVICE("sprd,csi2", CSI2);
256         ADD_SPRD_DEVICE("sprd,d-eic-gpio", EIC);
257         ADD_SPRD_DEVICE("sprd,wdg", WDG);
258         ADD_SPRD_DEVICE("sprd,ipi", IPI);
259         ADD_SPRD_DEVICE("sprd,dcam", DCAM);
260         ADD_SPRD_DEVICE("sprd,syscnt", SYSCNT);
261         ADD_SPRD_DEVICE("sprd,dma0", DMA0);
262         ADD_SPRD_DEVICE("sprd,pub", PUB);
263         ADD_SPRD_DEVICE("sprd,pin", PIN);
264         ADD_SPRD_DEVICE("sprd,d-gpio-gpio", GPIO);
265         ADD_SPRD_DEVICE("sprd,codecahb", CODECAHB);
266         ADD_SPRD_DEVICE_BY_NAME("hwspinlock0", HWSPINLOCK0);
267         ADD_SPRD_DEVICE_BY_NAME("hwspinlock1", HWSPINLOCK1);
268
269         return 0;
270 }
271
272 static void __init sc8830_init_machine(void)
273 {
274         printk("sci get chip id = 0x%x\n", __sci_get_chip_id());
275
276         sci_adc_init();
277 #ifndef CONFIG_MACH_SPX35LFPGA
278         sci_regulator_init();
279 #endif
280         of_sprd_default_bus_lookup[0].phys_addr = 0x20300000;
281         of_sprd_default_bus_lookup[1].phys_addr = 0x20400000;
282         of_sprd_default_bus_lookup[2].phys_addr = 0x20500000;
283         of_sprd_default_bus_lookup[3].phys_addr = 0x20600000;
284         of_platform_populate(NULL, of_sprd_default_bus_match_table, of_sprd_default_bus_lookup, NULL);
285 }
286
287 #ifdef CONFIG_OF
288 const struct of_device_id of_sprd_late_bus_match_table[] = {
289         { .compatible = "sprd,sound", },
290         {}
291 };
292 #endif
293
294 static void __init sc8830_init_late(void)
295 {
296         of_platform_populate(of_find_node_by_path("/sprd-audio-devices"),
297                                 of_sprd_late_bus_match_table, NULL, NULL);
298 }
299
300
301 extern void __init sci_enable_timer_early(void);
302 extern void __init sc_init_chip_id(void);
303
304 void __init sprd_init_before_irq(void)
305 {
306         iotable_build();
307         sc_init_chip_id();
308         /* earlier init request than irq and timer */
309         __clock_init_early();
310         /*ipi reg init for sipc*/
311         sci_glb_set(REG_AON_APB_APB_EB0, BIT_IPI_EB);
312 }
313
314 static void __init sc8830_pmu_init(void)
315 {
316         __raw_writel(__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG)
317                 & ~(BIT_PD_MM_TOP_FORCE_SHUTDOWN),
318                 REG_PMU_APB_PD_MM_TOP_CFG);
319
320         while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0xf0000000) {};
321
322         __raw_writel(__raw_readl(REG_PMU_APB_PD_GPU_TOP_CFG)
323                 & ~(BIT_PD_GPU_TOP_FORCE_SHUTDOWN),
324                 REG_PMU_APB_PD_GPU_TOP_CFG);
325
326         while (__raw_readl(REG_PMU_APB_PWR_STATUS0_DBG) & 0x0f000000) {};
327
328         __raw_writel(__raw_readl(REG_AON_APB_APB_EB0) | BIT_MM_EB |
329                 BIT_GPU_EB, REG_AON_APB_APB_EB0);
330         __raw_writel(__raw_readl(REG_MM_AHB_AHB_EB) | BIT_MM_CKG_EB,
331                 REG_MM_AHB_AHB_EB);
332         __raw_writel(__raw_readl(REG_MM_AHB_GEN_CKG_CFG)
333                 | BIT_MM_MTX_AXI_CKG_EN | BIT_MM_AXI_CKG_EN,
334                 REG_MM_AHB_GEN_CKG_CFG);
335         __raw_writel(__raw_readl(REG_MM_CLK_MM_AHB_CFG) | 0x3,
336                 REG_MM_CLK_MM_AHB_CFG);
337         __raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, REG_AON_APB_APB_EB1);
338 }
339
340 static void sprd_init_time(void)
341 {
342         if (of_have_populated_dt()) {
343                 sc8830_pmu_init();
344                 of_clk_init(NULL);
345                 clocksource_of_init();
346         } else {
347                 sci_clock_init();
348                 sci_enable_timer_early();
349                 sci_timer_init();
350         }
351 }
352 static const char *sprd_boards_compat[] __initdata = {
353         "sprd,sp8835eb",
354         NULL,
355 };
356 extern struct smp_operations sprd_smp_ops;
357
358 MACHINE_START(SCPHONE, "sc8830")
359         .smp            = smp_ops(sprd_smp_ops),
360         .reserve        = sci_reserve,
361         .map_io         = sci_map_io,
362         .init_irq       = sci_init_irq,
363         .init_time      = sprd_init_time,
364         .init_machine   = sc8830_init_machine,
365         .init_late      = sc8830_init_late,
366         .dt_compat      = sprd_boards_compat,
367 MACHINE_END
368