2 * linux/arch/arm/mach-sa1100/time.c
4 * Copyright (C) 1998 Deborah Wallach.
5 * Twiddles (C) 1999 Hugo Fiennes <hugo@empeg.com>
7 * 2000/03/29 (C) Nicolas Pitre <nico@fluxnic.net>
8 * Rewritten: big cleanup, much simpler, better HZ accuracy.
11 #include <linux/init.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/sched.h> /* just for sched_clock() - funny that */
16 #include <linux/timex.h>
17 #include <linux/clockchips.h>
19 #include <asm/mach/time.h>
20 #include <asm/sched_clock.h>
21 #include <mach/hardware.h>
24 * This is the SA11x0 sched_clock implementation.
26 static DEFINE_CLOCK_DATA(cd);
29 * Constants generated by clocks_calc_mult_shift(m, s, 3.6864MHz,
31 * This gives a resolution of about 271ns and a wrap period of about 19min.
33 #define SC_MULT 2275555556u
36 unsigned long long notrace sched_clock(void)
39 return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
42 static void notrace sa1100_update_sched_clock(void)
45 update_sched_clock(&cd, cyc, (u32)~0);
48 #define MIN_OSCR_DELTA 2
50 static irqreturn_t sa1100_ost0_interrupt(int irq, void *dev_id)
52 struct clock_event_device *c = dev_id;
54 /* Disarm the compare/match, signal the event. */
63 sa1100_osmr0_set_next_event(unsigned long delta, struct clock_event_device *c)
65 unsigned long next, oscr;
72 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
76 sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c)
79 case CLOCK_EVT_MODE_ONESHOT:
80 case CLOCK_EVT_MODE_UNUSED:
81 case CLOCK_EVT_MODE_SHUTDOWN:
86 case CLOCK_EVT_MODE_RESUME:
87 case CLOCK_EVT_MODE_PERIODIC:
92 static struct clock_event_device ckevt_sa1100_osmr0 = {
94 .features = CLOCK_EVT_FEAT_ONESHOT,
96 .set_next_event = sa1100_osmr0_set_next_event,
97 .set_mode = sa1100_osmr0_set_mode,
100 static cycle_t sa1100_read_oscr(struct clocksource *s)
105 static struct clocksource cksrc_sa1100_oscr = {
108 .read = sa1100_read_oscr,
109 .mask = CLOCKSOURCE_MASK(32),
110 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
113 static struct irqaction sa1100_timer_irq = {
115 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
116 .handler = sa1100_ost0_interrupt,
117 .dev_id = &ckevt_sa1100_osmr0,
120 static void __init sa1100_timer_init(void)
123 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
125 init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32,
126 3686400, SC_MULT, SC_SHIFT);
128 clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4);
129 ckevt_sa1100_osmr0.max_delta_ns =
130 clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0);
131 ckevt_sa1100_osmr0.min_delta_ns =
132 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_sa1100_osmr0) + 1;
133 ckevt_sa1100_osmr0.cpumask = cpumask_of(0);
135 setup_irq(IRQ_OST0, &sa1100_timer_irq);
137 clocksource_register_hz(&cksrc_sa1100_oscr, CLOCK_TICK_RATE);
138 clockevents_register_device(&ckevt_sa1100_osmr0);
142 unsigned long osmr[4], oier;
144 static void sa1100_timer_suspend(void)
153 static void sa1100_timer_resume(void)
163 * OSMR0 is the system timer: make sure OSCR is sufficiently behind
165 OSCR = OSMR0 - LATCH;
168 #define sa1100_timer_suspend NULL
169 #define sa1100_timer_resume NULL
172 struct sys_timer sa1100_timer = {
173 .init = sa1100_timer_init,
174 .suspend = sa1100_timer_suspend,
175 .resume = sa1100_timer_resume,