1 /* linux/arch/arm/mach-s5pv310/sleep.S
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * S5PV310 power Manager (Suspend-To-RAM) support
7 * Based on S3C2410 sleep code by:
8 * Ben Dooks, (c) 2004 Simtec Electronics
10 * Based on PXA/SA1100 sleep code by:
11 * Nicolas Pitre, (c) 2002 Monta Vista Software Inc
12 * Cliff Brake, (c) 2001
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 #include <linux/linkage.h>
30 #include <asm/assembler.h>
31 #include <asm/memory.h>
32 #include <asm/system.h>
34 #include <mach/regs-clock.h>
42 * r0 = save address (virtual addr of s3c_sleep_save_phys)
47 stmfd sp!, { r3 - r12, lr }
49 mrc p15, 0, r4, c13, c0, 1 @ Context ID
50 mrc p15, 0, r5, c3, c0, 0 @ Domain ID
51 mrc p15, 0, r6, c2, c0, 0 @ Translation Table BASE0
52 mrc p15, 0, r7, c2, c0, 1 @ Translation Table BASE1
53 mrc p15, 0, r8, c2, c0, 2 @ Translation Table Control
54 mrc p15, 0, r9, c1, c0, 0 @ Control register
55 mrc p15, 0, r10, c1, c0, 1 @ Auxiliary control register
56 mrc p15, 0, r11, c1, c0, 2 @ Co-processor access controls
57 mrc p15, 0, r12, c10, c2, 0 @ Read PRRR
58 mrc p15, 0, r3, c10, c2, 1 @ READ NMRR
60 stmia r0!, { r3 - r13 }
65 mrc p15, 0, r3, c15, c0, 0 @ read power control register
68 mrc p15, 0, r3, c15, c0, 1 @ read diagnostic register
75 ldr r1 ,=S5P_CHECK_SLEEP
79 bl s3c_pm_cb_flushcache
81 bl s5pv310_cpu_suspend
84 ldmfd sp!, { r3 - r12, pc }
88 #if defined(CONFIG_CPU_IDLE)
91 /* r0 : Virtual address of current stack */
92 bl s5p_aftr_cache_clean
94 bl s5pv310_set_core0_pwroff
96 * early wakeup condition
100 ldmfd sp!, { r3 - r12, pc }
108 ldr r1 ,=S5P_CHECK_SLEEP
112 ldr r9, =(PAGE_OFFSET - PHYS_OFFSET)
117 ldmfd sp!, { r3 - r12, pc }
123 .global s3c_sleep_save_phys
127 /* sleep magic, to allow the bootloader to check for an valid
128 * image to resume to. Must be the first word before the
129 * s3c_cpu_resume entry.
136 * resume code entry for bootloader to call
138 * we must put this code here in the data segment as we have no
139 * other way of restoring the stack pointer after sleep, and we
140 * must not write to the code segment (code is read-only)
143 ENTRY(s3c_cpu_resume)
144 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
148 mcr p15, 0, r1, c8, c7, 0 @ invalidate TLBs
149 mcr p15, 0, r1, c7, c5, 0 @ invalidate I Cache
152 ldr r0, s3c_sleep_save_phys @ address of restore block
153 ldmia r0!, { r3 - r13 }
161 mcr p15, 0, r1, c15, c0, 0 @ write power control register
164 mcr p15, 0, r1, c15, c0, 1 @ write diagnostic register
166 mcr p15, 0, r4, c13, c0, 1 @ Context ID
167 mcr p15, 0, r5, c3, c0, 0 @ Domain ID
169 mcr p15, 0, r8, c2, c0, 2 @ Translation Table Control
170 mcr p15, 0, r7, c2, c0, 1 @ Translation Table BASE1
171 mcr p15, 0, r6, c2, c0, 0 @ Translation Table BASE0
173 mcr p15, 0, r10, c1, c0, 1 @ Auxiliary control register
176 mcr p15, 0, r0, c8, c7, 0 @ Invalidate I & D TLB
178 mov r0, #0 @ restore copro access
179 mcr p15, 0, r11, c1, c0, 2 @ Co-processor access
180 mcr p15, 0, r0, c7, c5, 4
182 mcr p15, 0, r12, c10, c2, 0 @ write PRRR
183 mcr p15, 0, r3, c10, c2, 1 @ write NMRR
187 ldr r1 ,=S5P_CHECK_SLEEP
195 orr r0, r0, #(1 << 5)
198 /* Outer cache TAG,DATA latency */
204 /* L2 cache prefetch control register */
208 /* Power control register setting*/
220 /* Enable L2 cache */
232 mov r10, r10, LSR #18
236 mov r10, r10, LSL #18
245 ldr r2, =resume_with_mmu
246 mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, etc
252 nop @ second-to-last before mmu
254 mov pc, r2 @ go back to virtual address