arch/arm/mach-s5pv310/pm.c

   1 /* linux/arch/arm/mach-s5pv310/pm.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * S5PV310 - Power Management support
   7  *
   8  * Based on arch/arm/mach-s3c2410/pm.c
   9  * Copyright (c) 2006 Simtec Electronics
  10  *      Ben Dooks <ben@simtec.co.uk>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15 */
  16
  17 #include <linux/clk.h>
  18 #include <linux/err.h>
  19 #include <linux/init.h>
  20 #include <linux/suspend.h>
  21 #include <linux/io.h>
  22 #include <linux/regulator/machine.h>
  23 #include <linux/reboot.h>
  24
  25 #include <plat/cpu.h>
  26 #include <plat/pm.h>
  27 #include <plat/regs-timer.h>
  28 #include <plat/s5pv310.h>
  29
  30 #include <asm/cacheflush.h>
  31 #include <asm/hardware/cache-l2x0.h>
  32
  33 #include <mach/regs-irq.h>
  34 #include <mach/regs-gpio.h>
  35 #include <mach/regs-clock.h>
  36 #include <mach/regs-systimer.h>
  37 #include <mach/pm-core.h>
  38 #include <mach/regs-mem.h>
  39 #include <mach/cpu_revision.h>
  40
  41 void (*s3c_config_sleep_gpio_table)(void);
  42
  43 extern int s5p_l2x0_cache_init(void);
  44
  45 /* If voice-call is executed, PM should turn on the power of codec during sleep
  46  * - 'xusbxti_idx' is index of S5P_XUSBXTI_LOWPWR in s5pv310_sleep[]
  47  * - 'enable_on_suspend' checks whether codec needs to keep state during sleep
  48  */
  49 static unsigned int xusbxti_idx;
  50 static unsigned int enable_on_suspend;
  51 void s5pv310_enable_on_suspend(unsigned int val)
  52 {
  53         enable_on_suspend = val;
  54 }
  55 EXPORT_SYMBOL(s5pv310_enable_on_suspend);
  56
  57 static struct sleep_save s5pv310_sleep[] = {
  58         { .reg = S5P_ARM_CORE0_LOWPWR                   , .val = 0x2, },
  59         { .reg = S5P_DIS_IRQ_CORE0                      , .val = 0x0, },
  60         { .reg = S5P_DIS_IRQ_CENTRAL0                   , .val = 0x0, },
  61         { .reg = S5P_ARM_CORE1_LOWPWR                   , .val = 0x2, },
  62         { .reg = S5P_DIS_IRQ_CORE1                      , .val = 0x0, },
  63         { .reg = S5P_DIS_IRQ_CENTRAL1                   , .val = 0x0, },
  64         { .reg = S5P_ARM_COMMON_LOWPWR                  , .val = 0x2, },
  65         { .reg = S5P_L2_0_LOWPWR                        , .val = 0x3, },
  66         { .reg = S5P_L2_1_LOWPWR                        , .val = 0x3, },
  67         { .reg = S5P_CMU_ACLKSTOP_LOWPWR                , .val = 0x0, },
  68         { .reg = S5P_CMU_SCLKSTOP_LOWPWR                , .val = 0x0, },
  69         { .reg = S5P_CMU_RESET_LOWPWR                   , .val = 0x0, },
  70         { .reg = S5P_APLL_SYSCLK_LOWPWR                 , .val = 0x0, },
  71         { .reg = S5P_MPLL_SYSCLK_LOWPWR                 , .val = 0x0, },
  72         { .reg = S5P_VPLL_SYSCLK_LOWPWR                 , .val = 0x0, },
  73         { .reg = S5P_EPLL_SYSCLK_LOWPWR                 , .val = 0x0, },
  74         { .reg = S5P_CMU_CLKSTOP_GPS_ALIVE_LOWPWR       , .val = 0x0, },
  75         { .reg = S5P_CMU_RESET_GPSALIVE_LOWPWR          , .val = 0x0, },
  76         { .reg = S5P_CMU_CLKSTOP_CAM_LOWPWR             , .val = 0x0, },
  77         { .reg = S5P_CMU_CLKSTOP_TV_LOWPWR              , .val = 0x0, },
  78         { .reg = S5P_CMU_CLKSTOP_MFC_LOWPWR             , .val = 0x0, },
  79         { .reg = S5P_CMU_CLKSTOP_G3D_LOWPWR             , .val = 0x0, },
  80         { .reg = S5P_CMU_CLKSTOP_LCD0_LOWPWR            , .val = 0x0, },
  81         { .reg = S5P_CMU_CLKSTOP_LCD1_LOWPWR            , .val = 0x0, },
  82         { .reg = S5P_CMU_CLKSTOP_MAUDIO_LOWPWR          , .val = 0x0, },
  83         { .reg = S5P_CMU_CLKSTOP_GPS_LOWPWR             , .val = 0x0, },
  84         { .reg = S5P_CMU_RESET_CAM_LOWPWR               , .val = 0x0, },
  85         { .reg = S5P_CMU_RESET_TV_LOWPWR                , .val = 0x0, },
  86         { .reg = S5P_CMU_RESET_MFC_LOWPWR               , .val = 0x0, },
  87         { .reg = S5P_CMU_RESET_G3D_LOWPWR               , .val = 0x0, },
  88         { .reg = S5P_CMU_RESET_LCD0_LOWPWR              , .val = 0x0, },
  89         { .reg = S5P_CMU_RESET_LCD1_LOWPWR              , .val = 0x0, },
  90         { .reg = S5P_CMU_RESET_MAUDIO_LOWPWR            , .val = 0x0, },
  91         { .reg = S5P_CMU_RESET_GPS_LOWPWR               , .val = 0x0, },
  92         { .reg = S5P_TOP_BUS_LOWPWR                     , .val = 0x0, },
  93         { .reg = S5P_TOP_RETENTION_LOWPWR               , .val = 0x1, },
  94         { .reg = S5P_TOP_PWR_LOWPWR                     , .val = 0x3, },
  95         { .reg = S5P_LOGIC_RESET_LOWPWR                 , .val = 0x0, },
  96         { .reg = S5P_ONENAND_MEM_LOWPWR                 , .val = 0x0, },
  97         { .reg = S5P_MODIMIF_MEM_LOWPWR                 , .val = 0x0, },
  98         { .reg = S5P_G2D_ACP_MEM_LOWPWR                 , .val = 0x0, },
  99         { .reg = S5P_USBOTG_MEM_LOWPWR                  , .val = 0x0, },
 100         { .reg = S5P_HSMMC_MEM_LOWPWR                   , .val = 0x0, },
 101         { .reg = S5P_CSSYS_MEM_LOWPWR                   , .val = 0x0, },
 102         { .reg = S5P_SECSS_MEM_LOWPWR                   , .val = 0x0, },
 103         { .reg = S5P_PCIE_MEM_LOWPWR                    , .val = 0x0, },
 104         { .reg = S5P_SATA_MEM_LOWPWR                    , .val = 0x0, },
 105         { .reg = S5P_PAD_RETENTION_DRAM_LOWPWR          , .val = 0x0, },
 106         { .reg = S5P_PAD_RETENTION_MAUDIO_LOWPWR        , .val = 0x0, },
 107         { .reg = S5P_PAD_RETENTION_GPIO_LOWPWR          , .val = 0x0, },
 108         { .reg = S5P_PAD_RETENTION_UART_LOWPWR          , .val = 0x0, },
 109         { .reg = S5P_PAD_RETENTION_MMCA_LOWPWR          , .val = 0x0, },
 110         { .reg = S5P_PAD_RETENTION_MMCB_LOWPWR          , .val = 0x0, },
 111         { .reg = S5P_PAD_RETENTION_EBIA_LOWPWR          , .val = 0x0, },
 112         { .reg = S5P_PAD_RETENTION_EBIB_LOWPWR          , .val = 0x0, },
 113         { .reg = S5P_PAD_RETENTION_ISOLATION_LOWPWR     , .val = 0x0, },
 114         { .reg = S5P_PAD_RETENTION_ALV_SEL_LOWPWR       , .val = 0x0, },
 115         { .reg = S5P_XUSBXTI_LOWPWR                     , .val = 0x0, },
 116         { .reg = S5P_XXTI_LOWPWR                        , .val = 0x0, },
 117         { .reg = S5P_EXT_REGULATOR_LOWPWR               , .val = 0x0, },
 118         { .reg = S5P_GPIO_MODE_LOWPWR                   , .val = 0x0, },
 119         { .reg = S5P_GPIO_MODE_MAUDIO_LOWPWR            , .val = 0x0, },
 120         { .reg = S5P_CAM_LOWPWR                         , .val = 0x0, },
 121         { .reg = S5P_TV_LOWPWR                          , .val = 0x0, },
 122         { .reg = S5P_MFC_LOWPWR                         , .val = 0x0, },
 123         { .reg = S5P_G3D_LOWPWR                         , .val = 0x0, },
 124         { .reg = S5P_LCD0_LOWPWR                        , .val = 0x0, },
 125         { .reg = S5P_LCD1_LOWPWR                        , .val = 0x0, },
 126         { .reg = S5P_MAUDIO_LOWPWR                      , .val = 0x0, },
 127         { .reg = S5P_GPS_LOWPWR                         , .val = 0x0, },
 128         { .reg = S5P_GPS_ALIVE_LOWPWR                   , .val = 0x0, },
 129         { .reg = S5P_LCD1_LOWPWR                        , .val = 0x0, },
 130         { .reg = S5P_MAUDIO_LOWPWR                      , .val = 0x0, },
 131         { .reg = S5P_GPS_LOWPWR                         , .val = 0x0, },
 132         { .reg = S5P_GPS_ALIVE_LOWPWR                   , .val = 0x0, },
 133 };
 134
 135 static struct sleep_save s5pv310_set_clksrc[] = {
 136         { .reg = S5P_CLKSRC_MASK_TOP                    , .val = 0x00000001, },
 137         { .reg = S5P_CLKSRC_MASK_CAM                    , .val = 0x11111111, },
 138         { .reg = S5P_CLKSRC_MASK_TV                     , .val = 0x00000111, },
 139         { .reg = S5P_CLKSRC_MASK_LCD0                   , .val = 0x00001111, },
 140         { .reg = S5P_CLKSRC_MASK_LCD1                   , .val = 0x00001111, },
 141         { .reg = S5P_CLKSRC_MASK_MAUDIO                 , .val = 0x00000001, },
 142         { .reg = S5P_CLKSRC_MASK_FSYS                   , .val = 0x01011111, },
 143         { .reg = S5P_CLKSRC_MASK_PERIL0                 , .val = 0x01111111, },
 144         { .reg = S5P_CLKSRC_MASK_PERIL1                 , .val = 0x01110111, },
 145         { .reg = S5P_CLKSRC_MASK_DMC                    , .val = 0x00010000, },
 146 };
 147
 148 static struct sleep_save s5pv310_core_save[] = {
 149         SAVE_ITEM(S5P_CLKSRC_LEFTBUS),
 150         SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
 151         SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
 152         SAVE_ITEM(S5P_CLKOUT_CMU_LEFTBUS),
 153         SAVE_ITEM(S5P_CLKSRC_RIGHTBUS),
 154         SAVE_ITEM(S5P_CLKDIV_RIGHTBUS),
 155         SAVE_ITEM(S5P_CLKGATE_IP_RIGHTBUS),
 156         SAVE_ITEM(S5P_CLKOUT_CMU_RIGHTBUS),
 157         SAVE_ITEM(S5P_EPLL_LOCK),
 158         SAVE_ITEM(S5P_VPLL_LOCK),
 159         SAVE_ITEM(S5P_EPLL_CON0),
 160         SAVE_ITEM(S5P_EPLL_CON1),
 161         SAVE_ITEM(S5P_VPLL_CON0),
 162         SAVE_ITEM(S5P_VPLL_CON1),
 163         SAVE_ITEM(S5P_CLKSRC_TOP0),
 164         SAVE_ITEM(S5P_CLKSRC_TOP1),
 165         SAVE_ITEM(S5P_CLKSRC_CAM),
 166         SAVE_ITEM(S5P_CLKSRC_TV),
 167         SAVE_ITEM(S5P_CLKSRC_MFC),
 168         SAVE_ITEM(S5P_CLKSRC_G3D),
 169         SAVE_ITEM(S5P_CLKSRC_IMAGE),
 170         SAVE_ITEM(S5P_CLKSRC_LCD0),
 171         SAVE_ITEM(S5P_CLKSRC_LCD1),
 172         SAVE_ITEM(S5P_CLKSRC_MAUDIO),
 173         SAVE_ITEM(S5P_CLKSRC_FSYS),
 174         SAVE_ITEM(S5P_CLKSRC_PERIL0),
 175         SAVE_ITEM(S5P_CLKSRC_PERIL1),
 176         SAVE_ITEM(S5P_CLKDIV_CAM),
 177         SAVE_ITEM(S5P_CLKDIV_TV),
 178         SAVE_ITEM(S5P_CLKDIV_MFC),
 179         SAVE_ITEM(S5P_CLKDIV_G3D),
 180         SAVE_ITEM(S5P_CLKDIV_IMAGE),
 181         SAVE_ITEM(S5P_CLKDIV_LCD0),
 182         SAVE_ITEM(S5P_CLKDIV_LCD1),
 183         SAVE_ITEM(S5P_CLKDIV_MAUDIO),
 184         SAVE_ITEM(S5P_CLKDIV_FSYS0),
 185         SAVE_ITEM(S5P_CLKDIV_FSYS1),
 186         SAVE_ITEM(S5P_CLKDIV_FSYS2),
 187         SAVE_ITEM(S5P_CLKDIV_FSYS3),
 188         SAVE_ITEM(S5P_CLKDIV_PERIL0),
 189         SAVE_ITEM(S5P_CLKDIV_PERIL1),
 190         SAVE_ITEM(S5P_CLKDIV_PERIL2),
 191         SAVE_ITEM(S5P_CLKDIV_PERIL3),
 192         SAVE_ITEM(S5P_CLKDIV_PERIL4),
 193         SAVE_ITEM(S5P_CLKDIV_PERIL5),
 194         SAVE_ITEM(S5P_CLKDIV_TOP),
 195         SAVE_ITEM(S5P_CLKSRC_MASK_TOP),
 196         SAVE_ITEM(S5P_CLKSRC_MASK_CAM),
 197         SAVE_ITEM(S5P_CLKSRC_MASK_TV),
 198         SAVE_ITEM(S5P_CLKSRC_MASK_LCD0),
 199         SAVE_ITEM(S5P_CLKSRC_MASK_LCD1),
 200         SAVE_ITEM(S5P_CLKSRC_MASK_MAUDIO),
 201         SAVE_ITEM(S5P_CLKSRC_MASK_FSYS),
 202         SAVE_ITEM(S5P_CLKSRC_MASK_PERIL0),
 203         SAVE_ITEM(S5P_CLKSRC_MASK_PERIL1),
 204         SAVE_ITEM(S5P_CLKDIV2_RATIO),
 205         SAVE_ITEM(S5P_CLKGATE_IP_CAM),
 206         SAVE_ITEM(S5P_CLKGATE_IP_TV),
 207         SAVE_ITEM(S5P_CLKGATE_IP_MFC),
 208         SAVE_ITEM(S5P_CLKGATE_IP_G3D),
 209         SAVE_ITEM(S5P_CLKGATE_IP_IMAGE),
 210         SAVE_ITEM(S5P_CLKGATE_IP_LCD0),
 211         SAVE_ITEM(S5P_CLKGATE_IP_LCD1),
 212         SAVE_ITEM(S5P_CLKGATE_IP_FSYS),
 213         SAVE_ITEM(S5P_CLKGATE_IP_GPS),
 214         SAVE_ITEM(S5P_CLKGATE_IP_PERIL),
 215         SAVE_ITEM(S5P_CLKGATE_IP_PERIR),
 216         SAVE_ITEM(S5P_CLKGATE_BLOCK),
 217         SAVE_ITEM(S5P_CLKOUT_CMU_TOP),
 218         SAVE_ITEM(S5P_CLKSRC_MASK_DMC),
 219         SAVE_ITEM(S5P_CLKSRC_DMC),
 220         SAVE_ITEM(S5P_CLKDIV_DMC0),
 221         SAVE_ITEM(S5P_CLKDIV_DMC1),
 222         SAVE_ITEM(S5P_CLKGATE_IP_DMC),
 223         SAVE_ITEM(S5P_CLKOUT_CMU_DMC),
 224         SAVE_ITEM(S5P_APLL_LOCK),
 225         SAVE_ITEM(S5P_MPLL_LOCK),
 226         SAVE_ITEM(S5P_APLL_CON0),
 227         SAVE_ITEM(S5P_APLL_CON1),
 228         SAVE_ITEM(S5P_MPLL_CON0),
 229         SAVE_ITEM(S5P_MPLL_CON1),
 230         SAVE_ITEM(S5P_CLKSRC_CPU),
 231         SAVE_ITEM(S5P_CLKDIV_CPU),
 232         SAVE_ITEM((S5P_CLKDIV_CPU + 0x4)),
 233         SAVE_ITEM(S5P_CLKGATE_SCLKCPU),
 234         SAVE_ITEM(S5P_CLKGATE_IP_CPU),
 235         SAVE_ITEM(S5P_CLKOUT_CMU_CPU),
 236         /* SAVE_ITEM(S5P_PWR_CTRL), */ /* Side effect on MFC */
 237
 238         /* PMU */
 239         SAVE_ITEM(S5P_HDMI_PHY_CONTROL),
 240         SAVE_ITEM(S5P_USBOTG_PHY_CONTROL),
 241         SAVE_ITEM(S5P_USBHOST_PHY_CONTROL),
 242         SAVE_ITEM(S5P_DAC_CONTROL),
 243         SAVE_ITEM(S5P_MIPI_CONTROL0),
 244         SAVE_ITEM(S5P_MIPI_CONTROL1),
 245         SAVE_ITEM(S5P_ADC_CONTROL),
 246         SAVE_ITEM(S5P_PCIE_CONTROL),
 247         SAVE_ITEM(S5P_SATA_CONTROL),
 248         SAVE_ITEM(S5P_PMU_DEBUG),
 249         SAVE_ITEM(S5P_ARM_CORE0_CONFIGURATION),
 250         SAVE_ITEM(S5P_ARM_CORE1_CONFIGURATION),
 251         SAVE_ITEM(S5P_ARM_CPU_L2_0_CONFIGURATION),
 252         SAVE_ITEM(S5P_ARM_CPU_L2_1_CONFIGURATION),
 253         SAVE_ITEM(S5P_XUSBXTI_CONFIGURATION),
 254         SAVE_ITEM(S5P_XXTI_CONFIGURATION),
 255         SAVE_ITEM(S5P_PMU_CAM_CONF),
 256         SAVE_ITEM(S5P_PMU_TV_CONF),
 257         SAVE_ITEM(S5P_PMU_MFC_CONF),
 258         SAVE_ITEM(S5P_PMU_G3D_CONF),
 259         SAVE_ITEM(S5P_PMU_LCD0_CONF),
 260         SAVE_ITEM(S5P_PMU_LCD1_CONF),
 261         SAVE_ITEM(S5P_MAUDIO_CONFIGURATION),
 262         SAVE_ITEM(S5P_PMU_GPS_CONF),
 263
 264         /* System Controller side */
 265         SAVE_ITEM(S3C_VA_SYS + 0x0210),
 266         SAVE_ITEM(S3C_VA_SYS + 0x0214),
 267         SAVE_ITEM(S3C_VA_SYS + 0x0218),
 268         SAVE_ITEM(S3C_VA_SYS + 0x0220),
 269         SAVE_ITEM(S3C_VA_SYS + 0x0230),
 270
 271 #ifndef CONFIG_USE_EXT_GIC
 272         /* GIC side */
 273         SAVE_ITEM(S5P_VA_GIC_CPU + 0x000),
 274         SAVE_ITEM(S5P_VA_GIC_CPU + 0x004),
 275         SAVE_ITEM(S5P_VA_GIC_CPU + 0x008),
 276         SAVE_ITEM(S5P_VA_GIC_DIST + 0x000),
 277         SAVE_ITEM(S5P_VA_GIC_DIST + 0x004),
 278         SAVE_ITEM(S5P_VA_GIC_DIST + 0x100),
 279         SAVE_ITEM(S5P_VA_GIC_DIST + 0x104),
 280         SAVE_ITEM(S5P_VA_GIC_DIST + 0x108),
 281         SAVE_ITEM(S5P_VA_GIC_DIST + 0x300),
 282         SAVE_ITEM(S5P_VA_GIC_DIST + 0x304),
 283         SAVE_ITEM(S5P_VA_GIC_DIST + 0x308),
 284         SAVE_ITEM(S5P_VA_GIC_DIST + 0x400),
 285         SAVE_ITEM(S5P_VA_GIC_DIST + 0x404),
 286         SAVE_ITEM(S5P_VA_GIC_DIST + 0x408),
 287         SAVE_ITEM(S5P_VA_GIC_DIST + 0x40C),
 288         SAVE_ITEM(S5P_VA_GIC_DIST + 0x410),
 289         SAVE_ITEM(S5P_VA_GIC_DIST + 0x414),
 290         SAVE_ITEM(S5P_VA_GIC_DIST + 0x418),
 291         SAVE_ITEM(S5P_VA_GIC_DIST + 0x41C),
 292         SAVE_ITEM(S5P_VA_GIC_DIST + 0x420),
 293         SAVE_ITEM(S5P_VA_GIC_DIST + 0x424),
 294         SAVE_ITEM(S5P_VA_GIC_DIST + 0x428),
 295         SAVE_ITEM(S5P_VA_GIC_DIST + 0x42C),
 296         SAVE_ITEM(S5P_VA_GIC_DIST + 0x430),
 297         SAVE_ITEM(S5P_VA_GIC_DIST + 0x434),
 298         SAVE_ITEM(S5P_VA_GIC_DIST + 0x438),
 299         SAVE_ITEM(S5P_VA_GIC_DIST + 0x43C),
 300         SAVE_ITEM(S5P_VA_GIC_DIST + 0x440),
 301         SAVE_ITEM(S5P_VA_GIC_DIST + 0x444),
 302         SAVE_ITEM(S5P_VA_GIC_DIST + 0x448),
 303         SAVE_ITEM(S5P_VA_GIC_DIST + 0x44C),
 304         SAVE_ITEM(S5P_VA_GIC_DIST + 0x450),
 305         SAVE_ITEM(S5P_VA_GIC_DIST + 0x454),
 306         SAVE_ITEM(S5P_VA_GIC_DIST + 0x458),
 307         SAVE_ITEM(S5P_VA_GIC_DIST + 0x45C),
 308
 309         SAVE_ITEM(S5P_VA_GIC_DIST + 0x800),
 310         SAVE_ITEM(S5P_VA_GIC_DIST + 0x804),
 311         SAVE_ITEM(S5P_VA_GIC_DIST + 0x808),
 312         SAVE_ITEM(S5P_VA_GIC_DIST + 0x80C),
 313         SAVE_ITEM(S5P_VA_GIC_DIST + 0x810),
 314         SAVE_ITEM(S5P_VA_GIC_DIST + 0x814),
 315         SAVE_ITEM(S5P_VA_GIC_DIST + 0x818),
 316         SAVE_ITEM(S5P_VA_GIC_DIST + 0x81C),
 317         SAVE_ITEM(S5P_VA_GIC_DIST + 0x820),
 318         SAVE_ITEM(S5P_VA_GIC_DIST + 0x824),
 319         SAVE_ITEM(S5P_VA_GIC_DIST + 0x828),
 320         SAVE_ITEM(S5P_VA_GIC_DIST + 0x82C),
 321         SAVE_ITEM(S5P_VA_GIC_DIST + 0x830),
 322         SAVE_ITEM(S5P_VA_GIC_DIST + 0x834),
 323         SAVE_ITEM(S5P_VA_GIC_DIST + 0x838),
 324         SAVE_ITEM(S5P_VA_GIC_DIST + 0x83C),
 325         SAVE_ITEM(S5P_VA_GIC_DIST + 0x840),
 326         SAVE_ITEM(S5P_VA_GIC_DIST + 0x844),
 327         SAVE_ITEM(S5P_VA_GIC_DIST + 0x848),
 328         SAVE_ITEM(S5P_VA_GIC_DIST + 0x84C),
 329         SAVE_ITEM(S5P_VA_GIC_DIST + 0x850),
 330         SAVE_ITEM(S5P_VA_GIC_DIST + 0x854),
 331         SAVE_ITEM(S5P_VA_GIC_DIST + 0x858),
 332         SAVE_ITEM(S5P_VA_GIC_DIST + 0x85C),
 333
 334         SAVE_ITEM(S5P_VA_GIC_DIST + 0xC00),
 335         SAVE_ITEM(S5P_VA_GIC_DIST + 0xC04),
 336         SAVE_ITEM(S5P_VA_GIC_DIST + 0xC08),
 337         SAVE_ITEM(S5P_VA_GIC_DIST + 0xC0C),
 338         SAVE_ITEM(S5P_VA_GIC_DIST + 0xC10),
 339         SAVE_ITEM(S5P_VA_GIC_DIST + 0xC14),
 340
 341         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x000),
 342         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x010),
 343         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x020),
 344         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x030),
 345         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x040),
 346         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x050),
 347         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x060),
 348         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x070),
 349         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x080),
 350         SAVE_ITEM(S5P_VA_COMBINER_BASE + 0x090),
 351 #else
 352         SAVE_ITEM(S5P_VA_EXTGIC_CPU + 0x000),
 353         SAVE_ITEM(S5P_VA_EXTGIC_CPU + 0x004),
 354         SAVE_ITEM(S5P_VA_EXTGIC_CPU + 0x008),
 355         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x000),
 356         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x004),
 357         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x100),
 358         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x104),
 359         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x108),
 360         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x10C),
 361         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x110),
 362         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x300),
 363         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x304),
 364         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x308),
 365         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x30C),
 366         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x310),
 367         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x400),
 368         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x404),
 369         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x408),
 370         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x40C),
 371         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x410),
 372         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x414),
 373         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x418),
 374         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x41C),
 375         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x420),
 376         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x424),
 377         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x428),
 378         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x42C),
 379         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x430),
 380         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x434),
 381         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x438),
 382         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x43C),
 383         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x440),
 384         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x444),
 385         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x448),
 386         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x44C),
 387         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x450),
 388         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x454),
 389         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x458),
 390         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x45C),
 391         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x460),
 392         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x464),
 393         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x468),
 394         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x46C),
 395         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x470),
 396         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x474),
 397         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x478),
 398         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x47C),
 399         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x480),
 400         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x484),
 401         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x488),
 402         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x48C),
 403         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x490),
 404         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x494),
 405         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x498),
 406         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x49C),
 407         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x800),
 408         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x804),
 409         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x808),
 410         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x80C),
 411         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x810),
 412         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x814),
 413         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x818),
 414         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x81C),
 415         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x820),
 416         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x824),
 417         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x828),
 418         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x82C),
 419         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x830),
 420         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x834),
 421         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x838),
 422         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x83C),
 423         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x840),
 424         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x844),
 425         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x848),
 426         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x84C),
 427         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x850),
 428         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x854),
 429         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x858),
 430         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x85C),
 431         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x860),
 432         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x864),
 433         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x868),
 434         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x86C),
 435         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x870),
 436         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x874),
 437         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x878),
 438         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x87C),
 439         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x880),
 440         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x884),
 441         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x888),
 442         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x88C),
 443         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x890),
 444         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x894),
 445         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x898),
 446         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0x89C),
 447         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC00),
 448         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC04),
 449         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC08),
 450         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC0C),
 451         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC10),
 452         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC14),
 453         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC18),
 454         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC1C),
 455         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC20),
 456         SAVE_ITEM(S5P_VA_EXTGIC_DIST + 0xC24),
 457         SAVE_ITEM(S5P_VA_EXTCOMBINER_BASE + 0x000),
 458         SAVE_ITEM(S5P_VA_EXTCOMBINER_BASE + 0x010),
 459         SAVE_ITEM(S5P_VA_EXTCOMBINER_BASE + 0x020),
 460         SAVE_ITEM(S5P_VA_EXTCOMBINER_BASE + 0x030),
 461 #endif
 462         /* SROM side */
 463         SAVE_ITEM(S5P_SROM_BW),
 464         SAVE_ITEM(S5P_SROM_BC0),
 465         SAVE_ITEM(S5P_SROM_BC1),
 466         SAVE_ITEM(S5P_SROM_BC2),
 467         SAVE_ITEM(S5P_SROM_BC3),
 468
 469         /* PWM Register */
 470         SAVE_ITEM(S3C2410_TCFG0),
 471         SAVE_ITEM(S3C2410_TCFG1),
 472         SAVE_ITEM(S3C64XX_TINT_CSTAT),
 473         SAVE_ITEM(S3C2410_TCON),
 474         SAVE_ITEM(S3C2410_TCNTB(0)),
 475         SAVE_ITEM(S3C2410_TCMPB(0)),
 476         SAVE_ITEM(S3C2410_TCNTO(0)),
 477 };
 478
 479 #define SAVE_EXTINT(base, offset)       \
 480         SAVE_ITEM(base + offset),\
 481         SAVE_ITEM(base + offset*2 + 0x100),\
 482         SAVE_ITEM(base + offset*2 + 0x104),\
 483         SAVE_ITEM(base + offset + 0x200),\
 484         SAVE_ITEM(base + offset + 0x300),\
 485         SAVE_ITEM(base + offset + 0x414)
 486 static struct sleep_save s5pv310_EXT_INT[] = {
 487         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x0),
 488         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x4),
 489         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x8),
 490         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0xC),
 491         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x10),
 492         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x14),
 493         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x18),
 494         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x1C),
 495         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x20),
 496         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x24),
 497         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x28),
 498         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x2C),
 499         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x30),
 500         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x34),
 501         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x38),
 502         SAVE_EXTINT(S5P_VA_GPIO + 0x700, 0x3C),
 503         SAVE_ITEM(S5P_VA_GPIO + 0xB00),
 504         SAVE_ITEM(S5P_VA_GPIO + 0xB04),
 505         SAVE_ITEM(S5P_VA_GPIO + 0xB08),
 506         SAVE_ITEM(S5P_VA_GPIO + 0xB0C),
 507         SAVE_ITEM(S5P_VA_GPIO + 0xB10),
 508         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x0),
 509         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x4),
 510         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x8),
 511         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0xC),
 512         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x10),
 513         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x14),
 514         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x18),
 515         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x1C),
 516         SAVE_EXTINT(S5P_VA_GPIO2 + 0x700, 0x20),
 517         SAVE_ITEM(S5P_VA_GPIO2 + 0xB00),
 518         SAVE_ITEM(S5P_VA_GPIO2 + 0xB04),
 519         SAVE_ITEM(S5P_VA_GPIO2 + 0xB08),
 520         SAVE_ITEM(S5P_VA_GPIO2 + 0xB0C),
 521         SAVE_ITEM(S5P_VA_GPIO2 + 0xB10),
 522
 523         SAVE_ITEM(S5P_VA_GPIO2 + 0xE00),
 524         SAVE_ITEM(S5P_VA_GPIO2 + 0xE04),
 525         SAVE_ITEM(S5P_VA_GPIO2 + 0xE08),
 526         SAVE_ITEM(S5P_VA_GPIO2 + 0xE0C),
 527         SAVE_ITEM(S5P_VA_GPIO2 + 0xE80),
 528         SAVE_ITEM(S5P_VA_GPIO2 + 0xE84),
 529         SAVE_ITEM(S5P_VA_GPIO2 + 0xE88),
 530         SAVE_ITEM(S5P_VA_GPIO2 + 0xE8C),
 531         SAVE_ITEM(S5P_VA_GPIO2 + 0xE90),
 532         SAVE_ITEM(S5P_VA_GPIO2 + 0xE94),
 533         SAVE_ITEM(S5P_VA_GPIO2 + 0xE98),
 534         SAVE_ITEM(S5P_VA_GPIO2 + 0xE9C),
 535         SAVE_ITEM(S5P_VA_GPIO2 + 0xF00),
 536         SAVE_ITEM(S5P_VA_GPIO2 + 0xF04),
 537         SAVE_ITEM(S5P_VA_GPIO2 + 0xF08),
 538         SAVE_ITEM(S5P_VA_GPIO2 + 0xF0C),
 539 };
 540
 541 void s5pv310_cpu_suspend(void)
 542 {
 543         /* Turn on VPLL and EPLL */
 544         __raw_writel(__raw_readl(S5P_EPLL_CON0) | (1 << 31), S5P_EPLL_CON0);
 545         __raw_writel(__raw_readl(S5P_VPLL_CON0) | (1 << 31), S5P_VPLL_CON0);
 546
 547         /*
 548          * Before enter central sequence mode, clock src register have to set
 549          */
 550         s3c_pm_do_restore_core(s5pv310_set_clksrc, ARRAY_SIZE(s5pv310_set_clksrc));
 551
 552         /* issue the standby signal into the pm unit. */
 553         cpu_do_idle();
 554 }
 555 EXPORT_SYMBOL(s5pv310_cpu_suspend);
 556
 557 static void s5pv310_pm_prepare(void)
 558 {
 559         u32 tmp;
 560
 561         printk("sleep: irq wakeup masks: %08lx, eint mask: %08lx\n",
 562             s3c_irqwake_intmask, s3c_irqwake_eintmask);
 563         if (!(s3c_irqwake_intmask & (1 << 12)))
 564                 printk("Wakeup source: MMC3\n");
 565         if (!(s3c_irqwake_intmask & (1 << 11)))
 566                 printk("Wakeup source: MMC2\n");
 567         if (!(s3c_irqwake_intmask & (1 << 2)))
 568                 printk("Wakeup source: RTC_TICK\n");
 569         if (!(s3c_irqwake_intmask & (1 << 1)))
 570                 printk("Wakeup source: RTC_ALARM\n");
 571
 572         if (!(s3c_irqwake_eintmask & (1 << 28)))
 573                 printk("Wakeup source: T_FLASH_DETECT(28)\n");
 574         if (!(s3c_irqwake_eintmask & (1 << 24)))
 575                 printk("Wakeup source: JACK_nINT(24)\n");
 576         if (!(s3c_irqwake_eintmask & (1 << 23)))
 577                 printk("Wakeup source: nPOWER(23)\n");
 578         if (!(s3c_irqwake_eintmask & (1 << 9)))
 579                 printk("Wakeup source: IPC_HOST_WAKEUP(9)\n");
 580         if (!(s3c_irqwake_eintmask & (1 << 7)))
 581                 printk("Wakeup source: AP_PMIC_IRQ(7)\n");
 582
 583         s3c_pm_do_save(s5pv310_core_save, ARRAY_SIZE(s5pv310_core_save));
 584         s3c_pm_do_save(s5pv310_EXT_INT, ARRAY_SIZE(s5pv310_EXT_INT));
 585
 586         if (cpu_revision >= 1) {
 587                 /* EVT1 Seems to have issues with S5P_WAKEUP_MASK register. */
 588                 __raw_writel(0x0, S5P_WAKEUP_STAT);
 589                 tmp = __raw_readl(S5P_WAKEUP_MASK);
 590                 __raw_writel(0x000fffff & tmp, S5P_WAKEUP_MASK);
 591                 tmp = __raw_readl(S5P_WAKEUP_MASK);
 592                 __raw_writel((0x000fffff & tmp) | 0x80000000, S5P_WAKEUP_MASK);
 593         }
 594
 595         /* Keep power-on of XUSBXTI when voice-call */
 596         if (enable_on_suspend)
 597                 s5pv310_sleep[xusbxti_idx].val = 0x1;
 598         else
 599                 s5pv310_sleep[xusbxti_idx].val = 0x0;
 600
 601         /* Set value of power down register for sleep mode */
 602         s3c_pm_do_restore_core(s5pv310_sleep, ARRAY_SIZE(s5pv310_sleep));
 603         __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1);
 604         /* Obsolete: for the compatibility with obsolete s-boot */
 605         if (s5pv310_subrev() == 0)
 606                 __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM7);
 607
 608         if (s3c_config_sleep_gpio_table)
 609                 s3c_config_sleep_gpio_table();
 610
 611         /* ensure at least INFORM0 has the resume address */
 612         __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0);
 613 }
 614
 615 static struct clk *clk;
 616
 617 /* TODO: IROM uses "audioss" clock? ("audio-bus")? and powerdomain audio? */
 618
 619 static void s5pv310_pm_begin(void)
 620 {
 621         if (!clk) {
 622                 clk = clk_get(NULL, "chipid");
 623                 if (IS_ERR_OR_NULL(clk))
 624                         clk = NULL;
 625         }
 626         if (clk)
 627                 clk_enable(clk);
 628 }
 629
 630 #ifdef CONFIG_HIBERNATION
 631 static void s5pv310_hb_begin(void)
 632 {
 633 #ifdef CONFIG_UNIVERSAL_C210_POWEROFF_WORKAROUND
 634         if (in_suspend)
 635                 kernel_power_off();
 636 #endif
 637 }
 638 #endif
 639
 640 static void s5pv310_pm_end(void)
 641 {
 642         if (clk)
 643                 clk_disable(clk);
 644 }
 645
 646 static int s5pv310_pm_add(struct sys_device *sysdev)
 647 {
 648         pm_cpu_prep = s5pv310_pm_prepare;
 649         pm_cpu_sleep = s5pv310_cpu_suspend;
 650
 651         pm_cpu_begin = s5pv310_pm_begin;
 652         pm_cpu_end = s5pv310_pm_end;
 653
 654 #ifdef CONFIG_HIBERNATION
 655         hb_cpu_begin = s5pv310_hb_begin;
 656         hb_cpu_end = s5pv310_pm_end;
 657 #endif
 658         return 0;
 659 }
 660
 661 /*
 662  * This function copy from linux/arch/arm/kernel/smp_scu.c
 663  */
 664 void s5pv310_scu_enable(void __iomem *scu_base)
 665 {
 666         u32 scu_ctrl;
 667
 668         scu_ctrl = __raw_readl(scu_base);
 669         /* already enabled? */
 670         if (scu_ctrl & 1)
 671                 return;
 672
 673         scu_ctrl |= 1;
 674         __raw_writel(scu_ctrl, scu_base);
 675
 676         /*
 677          * Ensure that the data accessed by CPU0 before the SCU was
 678          * initialised is visible to the other CPUs.
 679          */
 680         flush_cache_all();
 681 }
 682
 683 static pm_message_t s5pv310_suspend_state;
 684 static int s5pv310_pm_suspend(struct sys_device *dev, pm_message_t state)
 685 {
 686         unsigned long tmp;
 687
 688         s5pv310_suspend_state = state;
 689
 690         if (state.event == PM_EVENT_FREEZE) {
 691                 s3c_pm_do_save(s5pv310_core_save, ARRAY_SIZE(s5pv310_core_save));
 692                 s3c_pm_do_save(s5pv310_EXT_INT, ARRAY_SIZE(s5pv310_EXT_INT));
 693         } else {
 694                 /* Setting Central Sequence Register for power down mode */
 695                 tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
 696                 tmp &= ~(S5P_CENTRAL_LOWPWR_CFG);
 697                 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 698         }
 699
 700         return 0;
 701 }
 702
 703 static int s5pv310_pm_resume_from_suspend(struct sys_device *dev)
 704 {
 705         u32 tmp, stat;
 706
 707         /* If PMU failed while entering sleep mode, WFI will be
 708          * ignored by PMU and then exiting cpu_do_idle().
 709          * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
 710          * in this situation.
 711          */
 712         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
 713         if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
 714                 tmp |= S5P_CENTRAL_LOWPWR_CFG;
 715                 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 716                 goto early_wakeup;
 717         }
 718
 719         /* For release retention */
 720         __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION);
 721         __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION);
 722         __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION);
 723         __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION);
 724         __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION);
 725         __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
 726         __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
 727
 728         s3c_pm_do_restore_core(s5pv310_core_save, ARRAY_SIZE(s5pv310_core_save));
 729         s3c_pm_do_restore_core(s5pv310_EXT_INT, ARRAY_SIZE(s5pv310_EXT_INT));
 730
 731         stat = __raw_readl(S5P_WAKEUP_STAT);
 732         printk(KERN_INFO "Wakeup Source = 0x%08x\n", stat);
 733         if (stat & S5P_WAKEUP_STAT_SYSTIMER)
 734                 printk(" System timer\n");
 735         if (stat & S5P_WAKEUP_STAT_AUDIO)
 736                 printk(" Audio\n");
 737         if (stat & S5P_WAKEUP_STAT_MMC3)
 738                 printk(" MMC3\n");
 739         if (stat & S5P_WAKEUP_STAT_MMC2)
 740                 printk(" MMC2\n");
 741         if (stat & S5P_WAKEUP_STAT_RTCTICK)
 742                 printk(" RTC TICK\n");
 743         if (stat & S5P_WAKEUP_STAT_RTCALARM)
 744                 printk(" RTC ALARM\n");
 745         if (stat & S5P_WAKEUP_STAT_EINT) {
 746                 printk(  "External INT  = 0x%02x%02x%02x%02x\n",
 747                         __raw_readl(S5P_EINT_PEND(3)),
 748                         __raw_readl(S5P_EINT_PEND(2)),
 749                         __raw_readl(S5P_EINT_PEND(1)),
 750                         __raw_readl(S5P_EINT_PEND(0)));
 751         }
 752         /* For the suspend-again to check the value */
 753         s3c_suspend_wakeup_stat = stat;
 754
 755         s5pv310_scu_enable(S5P_VA_SCU);
 756
 757         /* Depend code for UART clock gating bug */
 758         tmp = __raw_readl(S5P_CLKGATE_IP_PERIL);
 759         tmp |= 0x0f;
 760         __raw_writel(tmp, S5P_CLKGATE_IP_PERIL);
 761
 762 #ifdef CONFIG_CACHE_L2X0
 763         s5p_l2x0_cache_init();
 764 #endif
 765
 766 early_wakeup:
 767
 768         return 0;
 769 }
 770
 771 static int s5pv310_pm_resume(struct sys_device *dev)
 772 {
 773         if (s5pv310_suspend_state.event == PM_EVENT_SUSPEND)
 774                 return s5pv310_pm_resume_from_suspend(dev);
 775         else if (s5pv310_suspend_state.event == PM_EVENT_FREEZE) {
 776                 s3c_pm_do_restore_core(s5pv310_core_save, ARRAY_SIZE(s5pv310_core_save));
 777                 s3c_pm_do_restore_core(s5pv310_EXT_INT, ARRAY_SIZE(s5pv310_EXT_INT));
 778         }
 779         return 0;
 780 }
 781
 782 struct sysdev_driver s5pv310_pm_driver = {
 783         .add            = s5pv310_pm_add,
 784         .suspend        = s5pv310_pm_suspend,
 785         .resume         = s5pv310_pm_resume,
 786 };
 787
 788 extern int freeze_task_timeout;
 789 static __init int s5pv310_pm_drvinit(void)
 790 {
 791         unsigned int tmp, i;
 792
 793         /* All wakeup disable */
 794         tmp = __raw_readl(S5P_WAKEUP_MASK);
 795         tmp |= ((0xFF << 8) | (0x1F << 1));
 796         __raw_writel(tmp, S5P_WAKEUP_MASK);
 797
 798         pm_uart_udivslot = 1;
 799
 800         /* Find the index of S5P_XUSBXTI_LOWPWR in s5pv310_sleep[] */
 801         for(i = 0; i < ARRAY_SIZE(s5pv310_sleep); i++) {
 802                 if (s5pv310_sleep[i].reg == S5P_XUSBXTI_LOWPWR) {
 803                         xusbxti_idx = i;
 804                         break;
 805                 }
 806         }
 807
 808         if (freeze_task_timeout == 20) {
 809                 pr_info("PM: Changing freeze_task_timeout from the default(20) to 2.\n");
 810                 freeze_task_timeout = 2;
 811         }
 812
 813         return sysdev_driver_register(&s5pv310_sysclass, &s5pv310_pm_driver);
 814 }
 815 arch_initcall(s5pv310_pm_drvinit);