arch/arm/mach-s5pv310/irq-combiner.c

   1 /* linux/arch/arm/mach-s5pv310/irq-combiner.c
   2  *
   3  * Copyright (c) 2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * Based on arch/arm/common/gic.c
   7  *
   8  * IRQ COMBINER support
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #include <linux/io.h>
  16
  17 #include <asm/mach/irq.h>
  18
  19 #define COMBINER_ENABLE_SET     0x0
  20 #define COMBINER_ENABLE_CLEAR   0x4
  21 #define COMBINER_INT_STATUS     0xC
  22
  23 static DEFINE_SPINLOCK(irq_controller_lock);
  24
  25 struct combiner_chip_data {
  26         unsigned int irq_offset;
  27         unsigned int irq_mask;
  28         void __iomem *base;
  29 };
  30
  31 static struct combiner_chip_data combiner_data[MAX_COMBINER_NR];
  32
  33 static inline void __iomem *combiner_base(unsigned int irq)
  34 {
  35         struct combiner_chip_data *combiner_data = get_irq_chip_data(irq);
  36         return combiner_data->base;
  37 }
  38
  39 static void combiner_mask_irq(unsigned int irq)
  40 {
  41         u32 mask = 1 << (irq % 32);
  42
  43         spin_lock(&irq_controller_lock);
  44         __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_CLEAR);
  45         spin_unlock(&irq_controller_lock);
  46 }
  47
  48 static void combiner_unmask_irq(unsigned int irq)
  49 {
  50         u32 mask = 1 << (irq % 32);
  51
  52         spin_lock(&irq_controller_lock);
  53         __raw_writel(mask, combiner_base(irq) + COMBINER_ENABLE_SET);
  54         spin_unlock(&irq_controller_lock);
  55 }
  56
  57 static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
  58 {
  59         struct combiner_chip_data *chip_data = get_irq_data(irq);
  60         struct irq_chip *chip = get_irq_chip(irq);
  61         unsigned int cascade_irq, combiner_irq;
  62         unsigned long status;
  63
  64         /* primary controller ack'ing */
  65         chip->ack(irq);
  66
  67         spin_lock(&irq_controller_lock);
  68         status = __raw_readl(chip_data->base + COMBINER_INT_STATUS);
  69         spin_unlock(&irq_controller_lock);
  70         status &= chip_data->irq_mask;
  71
  72         if (status == 0)
  73                 goto out;
  74
  75         combiner_irq = __ffs(status);
  76
  77         cascade_irq = combiner_irq + (chip_data->irq_offset & ~31);
  78         if (unlikely(cascade_irq >= nr_irqs))
  79                 do_bad_IRQ(cascade_irq, desc);
  80         else
  81                 generic_handle_irq(cascade_irq);
  82
  83  out:
  84         /* primary controller unmasking */
  85         chip->unmask(irq);
  86 }
  87
  88 static struct irq_chip combiner_chip = {
  89         .name           = "COMBINER",
  90         .mask           = combiner_mask_irq,
  91         .unmask         = combiner_unmask_irq,
  92 };
  93
  94 void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq)
  95 {
  96         if (combiner_nr >= MAX_COMBINER_NR)
  97                 BUG();
  98         if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0)
  99                 BUG();
 100         set_irq_chained_handler(irq, combiner_handle_cascade_irq);
 101 }
 102
 103 void __init combiner_init(unsigned int combiner_nr, void __iomem *base,
 104                           unsigned int irq_start)
 105 {
 106         unsigned int i;
 107
 108         if (combiner_nr >= MAX_COMBINER_NR)
 109                 BUG();
 110
 111         combiner_data[combiner_nr].base = base;
 112         combiner_data[combiner_nr].irq_offset = irq_start;
 113         combiner_data[combiner_nr].irq_mask = 0xff << ((combiner_nr % 4) << 3);
 114
 115         /* Disable all interrupts */
 116         __raw_writel(combiner_data[combiner_nr].irq_mask,
 117                      base + COMBINER_ENABLE_CLEAR);
 118
 119         /* Setup the Linux IRQ subsystem */
 120
 121         for (i = irq_start; i < combiner_data[combiner_nr].irq_offset
 122                                 + MAX_IRQ_IN_COMBINER; i++) {
 123                 set_irq_chip(i, &combiner_chip);
 124                 set_irq_chip_data(i, &combiner_data[combiner_nr]);
 125                 set_irq_handler(i, handle_level_irq);
 126                 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 127         }
 128 }