2 * Copyright (C) 2011 Samsung Electronics
5 #include <linux/kernel.h>
6 #include <linux/module.h>
7 #include <linux/init.h>
10 #include <mach/gpio.h>
14 #include <plat/gpio-cfg.h>
16 #include "gpio-mobile.h"
20 * Please describe the how to setup the pins.
21 * E.g., what's the correct setings for I2C, PULL_UP or PULL_NONE?
31 /* UART 0 for BT & 1 for GPS */
32 static const struct s5p_gpio_group group_a0[] __initdata = {
33 /* XuRXD[0] BT_UART_RXD */
34 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
35 /* XuTXD[0] BT_UART_TXD */
36 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
37 /* XuCTSn[0] BT_UART_CTS */
38 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
39 /* XuRTSn[0] BT_UART_RTS */
40 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
41 /* XuRXD[1] GPS_UART_RXD */
42 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
43 /* XuTXD[1] GPS_UART_TXD */
44 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
45 /* XuCTSn[1] GPS_UART_N_CTS */
46 PIN(6, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
47 /* XuRTSn[1] GPS_UART_N_RTS */
48 PIN(7, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
51 /* UART 2 for debug & 3 for CP */
52 static const struct s5p_gpio_group group_a1[] __initdata = {
54 PIN(0, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
56 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
57 /* Xi2c2SDA TSP_SDA_2.8V (I2C3: TSP) PU by VTOUCH_VDD2.8V */
58 PIN(2, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
59 /* Xi2c2SCL TSP_SCL_2.8V (I2C3: TSP) PU by VTOUCH_VDD2.8V */
60 PIN(3, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
61 /* XuRXD[3] AP_FLM_RXD_2.8V */
62 PIN(4, SFN(0x2), NONE, NOP, DRV1X, INPUT, PULLDOWN),
63 /* XuTXD[3] AP_FLM_TXD_2.8V */
64 PIN(5, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
67 static const struct s5p_gpio_group group_b[] __initdata = {
68 /* XspiCLK[0] FM_RST */
69 PIN(0, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
72 /* XspiMISO[0] FM_SDA_2.8V */
73 PIN(2, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
74 /* XspiMOSI[0] FM_SCL_2.8V */
75 PIN(3, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
76 /* XspiCLK[1] WLAN_WAKE (NC) */
80 /* XspiMISO[1] AP_PMIC_SDA (PU by VCC_2.8V_PDA */
81 PIN(6, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
82 /* XspiMOSI[1] AP_PMIC_SCL (PU by VCC_2.8V_PDA */
83 PIN(7, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
86 static const struct s5p_gpio_group group_c0[] __initdata = {
87 /* XIIS1SCLK REC_PCM_CLK */
88 PIN(0, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
91 /* XIIS1LRCK REC_PCM_SYNC */
92 PIN(2, SFN(0x2), NONE, XXXXXX, DRV1X, OUTPUT0, NOP),
93 /* XIIS1SDI REC_PCM_IN */
94 PIN(3, SFN(0x2), NONE, NOP, DRV1X, INPUT, PULLDOWN),
95 /* XIIS1SDO REC_PCM_OUT */
96 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
99 static const struct s5p_gpio_group group_c1[] __initdata = {
100 /* Xpcm2SCLk VT_SDA_1.8V */
101 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
102 /* Xpcm2EXTCLK CP_ON: Inefficient? */
103 PIN(1, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
104 /* Xpcm2FSYNC VT_SCL_1.8V */
105 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
106 /* Xpcm2SIN CODEC_SDA_1.8V PU by VCC_1.8V_PDA */
107 PIN(3, SFN(0x4), NONE, NOP, DRV1X, INPUT, NOP),
108 /* Xpcm2SOUT CODEC_SCL_1.8V PU by VCC_1.8V_PDA */
109 PIN(4, SFN(0x4), NONE, NOP, DRV1X, INPUT, NOP),
112 static const struct s5p_gpio_group group_d0[] __initdata = {
115 /* XpwmTOUT[1] VIBTONE_PWM */
116 PIN(1, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
117 /* XpwmTOUT[2] MSENSOR_SDA_2.8V = MHL_SDA_2.8V PU by VCC_2.8V_PDA */
118 PIN(2, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
119 /* XpwmTOUT[3] MSENSOR_SCL_2.8V = MHL_SCL_2.8V PU by VCC_2.8V_PDA */
120 PIN(3, SFN(0x3), NONE, NOP, DRV1X, INPUT, NOP),
123 static const struct s5p_gpio_group group_d1[] __initdata = {
124 /* Xi2c0SDA MEMA_CAM_SDA_2.8V PU by VCC_2.8V_PDA */
125 PIN(0, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
126 /* Xi2c0SCL MEGA_CAM_SCL_2.8V PU by VCC_2.8V_PDA */
127 PIN(1, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
128 /* Xi2c1SDA SENSE_SDA_2.8V PU by VCC_2.8V_PDA */
129 PIN(2, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
130 /* Xi2c1SCL SENSE_SCL_2.8V PU by VCC_2.8V_PDA */
131 PIN(3, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
134 static const struct s5p_gpio_group group_e0[] __initdata = {
135 /* XmdmWEn PEN_IRQ_2.8V */
136 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
139 /* XmdmRn PEN_RESET_N_2.8V */
140 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
141 /* XmdmIRQn GPS_EN */
142 PIN(3, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
143 /* XmdmADVN GPS_nRST */
144 PIN(4, SFN(0x1), NONE, NOP, DRV1X, OUTPUT0, NOP),
147 static const struct s5p_gpio_group group_e1[] __initdata = {
148 /* XmdmADDR[0] HW_REV0 PU by VCC_1.8V_PDA */
149 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
150 /* XmdmADDR[1] HW_REV1 PU by VCC_1.8V_PDA */
151 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
152 /* XmdmADDR[2] HW_REV2 PU by VCC_1.8V_PDA */
153 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
154 /* XmdmADDR[3] HW_REV3 PU by VCC_1.8V_PDA */
155 PIN(3, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
156 /* XmdmADDR[4] MIC_BIAS_EN */
157 PIN(4, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
158 /* XmdmADDR[5] BARO_INT1 */
159 PIN(5, SFN(0x0), LOW, NOP, DRV1X, KEEP, NOP),
160 /* XmdmADDR[6] PEN_PDCT_2.8V */
161 PIN(6, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
162 /* XmdmADDR[7] PEN_PDN_2.8V */
163 PIN(7, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
166 static const struct s5p_gpio_group group_e2[] __initdata = {
167 /* XmdmADDR[8] SUB_MICBIAS_EN */
168 PIN(0, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
169 /* XmdmADDR[9] CAM_IO_EN */
170 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
171 /* XmdmADDR[10] VT_CAM_1.5V_EN */
172 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
173 /* XmdmADDR[11] BARO_INT2 */
174 PIN(3, SFN(0x0), LOW, NOP, DRV1X, KEEP, NOP),
175 /* XmdmADDR[12] EAR_MICBIAS_EN */
176 PIN(4, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
177 /* XmdmADDR[13] 8M_1.2V_EN */
178 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
181 static const struct s5p_gpio_group group_e3[] __initdata = {
200 static const struct s5p_gpio_group group_e4[] __initdata = {
205 /* XmdmDATA[10] NC */
207 /* XmdmDATA[11] NC */
209 /* XmdmDATA[12] NC */
211 /* XmdmDATA[13] NC */
213 /* XmdmDATA[14] NC */
215 /* XmdmDATA[15] NC */
220 static const struct s5p_gpio_group group_f0[] __initdata = {
239 static const struct s5p_gpio_group group_f1[] __initdata = {
258 static const struct s5p_gpio_group group_f2[] __initdata = {
277 static const struct s5p_gpio_group group_f3[] __initdata = {
286 /* XvVSYNC_LDI MHL_RST */
287 PIN(4, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
288 /* XvSYS_OE MHL_INT PD by Ground*/
289 PIN(5, SFN(0xF), NONE, NOP, DRV1X, INPUT, NOP),
293 static const struct s5p_gpio_group group_j0[] __initdata = {
312 static const struct s5p_gpio_group group_j1[] __initdata = {
319 /* XciCLKenb CAM_MCLK */
320 PIN(3, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
321 /* XciFIELD MHL_WAKE_UP */
322 PIN(4, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
325 static const struct s5p_gpio_group group_k0[] __initdata = {
326 /* Xmmc0CLK HSMMC_CLK */
327 PIN(0, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
328 /* Xmmc0CMD HSMMC_CMD */
329 PIN(1, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
330 /* Xmmc0CDn eMMC_EN */
331 PIN(2, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
332 /* Xmmc0DATA[0] HSMMC_D(0) */
333 PIN(3, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
334 /* Xmmc0DATA[1] HSMMC_D(1) */
335 PIN(4, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
336 /* Xmmc0DATA[2] HSMMC_D(2) */
337 PIN(5, SFN(0x2),NONE, PULLUP, DRV4X, INPUT, NOP),
338 /* Xmmc0DATA[3] HSMMC_D(3) */
339 PIN(6, SFN(0x2), NONE, PULLUP, DRV4X, INPUT, NOP),
342 static const struct s5p_gpio_group group_k1[] __initdata = {
343 /* Xmmc1CLK 3_TOUCH_SCL_2.8V */
344 PIN(0, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
345 /* Xmmc1CMD CAM_AF_EN */
346 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
347 /* Xmmc1CDn 3_TOUCH_SDA_2.8V */
348 PIN(2, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
349 /* Xmmc1DATA[0] HSMMC_D(4) */
350 PIN(3, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
351 /* Xmmc1DATA[1] HSMMC_D(5) */
352 PIN(4, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
353 /* Xmmc1DATA[2] HSMMC_D(6) */
354 PIN(5, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
355 /* Xmmc1DATA[3] HSMMC_D(7) */
356 PIN(6, SFN(0x3), NONE, PULLUP, DRV4X, INPUT, NOP),
359 static const struct s5p_gpio_group group_k2[] __initdata = {
360 /* Xmmc2CLK T_FLASH_CLK */
361 PIN(0, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
362 /* Xmmc2CMD T_FLASH_CMD PU by VTF_2.8V */
363 PIN(1, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
364 /* Xmmc2CDn PS_ALS_SDA_2.8V */
365 PIN(2, SFN(0x2), NONE, NOP, DRV1X, INPUT, NOP),
366 /* Xmmc2DATA[0] T_FLASH_D(0) */
367 PIN(3, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
368 /* Xmmc2DATA[1] T_FLASH_D(1) */
369 PIN(4, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
370 /* Xmmc2DATA[2] T_FLASH_D(2) */
371 PIN(5, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
372 /* Xmmc2DATA[3] T_FLASH_D(3) */
373 PIN(6, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
376 static const struct s5p_gpio_group group_k3[] __initdata = {
377 /* Xmmc3CLK WLAN_SDIO_CLK */
378 PIN(0, SFN(0x2), NONE, NOP, DRV4X, OUTPUT0, NOP),
379 /* Xmmc3CMD WLAN_SDIO_CMD PU by VCC_2.8V_PDA */
380 PIN(1, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
381 /* Xmmc3CDn PS_ALS_SCL_2.8V */
382 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
383 /* Xmmc3DATA[0] WLAN_SDIO_D(0) */
384 PIN(3, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
385 /* Xmmc3DATA[1] WLAN_SDIO_D(1) */
386 PIN(4, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
387 /* Xmmc3DATA[2] WLAN_SDIO_D(2) */
388 PIN(5, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
389 /* Xmmc3DATA[3] WLAN_SDIO_D(3) */
390 PIN(6, SFN(0x2), NONE, NOP, DRV4X, INPUT, NOP),
393 static const struct s5p_gpio_group group_l0[] __initdata = {
394 /* XGNSS_SYNC BUCK2_EN: MAX8997 SET3 */
395 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
396 /* XGNSS_ISIGN MHL_SEL: LOW->USB, HIGH->MHL*/
397 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
400 /* XGNSS_QSIGN TSP_LDO_ON */
401 PIN(3, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
402 /* XGNSS_QMAG BT_EN */
403 PIN(4, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
404 /* XGNSS_MCLK 3_TOUCH_INT */
405 PIN(5, SFN(0xf), NONE, NOP, DRV1X, INPUT, NOP),
406 /* XGNSS_RF_RSTN USB_SEL */
407 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
408 /* XGNSS_CLKREQ OLED_DET */
409 PIN(7, SFN(0x0), NONE, PULLDOWN, DRV1X, OUTPUT0, NOP),
412 static const struct s5p_gpio_group group_l1[] __initdata = {
413 /* XGNSS_SCL BT_nRST */
414 PIN(0, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
415 /* XGNSS_SDA HDMI_EN */
416 PIN(1, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
417 /* XGNSS_EPOCH WLAN_EN */
418 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
421 static const struct s5p_gpio_group group_l2[] __initdata = {
422 /* XGNSS_GPIO_0 CAM_VT_nSTBY */
423 PIN(0, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
424 /* XGNSS_GPIO_1 CAM_VT_nRST */
425 PIN(1, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
426 /* XGNSS_GPIO_2 CHG_EN */
427 PIN(2, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
428 /* XGNSS_GPIO_3 DOUBLE_RR */
429 PIN(3, SFN(0x0), NONE, NOP, DRV1X, OUTPUT0, NOP),
430 /* XGNSS_GPIO_4 MOTOR_EN */
431 PIN(4, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
432 /* XGNSS_GPIO_5 TA_nCONNECTED */
433 PIN(5, SFN(0x0), NONE, NOP, DRV1X, OUTPUT0, NOP),
434 /* XGNSS_GPIO_6 NFC_EN */
435 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
436 /* XGNSS_GPIO_7 NFC_FIRMWARE */
437 PIN(7, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
441 static const struct s5p_gpio_group group_x0[] = {
442 /* XEINT[0] GYRO_INT */
443 EXTPIN(0, SFN(0x0), NONE, PULLDOWN, DRV1X),
444 /* XEINT[1] GYRO_FIFO_INT */
445 EXTPIN(1, SFN(0x0), NONE, PULLDOWN, DRV1X),
446 /* XEINT[2] PS_ALS_INT */
447 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
448 /* XEINT[3] BOOT_MODE */
449 EXTPIN(3, SFN(0x0), NONE, NOP, DRV1X),
450 /* XEINT[4] TSP_INT */
451 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X),
452 /* XEINT[5] BUCK1_EN_A */
453 EXTPIN(5, SFN(0x1), LOW, NOP, DRV1X),
454 /* XEINT[6] BUCK1_EN_B */
455 EXTPIN(6, SFN(0x1), LOW, NOP, DRV1X),
456 /* XEINT[7] AP_PMIC_IRQ PU by VCC_2.8V_PDA */
457 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X),
461 static const struct s5p_gpio_group group_x1[] = {
462 /* XEINT[8] IPC_SLAVE_WAKEUP */
463 EXTPIN(0, SFN(0x1), LOW, NOP, DRV1X),
464 /* XEINT[9] IPC_HOST_WAKEUP */
465 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X),
466 /* XEINT[10] CP_DUMP_INT : Don't know how to set up? */
467 EXTPIN(2, SFN(0x0), NONE, NOP, DRV1X),
468 /* XEINT[11] SUSPEND_REQUEST_HSIC */
469 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X),
470 /* XEINT[12] CP_PMU_RST */
471 EXTPIN(4, SFN(0x0), NONE, NOP, DRV1X),
472 /* XEINT[13] ISP_INT */
473 EXTPIN(5, SFN(0xf), NONE, NOP, DRV1X),
474 /* XEINT[14] PHONE_ACTIVE */
475 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
476 /* XEINT[15] NFC_IRQ */
477 EXTPIN(7, SFN(0x0), NONE, NOP, DRV1X),
481 static const struct s5p_gpio_group group_x2[] = {
482 /* XEINT[16] VOL_UP (VCC_2.8V_PDA) */
483 EXTPIN(0, SFN(0xf), NONE, NOP, DRV1X),
484 /* XEINT[17] VOL_DOWN (VCC_2.8V_PDA) */
485 EXTPIN(1, SFN(0xf), NONE, NOP, DRV1X),
486 /* XEINT[18] MSENSOR_INT */
487 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
488 /* XEINT[19] FUEL_ALERT */
489 EXTPIN(3, SFN(0xf), NONE, NOP, DRV1X),
490 /* XEINT[20] FM_INT */
491 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X),
492 /* XEINT[21] WLAN_HOST_WAKE */
493 EXTPIN(5, SFN(0xf), NONE, PULLDOWN, DRV1X),
494 /* XEINT[22] BT_HOST_WAKE */
495 EXTPIN(6, SFN(0xf), NONE, PULLDOWN, DRV1X),
496 /* XEINT[23] nPOWER */
497 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X),
501 static const struct s5p_gpio_group group_x3[] = {
502 /* XEINT[24] ACC_INT */
503 EXTPIN(0, SFN(0xf), NONE, PULLDOWN, DRV1X),
504 /* XEINT[25] BT_WAKE */
505 EXTPIN(1, SFN(0x1), LOW, NOP, DRV1X),
506 /* XEINT[26] DET_3.5 */
507 EXTPIN(2, SFN(0xf), NONE, NOP, DRV1X),
508 /* XEINT[27] USB_OTG_EN */
509 EXTPIN(3, SFN(0x1), LOW, NOP, DRV1X),
510 /* XEINT[28] T_FLASH_DETECT */
511 EXTPIN(4, SFN(0xf), NONE, NOP, DRV1X),
512 /* XEINT[29] OK_KEY (VCC_2.8V_PDA) */
513 EXTPIN(5, SFN(0xf), NONE, NOP, DRV1X),
514 /* XEINT[30] EAR_SEND_END */
515 EXTPIN(6, SFN(0xf), NONE, NOP, DRV1X),
516 /* XEINT[31] HDMI_HPD */
517 EXTPIN(7, SFN(0xf), NONE, NOP, DRV1X),
520 static const struct s5p_gpio_group group_y0[] __initdata = {
521 /* Xm0CSn[0] NFC_I2C_SCL */
522 PIN(0, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
523 /* Xm0CSn[1] NFC_I2C_SDA */
524 PIN(1, SKIP_SFN, NONE, XXXXXX, DRV1X, INPUT, PULLDOWN),
529 /* Xm0OEn CHARGER_SDA_1.8V */
530 PIN(4, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
531 /* Xm0WEn CHARGER_SCL_1.8V */
532 PIN(5, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
535 static const struct s5p_gpio_group group_y1[] __initdata = {
546 static const struct s5p_gpio_group group_y2[] __initdata = {
561 static const struct s5p_gpio_group group_y3[] __initdata = {
562 /* Xm0ADDR[0] MHL_SDA_1.8V */
563 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
566 /* Xm0ADDR[2] MHL_SCL_1.8V */
567 PIN(2, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
570 /* Xm0ADDR[4] OLED_ID */
571 PIN(4, SFN(0x0), NONE, NOP, DRV1X, INPUT, PULLDOWN),
572 /* Xm0ADDR[5] ACTIVE_STATE_HSIC */
573 PIN(5, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
574 /* Xm0ADDR[6] GPS_CNTL */
575 PIN(6, SFN(0x1), LOW, NOP, DRV1X, OUTPUT0, NOP),
576 /* Xm0ADDR[7] ISP_RESET (active low) */
577 PIN(7, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
580 static const struct s5p_gpio_group group_y4[] __initdata = {
581 /* Xm0ADDR[8] FUEL_SDA_1.8V PU by VCC_1.8V_PDA */
582 PIN(0, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
583 /* Xm0ADDR[9] FUAL_SCL_1.8V PU by VCC_1.8V_PDA */
584 PIN(1, SFN(0x0), NONE, NOP, DRV1X, INPUT, NOP),
585 /* Xm0ADDR[10] PDA_ACTIVE */
586 PIN(2, SFN(0x1), HIGH, NOP, DRV1X, OUTPUT0, NOP),
591 /* Xm0ADDR[13] MLCD_RST */
592 PIN(5, SFN(0x1), HIGH, PULLUP, DRV1X, OUTPUT0, NOP),
593 /* Xm0ADDR[14] RESET_REQ_N */
594 PIN(6, SFN(0x1), LOW, NOP, DRV1X, KEEP, NOP),
595 /* Xm0ADDR[15] UART_SEL */
596 PIN(7, SKIP_SFN, NONE, NOP, DRV1X, KEEP, NOP),
600 static const struct s5p_gpio_group group_y5[] __initdata = {
619 static const struct s5p_gpio_group group_y6[] __initdata = {
638 static const struct s5p_gpio_group group_z[] __initdata = {
639 /* Xi2s0SCLK MM_I2S_CLK */
640 PIN(0, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
643 /* Xi2s0LRCK MM_I2S_SYNC */
644 PIN(2, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
645 /* Xi2s0SDI MM_I2S_DI */
646 PIN(3, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
647 /* Xi2s0SDO[0] MM_I2S_DO */
648 PIN(4, SFN(0x2), NONE, NOP, DRV1X, OUTPUT0, NOP),
655 /* Note: It contains the latest borad revision configuration */
656 static struct s5p_gpio_group_info q1_gpios[] __refdata = {
658 GPIO_(GROUP_A0, S5P_VA_GPIO, 0x000, group_a0),
659 GPIO_(GROUP_A1, S5P_VA_GPIO, 0x020, group_a1),
660 GPIO_(GROUP_B, S5P_VA_GPIO, 0x040, group_b),
661 GPIO_(GROUP_C0, S5P_VA_GPIO, 0x060, group_c0),
662 GPIO_(GROUP_C1, S5P_VA_GPIO, 0x080, group_c1),
663 GPIO_(GROUP_D0, S5P_VA_GPIO, 0x0A0, group_d0),
664 GPIO_(GROUP_D1, S5P_VA_GPIO, 0x0C0, group_d1),
665 GPIO_(GROUP_E0, S5P_VA_GPIO, 0x0E0, group_e0),
666 GPIO_(GROUP_E1, S5P_VA_GPIO, 0x100, group_e1),
667 GPIO_(GROUP_E2, S5P_VA_GPIO, 0x120, group_e2),
668 GPIO_(GROUP_E3, S5P_VA_GPIO, 0x140, group_e3),
669 GPIO_(GROUP_E4, S5P_VA_GPIO, 0x160, group_e4),
670 GPIO_(GROUP_F0, S5P_VA_GPIO, 0x180, group_f0),
671 GPIO_(GROUP_F1, S5P_VA_GPIO, 0x1A0, group_f1),
672 GPIO_(GROUP_F2, S5P_VA_GPIO, 0x1C0, group_f2),
673 GPIO_(GROUP_F3, S5P_VA_GPIO, 0x1E0, group_f3),
675 GPIO_(GROUP_J0, S5P_VA_GPIO2, 0x000, group_j0),
676 GPIO_(GROUP_J1, S5P_VA_GPIO2, 0x020, group_j1),
677 GPIO_(GROUP_K0, S5P_VA_GPIO2, 0x040, group_k0),
678 GPIO_(GROUP_K1, S5P_VA_GPIO2, 0x060, group_k1),
679 GPIO_(GROUP_K2, S5P_VA_GPIO2, 0x080, group_k2),
680 GPIO_(GROUP_K3, S5P_VA_GPIO2, 0x0A0, group_k3),
681 GPIO_(GROUP_L0, S5P_VA_GPIO2, 0x0C0, group_l0),
682 GPIO_(GROUP_L1, S5P_VA_GPIO2, 0x0E0, group_l1),
683 GPIO_(GROUP_L2, S5P_VA_GPIO2, 0x100, group_l2),
684 GPIO_(GROUP_Y0, S5P_VA_GPIO2, 0x120, group_y0),
685 GPIO_(GROUP_Y1, S5P_VA_GPIO2, 0x140, group_y1),
686 GPIO_(GROUP_Y2, S5P_VA_GPIO2, 0x160, group_y2),
687 GPIO_(GROUP_Y3, S5P_VA_GPIO2, 0x180, group_y3),
688 GPIO_(GROUP_Y4, S5P_VA_GPIO2, 0x1A0, group_y4),
689 GPIO_(GROUP_Y5, S5P_VA_GPIO2, 0x1C0, group_y5),
690 GPIO_(GROUP_Y6, S5P_VA_GPIO2, 0x1E0, group_y6),
691 /* External GPIOs & Alive block */
692 GPIO_(GROUP_X0, S5P_VA_GPIO2, 0xC00, group_x0),
693 GPIO_(GROUP_X1, S5P_VA_GPIO2, 0xC20, group_x1),
694 GPIO_(GROUP_X2, S5P_VA_GPIO2, 0xC40, group_x2),
695 GPIO_(GROUP_X3, S5P_VA_GPIO2, 0xC60, group_x3),
697 GPIO_(GROUP_Z, S5P_VA_GPIO3, 0x000, group_z),
700 static int mobile_gpios[] = {
701 [GPIO_MICBIAS_EN] = S5PV310_GPE1(4),
702 [GPIO_SUB_MICBIAS_EN] = S5PV310_GPE2(0),
703 [GPIO_EAR_MICBIAS_EN] = S5PV310_GPE2(4),
704 [GPIO_nPOWER] = S5PV310_GPX2(7),
705 [GPIO_DET_3_5] = S5PV310_GPX3(2),
706 [GPIO_T_FLASH_DETECT] = S5PV310_GPX3(4),
707 [GPIO_EAR_SEND_END] = S5PV310_GPX3(6),
708 [GPIO_CP_ON] = S5PV310_GPC1(1),
709 [GPIO_IPC_SLAVE_WAKEUP] = S5PV310_GPX1(0),
710 [GPIO_IPC_HOST_WAKEUP] = S5PV310_GPX1(1),
711 [GPIO_CP_DUMP_INT] = S5PV310_GPX1(2),
712 [GPIO_SUSPEND_REQUEST_HSIC] = S5PV310_GPX1(3),
713 [GPIO_CP_PMU_RST] = S5PV310_GPX1(4),
714 [GPIO_PHONE_ACTIVE] = S5PV310_GPX1(6),
715 [GPIO_ACTIVE_STATE_HSIC] = S5PV310_GPY3(5),
716 [GPIO_PDA_ACTIVE] = S5PV310_GPY4(2),
717 [GPIO_RESET_REQ_N] = S5PV310_GPY4(6),
718 [GPIO_USB_OTG_EN] = S5PV310_GPX3(3),
719 [GPIO_MHL_SEL] = S5PV310_GPL0(1),
720 [GPIO_UART_SEL] = S5PV310_GPY4(7),
721 [GPIO_USB_SEL] = S5PV310_GPL0(6),
722 [GPIO_PS_ALS_INT] = S5PV310_GPX0(2),
723 #if defined(CONFIG_CHARGERCTRL_MAX8922)
724 [GPIO_CHG_EN] = S5PV310_GPL2(2),
725 [GPIO_TA_nCONNECTED] = S5PV310_GPL2(5),
729 struct mobile_gpios_data q1_data;
731 void __init mobile_gpios_init_q1(void)
733 int hwrev = system_rev & 0xFF;
735 printk("Mobile GPIOs init - HW Rev %d\n", hwrev);
737 q1_data.infos = q1_gpios;
738 q1_data.x0 = (struct s5p_gpio_group *)group_x0;
739 q1_data.x1 = (struct s5p_gpio_group *)group_x1;
740 q1_data.x2 = (struct s5p_gpio_group *)group_x2;
741 q1_data.x3 = (struct s5p_gpio_group *)group_x3;
742 q1_data.gpios = mobile_gpios;
744 q1_data.infos_size = ARRAY_SIZE(q1_gpios);
745 q1_data.x0_size = ARRAY_SIZE(group_x0);
746 q1_data.x1_size = ARRAY_SIZE(group_x1);
747 q1_data.x2_size = ARRAY_SIZE(group_x2);
748 q1_data.x3_size = ARRAY_SIZE(group_x3);
749 q1_data.gpios_size = ARRAY_SIZE(mobile_gpios);
751 mobile_gpios_register(&q1_data);