1 /* linux/arch/arm/mach-s5pv310/dev-tv.c
3 * Copyright 20i10 Samsung Electronics
4 * Tomasz Stanislawski <t.stanislaws@samsung.com>
6 * S5P series device definition for TV device
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
15 #include <mach/gpio.h>
16 #include <plat/gpio-cfg.h>
17 #include <mach/regs-clock.h>
19 #include <linux/kernel.h>
20 #include <linux/string.h>
21 #include <linux/platform_device.h>
23 #include <linux/gfp.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/clk.h>
26 #include <linux/regulator/consumer.h>
27 #include <linux/delay.h>
29 #include <mach/irqs.h>
32 #include <plat/devs.h>
36 #define S5P_TV_CONFIGURATION S5P_PMREG(0x03C20)
37 #define S5P_TV_STATUS S5P_PMREG(0x03C24)
38 #define S5P_TV_SYS_PWR S5P_PMREG(0x1384)
39 #define S5P_CMU_CLKSTOP_TV_SYS_PWR S5P_PMREG(0x1144)
40 #define S5P_CMU_RESET_TV_SYS_PWR S5P_PMREG(0x1164)
42 #define S5P_HDMI_PHY_CONTROL S5P_PMREG(0x0700)
43 #define S5P_CLKOUT_CMU_TOP S5P_CLKREG(0x0CA00)
45 /* macro for setting registeres */
46 #define SETREG(name, value, mask) \
48 u32 reg = readl(name); \
53 printk(KERN_DEBUG #name " <- %08x\n", reg); \
56 /* macro for debugging registeres */
57 #define DBGREG(name) \
59 u32 reg = readl(name); \
60 printk(KERN_DEBUG #name " <- %08x\n", reg); \
63 static void dbg_plat_regs(void);
65 /* very simpler tv-power-domain support */
66 static int tv_power_cnt;
68 static void tv_power_get(void)
70 if (++tv_power_cnt == 1) {
72 printk(KERN_ERR "TV power domain on - start\n");
74 SETREG(S5P_CLKGATE_BLOCK, 0x02, 0x02); /* keep here */
75 SETREG(S5P_CMU_CLKSTOP_TV_SYS_PWR, 1, 1);
76 SETREG(S5P_CMU_RESET_TV_SYS_PWR, 1, 1);
77 SETREG(S5P_TV_SYS_PWR, 7, 7);
78 /* power domain on sequence */
79 SETREG(S5P_TV_CONFIGURATION, 7, 7);
80 for (tries = 1000; tries; mdelay(1), tries--)
81 if ((readl(S5P_TV_STATUS) & 7) == 7)
83 WARN(tries == 0, "failed to turn TV power domain on\n");
84 printk(KERN_ERR "TV power domain on - finish\n");
89 static void tv_power_put(void)
91 if (--tv_power_cnt == 0) {
93 printk(KERN_ERR "TV power domain off - start\n");
95 SETREG(S5P_TV_CONFIGURATION, 0, 7);
96 for (tries = 1000; tries; mdelay(1), tries--)
97 if ((readl(S5P_TV_STATUS) & 7) == 0)
99 WARN(tries == 0, "failed to turn TV power domain off\n");
100 SETREG(S5P_TV_SYS_PWR, 0, 7);
101 SETREG(S5P_CMU_RESET_TV_SYS_PWR, 0, 1);
102 SETREG(S5P_CMU_CLKSTOP_TV_SYS_PWR, 0, 1);
103 SETREG(S5P_CLKGATE_BLOCK, 0x00, 0x02); /* keep here */
104 printk(KERN_ERR "TV power domain off - finish\n");
110 static struct resource s5p_hdmi_resources[] = {
112 .start = S5P_PA_HDMI,
113 .end = S5P_PA_HDMI + S5P_SZ_HDMI - 1,
114 .flags = IORESOURCE_MEM,
119 .flags = IORESOURCE_IRQ,
123 static struct hdmi_platform_data hdmi_pdata;
125 struct platform_device s5p_device_hdmi = {
128 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
129 .resource = s5p_hdmi_resources,
130 .dev.platform_data = &hdmi_pdata,
132 EXPORT_SYMBOL(s5p_device_hdmi);
134 static struct hdmi_plat_resource {
136 struct clk *sclk_hdmi;
137 struct clk *sclk_pixel;
138 struct clk *sclk_hdmiphy;
139 struct regulator *ldo1;
140 } hdmi_plat_resource;
142 static void hdmi_deinit(struct device *dev);
144 static int hdmi_init(struct device *dev)
146 struct hdmi_plat_resource *res = &hdmi_plat_resource;
147 dev_info(dev, "platform HDMI Init\n");
148 memset(res, 0, sizeof *res);
149 /* get clocks, power, and GPIOs */
150 gpio_request(S5PV310_GPX3(7), "hpd-plug");
151 gpio_request(S5PV310_GPL1(1), "hdmi-en");
153 /* direct HPD to HDMI chip */
154 gpio_direction_input(S5PV310_GPX3(7));
155 s3c_gpio_cfgpin(S5PV310_GPX3(7), S3C_GPIO_SFN(0x3));
156 s3c_gpio_setpull(S5PV310_GPX3(7), S3C_GPIO_PULL_NONE);
158 /* move this names somewhere */
159 res->hdmi = clk_get(dev, "hdmi");
160 if (IS_ERR_OR_NULL(res->hdmi)) {
161 dev_err(dev, "failed to get clock 'hdmi'\n");
164 res->sclk_hdmi = clk_get(dev, "sclk_hdmi");
165 if (IS_ERR_OR_NULL(res->sclk_hdmi)) {
166 dev_err(dev, "failed to get clock 'sclk_hdmi'\n");
169 res->sclk_pixel = clk_get(dev, "sclk_pixel");
170 if (IS_ERR_OR_NULL(res->sclk_pixel)) {
171 dev_err(dev, "failed to get clock 'sclk_pixel'\n");
174 res->sclk_hdmiphy = clk_get(dev, "sclk_hdmiphy");
175 if (IS_ERR_OR_NULL(res->sclk_hdmiphy)) {
176 dev_err(dev, "failed to get clock 'sclk_hdmiphy'\n");
179 res->ldo1 = regulator_get(dev, "vadc");
180 if (IS_ERR_OR_NULL(res->ldo1)) {
181 dev_err(dev, "failed to get regulator 'ldo1'\n");
185 /* use VPP as parent clock; HDMIPHY is not working yet */
186 clk_set_parent(res->sclk_hdmi, res->sclk_pixel);
187 /* regulator_enable(res->ldo1); */
194 dev_err(dev, "platform HDMI Init - failed\n");
199 static void hdmi_deinit(struct device *dev)
201 struct hdmi_plat_resource *res = &hdmi_plat_resource;
202 dev_info(dev, "platform HDMI Deinit\n");
203 /* put clocks, power, and GPIOs */
204 if (!IS_ERR_OR_NULL(res->ldo1)) {
206 /* regulator_disable(res->ldo1); */
207 regulator_put(res->ldo1);
209 if (!IS_ERR_OR_NULL(res->sclk_hdmiphy))
210 clk_put(res->sclk_hdmiphy);
211 if (!IS_ERR_OR_NULL(res->sclk_pixel))
212 clk_put(res->sclk_pixel);
213 if (!IS_ERR_OR_NULL(res->sclk_hdmi))
214 clk_put(res->sclk_hdmi);
215 if (!IS_ERR_OR_NULL(res->hdmi))
217 memset(res, 0, sizeof *res);
218 gpio_free(S5PV310_GPL1(1));
219 gpio_free(S5PV310_GPX3(7));
222 static int hdmi_power_setup(struct device *dev, int en)
224 struct hdmi_plat_resource *res = &hdmi_plat_resource;
226 dev_info(dev, "HDMI power-on\n");
227 /* turn HDMI power on */
228 gpio_direction_output(S5PV310_GPL1(1), 1);
229 /* tv_power_get(); */
230 regulator_enable(res->ldo1);
232 clk_enable(res->hdmi);
233 clk_enable(res->sclk_hdmi);
234 /* power-on hdmi physical interface */
235 SETREG(S5P_HDMI_PHY_CONTROL, 1, 1);
237 dev_info(dev, "HDMI power-off\n");
238 /* power-off hdmiphy */
239 SETREG(S5P_HDMI_PHY_CONTROL, 0, 1);
240 /* turn clocks off */
241 clk_disable(res->sclk_hdmi);
242 clk_disable(res->hdmi);
243 /* turn HDMI power off */
244 regulator_disable(res->ldo1);
245 /* tv_power_put(); */
246 gpio_direction_output(S5PV310_GPL1(1), 0);
252 static int hdmi_stream_setup(struct device *dev, int en)
254 struct hdmi_plat_resource *res = &hdmi_plat_resource;
255 /* NOTE: assumed HDMI power is on */
257 dev_info(dev, "HDMI: stream on\n");
258 /* hdmiphy clock is used for HDMI in streaming mode */
259 clk_disable(res->sclk_hdmi);
260 clk_set_parent(res->sclk_hdmi, res->sclk_hdmiphy);
261 clk_enable(res->sclk_hdmi);
262 /* SETREG(S5P_CLKSRC_TV, 0x00000001, 0x00000001); */
264 dev_info(dev, "HDMI: stream off\n");
265 /* pixel(vpll) clock is used for HDMI in config mode */
266 clk_disable(res->sclk_hdmi);
267 clk_set_parent(res->sclk_hdmi, res->sclk_pixel);
268 clk_enable(res->sclk_hdmi);
269 /* SETREG(S5P_CLKSRC_TV, 0x00000000, 0x00000001); */
275 static struct hdmi_platform_data hdmi_pdata = {
277 .deinit = hdmi_deinit,
278 .power_setup = hdmi_power_setup,
279 .stream_setup = hdmi_stream_setup,
283 static struct resource s5p_mixer_resources[] = {
285 .start = S5P_PA_MIXER,
286 .end = S5P_PA_MIXER + S5P_SZ_MIXER - 1,
287 .flags = IORESOURCE_MEM,
292 .end = S5P_PA_VP + S5P_SZ_VP - 1,
293 .flags = IORESOURCE_MEM,
299 .flags = IORESOURCE_IRQ,
304 static struct mxr_platform_data mxr_pdata;
306 struct platform_device s5p_device_mixer = {
309 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
310 .resource = s5p_mixer_resources,
312 .coherent_dma_mask = DMA_BIT_MASK(32),
313 .dma_mask = &s5p_device_mixer.dev.coherent_dma_mask,
314 .platform_data = &mxr_pdata,
317 EXPORT_SYMBOL(s5p_device_mixer);
319 static struct mxr_plat_resource {
322 struct clk *sclk_mixer;
323 struct clk *sclk_hdmi;
324 struct clk *sclk_dac;
325 struct regulator *ldo1;
328 static void mxr_deinit(struct device *dev);
330 static int mxr_init(struct device *dev)
332 struct mxr_plat_resource *res = &mxr_plat_resource;
333 dev_info(dev, "platform Mixer Init\n");
334 res->mixer = clk_get(dev, "mixer");
335 if (IS_ERR_OR_NULL(res->mixer)) {
336 dev_err(dev, "failed to get clock 'mixer'\n");
339 res->vp = clk_get(dev, "vp");
340 if (IS_ERR_OR_NULL(res->vp)) {
341 dev_err(dev, "failed to get clock 'vp'\n");
344 res->sclk_mixer = clk_get(dev, "sclk_mixer");
345 if (IS_ERR_OR_NULL(res->sclk_mixer)) {
346 dev_err(dev, "failed to get clock 'sclk_mixer'\n");
349 res->sclk_hdmi = clk_get(dev, "sclk_hdmi");
350 if (IS_ERR_OR_NULL(res->sclk_hdmi)) {
351 dev_err(dev, "failed to get clock 'sclk_hdmi'\n");
354 res->sclk_dac = clk_get(dev, "sclk_dac");
355 if (IS_ERR_OR_NULL(res->sclk_dac)) {
356 dev_err(dev, "failed to get clock 'sclk_dac'\n");
359 res->ldo1 = regulator_get(dev, "vadc");
360 if (IS_ERR_OR_NULL(res->ldo1)) {
361 dev_err(dev, "failed to get regulator 'ldo1'\n");
364 /* regulator_enable(res->ldo1); */
367 /* XXX: fixed connetction between MIXER and HDMI */
368 clk_set_parent(res->sclk_mixer, res->sclk_hdmi);
372 dev_err(dev, "platform Mixer Init - failed\n");
377 static void mxr_deinit(struct device *dev)
379 struct mxr_plat_resource *res = &mxr_plat_resource;
380 dev_info(dev, "platform Mixer denit\n");
381 if (!IS_ERR_OR_NULL(res->ldo1)) {
383 /* regulator_disable(res->ldo1); */
384 regulator_put(res->ldo1);
386 if (!IS_ERR_OR_NULL(res->sclk_dac))
387 clk_put(res->sclk_dac);
388 if (!IS_ERR_OR_NULL(res->sclk_hdmi))
389 clk_put(res->sclk_hdmi);
390 if (!IS_ERR_OR_NULL(res->sclk_mixer))
391 clk_put(res->sclk_mixer);
392 if (!IS_ERR_OR_NULL(res->vp))
394 if (!IS_ERR_OR_NULL(res->mixer))
396 memset(res, 0, sizeof *res);
399 static int mxr_power_setup(struct device *dev, int en)
401 struct mxr_plat_resource *res = &mxr_plat_resource;
402 /* enable/disable clocks, power, and GPIOs */
404 dev_info(dev, "MIXER power-on\n");
405 /* turn MIXER power on */
406 /* tv_power_get(); */
407 regulator_enable(res->ldo1);
409 clk_enable(res->mixer);
411 clk_enable(res->sclk_mixer);
412 /* HDMI CEC (no support) */
413 /* SETREG(S5P_CLKGATE_IP_PERIR, ~0, 1 << 11); */
416 dev_info(dev, "MIXER power-off\n");
417 /* turn clocks off */
418 clk_disable(res->sclk_mixer);
419 clk_disable(res->vp);
420 clk_disable(res->mixer);
421 /* turn MIXER power off */
422 regulator_disable(res->ldo1);
423 /* tv_power_put(); */
429 static struct mxr_platform_output output[] = {
430 { .output_name = "S5P HDMI connector", .module_name = "s5p-hdmi" },
433 static struct mxr_platform_data mxr_pdata = {
435 .output_cnt = ARRAY_SIZE(output),
437 .deinit = mxr_deinit,
438 .power_setup = mxr_power_setup,
441 static void dbg_plat_regs(void)
443 DBGREG(S5P_CLKSRC_TV);
444 DBGREG(S5P_CLKSRC_MASK_TV);
445 DBGREG(S5P_CLKGATE_IP_TV);
446 DBGREG(S5P_CLKGATE_IP_PERIL); /* remove (unknown?) */
447 DBGREG(S5P_CLKGATE_IP_PERIL); /* I2C HDMI (I2C8) remove */
448 DBGREG(S5P_CLKGATE_IP_PERIR); /* HDMI CEC remove (no support) */
449 DBGREG(S5P_CLKGATE_BLOCK); /* keep here */
450 DBGREG(S5P_CLKSRC_TOP0);
451 DBGREG(S5P_CLKSRC_TOP1);
452 DBGREG(S5P_HDMI_PHY_CONTROL);
453 DBGREG(S5P_CMU_CLKSTOP_TV_SYS_PWR);
454 DBGREG(S5P_CMU_RESET_TV_SYS_PWR);
455 DBGREG(S5P_TV_SYS_PWR);
456 DBGREG(S5P_TV_CONFIGURATION);
457 DBGREG(S5P_TV_STATUS);
458 DBGREG(S5P_CLKDIV_TV);