1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
7 #include <debug_uart.h>
16 #include <asm/arch-rockchip/bootrom.h>
18 #define TIMER_LOAD_COUNT_L 0x00
19 #define TIMER_LOAD_COUNT_H 0x04
20 #define TIMER_CONTROL_REG 0x10
22 #define TIMER_FMODE BIT(0)
23 #define TIMER_RMODE BIT(1)
25 __weak void rockchip_stimer_init(void)
27 /* If Timer already enabled, don't re-init it */
28 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
34 asm volatile("mcr p15, 0, %0, c14, c0, 0"
35 : : "r"(COUNTER_FREQUENCY));
38 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
39 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
40 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
41 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
45 __weak int board_early_init_f(void)
50 void board_init_f(ulong dummy)
57 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
59 * Debug UART can be used from here if required:
64 * printascii("string");
67 #ifdef CONFIG_TPL_BANNER_PRINT
68 printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
72 ret = spl_early_init();
74 debug("spl_early_init() failed: %d\n", ret);
78 /* Init secure timer */
79 rockchip_stimer_init();
80 /* Init ARM arch timer in arch/arm/cpu/ */
83 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
85 printf("DRAM init failed: %d\n", ret);
90 int board_return_to_bootrom(struct spl_image_info *spl_image,
91 struct spl_boot_device *bootdev)
93 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
98 u32 spl_boot_device(void)
100 return BOOT_DEVICE_BOOTROM;