1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2019 Rockchip Electronics Co., Ltd
7 #include <debug_uart.h>
14 #include <asm/arch-rockchip/bootrom.h>
16 #define TIMER_LOAD_COUNT_L 0x00
17 #define TIMER_LOAD_COUNT_H 0x04
18 #define TIMER_CONTROL_REG 0x10
20 #define TIMER_FMODE BIT(0)
21 #define TIMER_RMODE BIT(1)
23 __weak void rockchip_stimer_init(void)
25 /* If Timer already enabled, don't re-init it */
26 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
32 asm volatile("mcr p15, 0, %0, c14, c0, 0"
33 : : "r"(COUNTER_FREQUENCY));
36 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
37 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
38 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
39 writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
43 void board_init_f(ulong dummy)
48 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT)
50 * Debug UART can be used from here if required:
55 * printascii("string");
58 #ifdef CONFIG_TPL_BANNER_PRINT
59 printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
63 ret = spl_early_init();
65 debug("spl_early_init() failed: %d\n", ret);
69 /* Init secure timer */
70 rockchip_stimer_init();
71 /* Init ARM arch timer in arch/arm/cpu/ */
74 ret = uclass_get_device(UCLASS_RAM, 0, &dev);
76 printf("DRAM init failed: %d\n", ret);
81 int board_return_to_bootrom(struct spl_image_info *spl_image,
82 struct spl_boot_device *bootdev)
84 back_to_bootrom(BROM_BOOT_NEXTSTAGE);
89 u32 spl_boot_device(void)
91 return BOOT_DEVICE_BOOTROM;