arch/arm/mach-rockchip/tpl.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
   4  */
   5
   6 #include <common.h>
   7 #include <debug_uart.h>
   8 #include <dm.h>
   9 #include <hang.h>
  10 #include <init.h>
  11 #include <log.h>
  12 #include <ram.h>
  13 #include <spl.h>
  14 #include <version.h>
  15 #include <asm/io.h>
  16 #include <asm/arch-rockchip/bootrom.h>
  17 #include <linux/bitops.h>
  18 #include <linux/kconfig.h>
  19
  20 #if CONFIG_IS_ENABLED(BANNER_PRINT)
  21 #include <timestamp.h>
  22 #endif
  23
  24 #define TIMER_LOAD_COUNT_L      0x00
  25 #define TIMER_LOAD_COUNT_H      0x04
  26 #define TIMER_CONTROL_REG       0x10
  27 #define TIMER_EN        0x1
  28 #define TIMER_FMODE     BIT(0)
  29 #define TIMER_RMODE     BIT(1)
  30
  31 __weak void rockchip_stimer_init(void)
  32 {
  33 #if defined(CONFIG_ROCKCHIP_STIMER_BASE)
  34         /* If Timer already enabled, don't re-init it */
  35         u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  36
  37         if (reg & TIMER_EN)
  38                 return;
  39
  40 #ifndef CONFIG_ARM64
  41         asm volatile("mcr p15, 0, %0, c14, c0, 0"
  42                      : : "r"(COUNTER_FREQUENCY));
  43 #endif
  44
  45         writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
  46         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
  47         writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
  48         writel(TIMER_EN | TIMER_FMODE, CONFIG_ROCKCHIP_STIMER_BASE +
  49                TIMER_CONTROL_REG);
  50 #endif
  51 }
  52
  53 void board_init_f(ulong dummy)
  54 {
  55         struct udevice *dev;
  56         int ret;
  57
  58 #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL)
  59         /*
  60          * Debug UART can be used from here if required:
  61          *
  62          * debug_uart_init();
  63          * printch('a');
  64          * printhex8(0x1234);
  65          * printascii("string");
  66          */
  67         debug_uart_init();
  68 #ifdef CONFIG_TPL_BANNER_PRINT
  69         printascii("\nU-Boot TPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \
  70                                 U_BOOT_TIME ")\n");
  71 #endif
  72 #endif
  73         ret = spl_early_init();
  74         if (ret) {
  75                 debug("spl_early_init() failed: %d\n", ret);
  76                 hang();
  77         }
  78
  79         /* Init secure timer */
  80         rockchip_stimer_init();
  81
  82         /* Init ARM arch timer */
  83         if (IS_ENABLED(CONFIG_SYS_ARCH_TIMER))
  84                 timer_init();
  85
  86         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
  87         if (ret) {
  88                 printf("DRAM init failed: %d\n", ret);
  89                 return;
  90         }
  91 }
  92
  93 int board_return_to_bootrom(struct spl_image_info *spl_image,
  94                             struct spl_boot_device *bootdev)
  95 {
  96         back_to_bootrom(BROM_BOOT_NEXTSTAGE);
  97
  98         return 0;
  99 }
 100
 101 u32 spl_boot_device(void)
 102 {
 103         return BOOT_DEVICE_BOOTROM;
 104 }